On 04/14/2014 04:32 AM, Claudio Fontana wrote:
> the problem is not in the two nibbles you show, but in the third nibble:
> 31 30 29 28 27 26 25 24 23 22 21 20
> size 1 1 1 v 0 0 opc 0 x
>
> the third nibble in your mask is 'E' and the expected result is 0, which
> forces opc to be
On 07.04.2014 18:33, Richard Henderson wrote:
> On 04/07/2014 12:58 AM, Claudio Fontana wrote:
>>> +|| (insn & 0x3bc0) == 0x2840 /* C3.3.7 */
>>
>> I think the Load (L) bit should be 0 here so
>>
>> == 0x2800
>
> Oops. Fixed.
>
>>
>>> +|| (insn & 0x3
On 3 April 2014 20:56, Richard Henderson wrote:
> Since the kernel doesn't pass any info on the reason for the fault,
There are now patches proposed to the kernel to supply this:
http://www.spinics.net/lists/arm-kernel/msg320268.html
thanks
-- PMM
On 04/07/2014 12:58 AM, Claudio Fontana wrote:
>> +|| (insn & 0x3bc0) == 0x2840 /* C3.3.7 */
>
> I think the Load (L) bit should be 0 here so
>
> == 0x2800
Oops. Fixed.
>
>> +|| (insn & 0x3be00c00) == 0x38000400 /* C3.3.8 */
>
> With V=1, an op
On 03.04.2014 21:56, Richard Henderson wrote:
> Since the kernel doesn't pass any info on the reason for the fault,
> disassemble the instruction to detect a store.
>
> Signed-off-by: Richard Henderson
> ---
> user-exec.c | 29 +++--
> 1 file changed, 23 insertions(+), 6
