We enumerate all the PCI devices attached to the SMMU and
initialize an associated IOMMU memory region and address space.
This happens on SMMU base instance init.
Those info are stored in SMMUDevice objects. The devices are
grouped according to the PCIBus they belong to. A hash table
indexed by th
Signed-off-by: Richard Henderson
---
target/arm/helper-sve.h| 4 +++
target/arm/sve_helper.c| 70 ++
target/arm/translate-sve.c | 26 +
target/arm/sve.decode | 3 ++
4 files changed, 103 insertions(+)
diff --git a/target/
We introduce some helpers to handle wired IRQs and especially
GERROR interrupt. SMMU writes GERROR register on GERROR event
and SW acks GERROR interrupts by setting GERRORn.
The Wired interrupts are edge sensitive hence the pulse usage.
Signed-off-by: Eric Auger
---
v7 -> v8:
- remove SMMU_PEN
This short series introduces support for emulating the ethernet
controller found in the Intel EG20T Platform Controller Hub, and then
enables that device for the MIPS Boston board. This gives the Boston
board a network device matching that found on real Boston boards,
providing unmodified Boston Li
Hi Linus,
On 02/17/2018 11:00 AM, Linus Walleij wrote:
> This adds support for emulating the Silicon Image SII9022 DVI/HDMI
> bridge. It's not very clever right now, it just acknowledges
> the switch into DDC I2C mode and back. Combining this with the
> existing DDC I2C emulation gives the right b
The new machine type exposes a new "iommu" virt machine option.
The SMMUv3 IOMMU is instantiated using -machine virt,iommu=smmuv3.
Signed-off-by: Eric Auger
---
v7 -> v8:
- Revert to machine option, now dubbed "iommu", preparing for virtio
instantiation.
v5 -> v6: machine 2_11
Another altern
This series implements the emulation code for ARM SMMUv3.
SMMUv3 gets instantiated by adding ",iommu=smmuv3" to the virt
machine option.
VHOST integration will be handled in a separate series. VFIO
integration is not targeted at the moment. Only stage 1 and
AArch64 PTW are supported.
Main change
From: Prem Mallappa
This patch implements a skeleton for the smmuv3 device.
Datatypes and register definitions are introduced. The MMIO
region, the interrupts and the queue are initialized.
Only the MMIO read operation is implemented here.
Signed-off-by: Prem Mallappa
Signed-off-by: Eric Auger
Now we have relevant helpers for queue and irq
management, let's implement MMIO write operations.
Signed-off-by: Eric Auger
---
v7 -> v8:
- precise in the commit message invalidation commands
are not yet treated.
- use new queue helpers
- do not decode unhandled commands at this stage
---
hw
We introduce helpers to read/write into the command and event
circular queues.
smmuv3_write_eventq and smmuv3_cmq_consume will become static
in subsequent patches.
Invalidation commands are not yet dealt with. We do not cache
data that need to be invalidated. This will change with vhost
integrati
In case the MSI is translated by an IOMMU we need to fixup the
MSI route with the translated address.
Signed-off-by: Eric Auger
---
v5 -> v6:
- use IOMMUMemoryRegionClass API
It is still unclear to me if we need to register an IOMMUNotifier
to handle any change in the MSI doorbell which would
This patch implements the IOMMU Memory Region translate()
callback. Most of the code relates to the translation
configuration decoding and check (STE, CD).
Signed-off-by: Eric Auger
---
v8 -> v9:
- use SMMU_EVENT_STRING macro
- get rid of last erro_report's
- decode asid
- handle config abort be
From: Prem Mallappa
Add code to instantiate an smmuv3 in virt machine. A new iommu
integer member is introduced in VirtMachineState to store the type
of the iommu in use.
Signed-off-by: Prem Mallappa
Signed-off-by: Eric Auger
---
v7 -> v8:
- integer iommu member
- add primary-bus property
v4
From: Prem Mallappa
This patch builds the smmuv3 node in the ACPI IORT table.
The RID space of the root complex, which spans 0x0-0x1
maps to streamid space 0x0-0x1 in smmuv3, which in turn
maps to deviceid space 0x0-0x1 in the ITS group.
The guest must feature the IOMMU probe deferr
Enable CONFIG_PCH_GBE_PCI in mips64el-softmmu.mak (currently the only
default config to enable Boston board support) and create the pch_gbe
device when using the Boston board.
This provides the board with an ethernet controller matching that found
on real Boston boards as part of the Intel EG20T P
The existing hppa backend uses a lot of mask/compare tables
to do decoding beyond the major opcode. Converting the port
to the autogenerator makes things lots easier to read.
r~
Richard Henderson (19):
target/hppa: Use DisasContextBase.is_jmp
target/hppa: Begin using scripts/decodetree.py
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 92 ++--
target/hppa/insns.decode | 12 +++
2 files changed, 55 insertions(+), 49 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 9b2de2fa2a..ae5969be
Convert the BREAK instruction to start.
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 14 +++---
target/hppa/Makefile.objs | 8
target/hppa/insns.decode | 24
3 files changed, 43 insertions(+), 3 deletions(-)
create mode 100644 targ
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 57 +---
target/hppa/insns.decode | 15 +
2 files changed, 40 insertions(+), 32 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index a503ae38d4..9b
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 337 ++-
target/hppa/insns.decode | 40 ++
2 files changed, 197 insertions(+), 180 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index ca46e8d50b..91617b
With decodetree.py, the specializations would conflict so we
must have a single entry point for all variants of OR.
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 108 +++-
1 file changed, 60 insertions(+), 48 deletions(-)
diff --git a
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 159 +++
target/hppa/insns.decode | 38 +++
2 files changed, 88 insertions(+), 109 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 074234b1e0..ca
Instead of returning DisasJumpType, immediately store it.
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 971
1 file changed, 487 insertions(+), 484 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 168 +--
target/hppa/insns.decode | 21 ++
2 files changed, 96 insertions(+), 93 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 5df5b8dba4..51bd9016
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 157 ++-
target/hppa/insns.decode | 24
2 files changed, 56 insertions(+), 125 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 91617bf9ad..792e8
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 193 ++-
target/hppa/insns.decode | 49
2 files changed, 88 insertions(+), 154 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 51bd9016ab..6
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 93
target/hppa/insns.decode | 21 +++
2 files changed, 21 insertions(+), 93 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 6f97f7330e..1973
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 49 +++-
target/hppa/insns.decode | 5 +
2 files changed, 20 insertions(+), 34 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 1973923a18..5abe4cd610
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 69
target/hppa/insns.decode | 12 +
2 files changed, 52 insertions(+), 29 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 792e838849..1cfdbf
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 188 ---
target/hppa/insns.decode | 30
2 files changed, 110 insertions(+), 108 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 1cfdbf6296..361a
Now that the implementation is entirely within the generated
decode function, eliminate the wrapper.
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
inde
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 757 ---
target/hppa/insns.decode | 175 +++
2 files changed, 498 insertions(+), 434 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 1d2134ac06..3
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 217 ++-
target/hppa/insns.decode | 15
2 files changed, 96 insertions(+), 136 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 361a20b733..e01a28c70
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 79
target/hppa/insns.decode | 12
2 files changed, 38 insertions(+), 53 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 5abe4cd610..1d2134a
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 125 ---
target/hppa/insns.decode | 34 -
2 files changed, 63 insertions(+), 96 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index e01a28c70c..5
Hello,
Benjamin Drung, on ven. 16 févr. 2018 13:55:03 +0100, wrote:
> Or should the command line option be simpler, but how should it be specified
> then? Maybe
>
> -net
> staticroute=10.0.2.0/24via10.0.2.2,staticroute=192.168.0.0/16via10.0.2.2
I guess
> -net staticroute=10.0.2.0/24:10.0.
Add emulation of aCube Sam460ex board based on AMCC 460EX embedded SoC.
This is not a complete implementation yet with a lot of components
still missing but enough for the U-Boot firmware to start and to boot
a Linux kernel or AROS.
Signed-off-by: François Revol
Signed-off-by: BALATON Zoltan
---
On Fri, 16 Feb 2018, BALATON Zoltan wrote:
On Fri, 16 Feb 2018, David Gibson wrote:
On Thu, Feb 15, 2018 at 10:27:06PM +0100, BALATON Zoltan wrote:
Add emulation of aCube Sam460ex board based on AMCC 460EX embedded SoC.
This is not a complete implementation yet with a lot of components
still mi
Signed-off-by: Laurent Vivier
---
target/m68k/translate.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 70c7583621..cb795ed25b 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -2869,6 +2869,7 @@ DISAS_
Signed-off-by: Emilio G. Cota
---
target/openrisc/translate.c | 87 ++---
1 file changed, 43 insertions(+), 44 deletions(-)
diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c
index 2747b24..0450144 100644
--- a/target/openrisc/translate
Notes:
- Changed the num_insns test in tb_start to check for
dc->base.num_insns > 1, since when tb_start is first
called in a TB, base.num_insns is already set to 1.
- Removed DISAS_NEXT from the switch on tb_stop; use DISAS_TOO_MANY
instead.
- Added an assert_not_reached on tb_stop for DI
Tested on the image linked from the wiki:
https://wiki.qemu.org/Testing/System_Images
Boot after decompressing with:
or1k-softmmu/qemu-system-or1k -cpu or1200 -M or1k-sim \
-kernel path/to/or1k-linux-4.10 \
-serial stdio -nographic -monitor none
Thanks,
Emilio
On Sat, Feb 17, 2018 at 08:32:36PM -0500, Emilio G. Cota wrote:
> Signed-off-by: Emilio G. Cota
Hello,
This looks ok to me, and thanks for testing. However, I am not so familiar with
the DisasContextBase. Is this something new?
It would be good to have a commit message to say what it is any w
On Sat, Feb 17, 2018 at 08:32:37PM -0500, Emilio G. Cota wrote:
> Notes:
>
> - Changed the num_insns test in tb_start to check for
> dc->base.num_insns > 1, since when tb_start is first
> called in a TB, base.num_insns is already set to 1.
>
> - Removed DISAS_NEXT from the switch on tb_stop;
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1202289
Title:
Windows 200
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1299858
Title:
qemu all ap
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
--
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https://bugs.launchpad.net/bugs/1211910
Title:
Logical to
On Sun, Feb 18, 2018 at 12:10:46 +0900, Stafford Horne wrote:
> On Sat, Feb 17, 2018 at 08:32:36PM -0500, Emilio G. Cota wrote:
> > Signed-off-by: Emilio G. Cota
> This looks ok to me, and thanks for testing. However, I am not so familiar
> with
> the DisasContextBase. Is this something new?
T
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