Re: [Qemu-devel] Help: Does Qemu support virtio-pci for net-device and disk device?

On Wed, Aug 17, 2016 at 06:41:33PM +0200, Andrea Bolognani wrote: > On Wed, 2016-08-17 at 18:13 +0200, Andrew Jones wrote: > > On Wed, Aug 17, 2016 at 08:08:11PM +0800, Kevin Zhao wrote: > > >  > > > Hi all, > > >  Now I'm investigating net device hot plu

[Qemu-devel] [PATCH 2/2] hw/arm/virt: no ITS on older machine types

We should avoid exposing new hardware (through DT and ACPI) on older machine types. This patch keeps 2.7 and older from changing, despite the introduction of ITS support for 2.8. Signed-off-by: Andrew Jones <drjo...@redhat.com> --- As Eduardo pointed out long ago for a different reas

[Qemu-devel] [PATCH 0/2] couple ITS support fixups

Andrew Jones (2): hw/arm/virt-acpi-build: fix MADT generation hw/arm/virt: no ITS on older machine types hw/arm/virt-acpi-build.c | 14 ++ hw/arm/virt.c| 15 +++ include/hw/arm/virt-acpi-build.h | 1 + 3 files changed, 18 insertions

[Qemu-devel] [PATCH 1/2] hw/arm/virt-acpi-build: fix MADT generation

We can't return early from build_* functions, as build_header is only called at the end. Signed-off-by: Andrew Jones <drjo...@redhat.com> --- hw/arm/virt-acpi-build.c | 14 ++ 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/vir

[Qemu-devel] [kvm-unit-tests PATCH v4 01/11] lib: xstr: allow multiple args

Make implementation equivalent to Linux's include/linux/stringify.h Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-off-by: Andrew Jones <drjo...@redhat.com> --- lib/libcflat.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/libcflat.h b/lib/libc

[Qemu-devel] [kvm-unit-tests PATCH v4 00/11] arm/arm64: add gic framework

b.com/rhdrjones/kvm-unit-tests/commits/arm/gic-v4 Andrew Jones (10): lib: xstr: allow multiple args arm64: fix get_"sysreg32" and make MPIDR 64bit arm/arm64: smp: support more than 8 cpus arm/arm64: add some delay routines arm/arm64: irq enable/disable arm/arm64: add initial gicv

[Qemu-devel] [kvm-unit-tests PATCH v4 02/11] arm64: fix get_"sysreg32" and make MPIDR 64bit

mrs is always 64bit, so we should always use a 64bit register. Sometimes we'll only want to return the lower 32, but not for MPIDR, as that does define fields in the upper 32. Reviewed-by: Alex Bennée <alex.ben...@linaro.org> Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-of

[Qemu-devel] [kvm-unit-tests PATCH v4 10/11] arm/arm64: gicv3: add an IPI test

Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v4: - heavily comment gicv3_ipi_send_tlist() [Eric] - changes needed for gicv2 iar/irqstat fix to other patch v2: - use IRM for gicv3 broadcast --- arm/gic.c | 195 ++--

[Qemu-devel] [kvm-unit-tests PATCH v4 11/11] arm/arm64: gic: don't just use zero

Allow user to select who sends ipis and with which irq, rather than just always sending irq=0 from cpu0. Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v4: improve structure and make sure spurious checking is done even when the sender isn't cpu0 v2: actually check that the irq re

[Qemu-devel] [kvm-unit-tests PATCH v4 07/11] arm/arm64: gicv2: add an IPI test

Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v4: properly mask irqnr in ipi_handler v2: add more details in the output if a test fails, report spurious interrupts if we get them --- arm/Makefile.common | 6 +- arm/gic.c

[Qemu-devel] [kvm-unit-tests PATCH v4 03/11] arm/arm64: smp: support more than 8 cpus

<alex.ben...@linaro.org> Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v4: improved commit message --- arm/run | 19 --- arm/selftest.c| 5 - lib/arm/asm/processor.h | 9 +++-- lib/arm/asm/setup.h | 4 ++-- lib

[Qemu-devel] [kvm-unit-tests PATCH v4 05/11] arm/arm64: irq enable/disable

Reviewed-by: Alex Bennée <alex.ben...@linaro.org> Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-off-by: Andrew Jones <drjo...@redhat.com> --- lib/arm/asm/processor.h | 10 ++ lib/arm64/asm/processor.h | 10 ++ 2 files changed, 20 insertions(+) diff -

[Qemu-devel] [kvm-unit-tests PATCH v4 09/11] arm/arm64: add initial gicv3 support

Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v4: - only take defines from kernel we need now [Andre] - simplify enable by not caring if we reinit the distributor [drew] v2: - configure irqs as NS GRP1 --- lib/arm/asm/arch_gicv3.h | 42 + lib/arm/asm/gi

[Qemu-devel] [kvm-unit-tests PATCH v4 04/11] arm/arm64: add some delay routines

Allow a thread to wait some specified amount of time. Can specify in cycles, usecs, and msecs. Reviewed-by: Alex Bennée <alex.ben...@linaro.org> Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-off-by: Andrew Jones <drjo...@redhat.com> --- lib/arm/asm/

[Qemu-devel] [kvm-unit-tests PATCH v4 06/11] arm/arm64: add initial gicv2 support

Add some gicv2 support. This just adds init and enable functions, allowing unit tests to start messing with it. Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v4: - only take defines from kernel we need now [Andre] - moved defines to asm/gic.h so they'll be shared with v3

[Qemu-devel] [kvm-unit-tests PATCH v4 08/11] libcflat: add IS_ALIGNED() macro, and page sizes

From: Peter Xu <pet...@redhat.com> These macros will be useful to do page alignment checks. Signed-off-by: Peter Xu <pet...@redhat.com> [drew: also added SZ_64K] Signed-off-by: Andrew Jones <drjo...@redhat.com> --- lib/libcflat.h | 6 ++ 1 file changed, 6 insertions(+)

Re: [Qemu-devel] virsh dump (qemu guest memory dump?): KASLR enabled linux guest support

On Wed, Nov 09, 2016 at 11:01:46AM +0800, Dave Young wrote: > Hi, > > Latest linux kernel enabled kaslr to randomiz phys/virt memory > addresses, we had some effort to support kexec/kdump so that crash > utility can still works in case crashed kernel has kaslr enabled. > > But according to Dave

Re: [Qemu-devel] virsh dump (qemu guest memory dump?): KASLR enabled linux guest support

On Wed, Nov 09, 2016 at 11:58:19AM +, Daniel P. Berrange wrote: > On Wed, Nov 09, 2016 at 12:48:09PM +0100, Andrew Jones wrote: > > On Wed, Nov 09, 2016 at 11:37:35AM +, Daniel P. Berrange wrote: > > > On Wed, Nov 09, 2016 at 12:26:17PM +0100, Laszlo Ersek wrote: > &g

Re: [Qemu-devel] [kvm-unit-tests PATCH v4 03/11] arm/arm64: smp: support more than 8 cpus

On Wed, Nov 09, 2016 at 11:12:03AM +, Andre Przywara wrote: [...] > > diff --git a/lib/arm/setup.c b/lib/arm/setup.c > > index 7e7b39f11dde..b6e2d5815e72 100644 > > --- a/lib/arm/setup.c > > +++ b/lib/arm/setup.c > > @@ -24,12 +24,22 @@ extern unsigned long stacktop; > > extern void

Re: [Qemu-devel] [kvm-unit-tests PATCH v4 06/11] arm/arm64: add initial gicv2 support

t; +/* > > + * Copyright (C) 2016, Red Hat Inc, Andrew Jones <drjo...@redhat.com> > > + * > > + * This work is licensed under the terms of the GNU LGPL, version 2. > > + */ > > +#ifndef _ASMARM_GIC_H_ > > +#define _ASMARM_GIC_H_ > > + > > +#

Re: [Qemu-devel] [kvm-unit-tests PATCH v4 09/11] arm/arm64: add initial gicv3 support

@@ > > +/* > > + * All GIC* defines are lifted from include/linux/irqchip/arm-gic-v3.h > > + * > > + * Copyright (C) 2016, Red Hat Inc, Andrew Jones <drjo...@redhat.com> > > + * > > + * This work is licensed under the terms of the GNU LGPL, ver

Re: [Qemu-devel] virsh dump (qemu guest memory dump?): KASLR enabled linux guest support

On Wed, Nov 09, 2016 at 11:37:35AM +, Daniel P. Berrange wrote: > On Wed, Nov 09, 2016 at 12:26:17PM +0100, Laszlo Ersek wrote: > > On 11/09/16 11:40, Andrew Jones wrote: > > > On Wed, Nov 09, 2016 at 11:01:46AM +0800, Dave Young wrote: > > >> Hi, > > &

Re: [Qemu-devel] [kvm-unit-tests PATCH v4 03/11] arm/arm64: smp: support more than 8 cpus

On Wed, Nov 09, 2016 at 12:01:42PM +, Andre Przywara wrote: > Hi, > > On 09/11/16 11:57, Andrew Jones wrote: > > On Wed, Nov 09, 2016 at 11:12:03AM +, Andre Przywara wrote: > > [...] > >>> diff --git a/lib/arm/setup.c b/lib/arm/setup.c > >>

Re: [Qemu-devel] [kvm-unit-tests PATCH v4 09/11] arm/arm64: add initial gicv3 support

On Wed, Nov 09, 2016 at 02:43:53PM +, Andre Przywara wrote: > Hi, > > On 09/11/16 13:08, Andrew Jones wrote: > > On Wed, Nov 09, 2016 at 12:35:48PM +, Andre Przywara wrote: > > [...] > >>> diff --git a/lib/arm/asm/gic-v3.h b/lib/arm/asm/gic-v3.h >

Re: [Qemu-devel] [kvm-unit-tests PATCH v4 10/11] arm/arm64: gicv3: add an IPI test

Argh. I forgot to compile/test arm32/gicv3... Just did now and found a copy+paste error. On Tue, Nov 08, 2016 at 09:21:38PM +0100, Andrew Jones wrote: [...] > diff --git a/lib/arm/asm/arch_gicv3.h b/lib/arm/asm/arch_gicv3.h > index 81a1e5f6c29c..cbcec024a2a6 100644 > --- a/lib/arm/asm/a

Re: [Qemu-devel] [RFC PATCH] kvm-unit-tests: arm/arm64: strip GIC headers

On Tue, Nov 08, 2016 at 09:48:02AM +, Andre Przywara wrote: > Hi, > > this is an illustrative patch which shows what can be removed from > the kvm-unit-tests GIC headers. If this patch finds mercy, it should be > squashed into the in-flight GIC patches, eventually. > The rationale for this

Re: [Qemu-devel] [kvm-unit-tests PATCH v5 10/11] arm/arm64: gicv3: add an IPI test

On Thu, Nov 10, 2016 at 07:53:58PM +, Alex Bennée wrote: [...] > > +struct gic gicv2 = { > > + .ipi = { > > + .enable = gicv2_enable_defaults, > > + .send_self = gicv2_ipi_send_self, > > + .send_tlist = gicv2_ipi_send_tlist, > > + .send_broadcast =

Re: [Qemu-devel] [kvm-unit-tests PATCH v8 1/3] arm: Add PMU test

ertions(+), 1 deletion(-) > create mode 100644 arm/pmu.c Reviewed-by: Andrew Jones <drjo...@redhat.com>

Re: [Qemu-devel] [kvm-unit-tests PATCH v8 2/3] arm: pmu: Check cycle count increases

On Tue, Nov 08, 2016 at 12:17:14PM -0600, Wei Huang wrote: > From: Christopher Covington > > Ensure that reads of the PMCCNTR_EL0 are monotonically increasing, > even for the smallest delta of two subsequent reads. > > Signed-off-by: Christopher Covington

Re: [Qemu-devel] [kvm-unit-tests PATCH v8 3/3] arm: pmu: Add CPI checking

On Tue, Nov 08, 2016 at 12:17:15PM -0600, Wei Huang wrote: > From: Christopher Covington > > Calculate the numbers of cycles per instruction (CPI) implied by ARM > PMU cycle counter values. The code includes a strict checking facility > intended for the -icount option in TCG

Re: [Qemu-devel] [kvm-unit-tests PATCH v5 07/11] arm/arm64: gicv2: add an IPI test

On Fri, Nov 11, 2016 at 11:13:46AM +, Andre Przywara wrote: > Hi, > > more a comment loosely related to this patch ... > > > diff --git a/arm/unittests.cfg b/arm/unittests.cfg > > index 3f6fa45c587e..68bf5cd6008f 100644 > > --- a/arm/unittests.cfg > > +++ b/arm/unittests.cfg > > @@ -54,3

Re: [Qemu-devel] [kvm-unit-tests PATCH v5 10/11] arm/arm64: gicv3: add an IPI test

On Fri, Nov 11, 2016 at 10:02:59AM +, Alex Bennée wrote: > > Andrew Jones <drjo...@redhat.com> writes: > > > On Thu, Nov 10, 2016 at 07:53:58PM +, Alex Bennée wrote: > > [...] > >> > +struct gic gicv2 = { > >> > +.ipi = { >

Re: [Qemu-devel] [kvm-unit-tests PATCH v5 06/11] arm/arm64: add initial gicv2 support

On Fri, Nov 11, 2016 at 02:52:40PM +, Alex Bennée wrote: > > Andrew Jones <drjo...@redhat.com> writes: > > > Add some gicv2 support. This just adds init and enable > > functions, allowing unit tests to start messing with it. > > > > Signed-o

Re: [Qemu-devel] [kvm-unit-tests PATCH v5 06/11] arm/arm64: add initial gicv2 support

On Fri, Nov 11, 2016 at 03:17:25PM +, Andre Przywara wrote: > > > > This doesn't seem to be used and I'm not sure what GICD_TYPER_IRQS it is > > trying to achieve. > > The idea is to calculate the number of implemented SPIs. But I am not a > big fan of copying a macro from the emulation code

Re: [Qemu-devel] [kvm-unit-tests PATCH v5 08/11] libcflat: add IS_ALIGNED() macro, and page sizes

On Fri, Nov 11, 2016 at 03:02:42PM +, Alex Bennée wrote: > > Andrew Jones <drjo...@redhat.com> writes: > > > From: Peter Xu <pet...@redhat.com> > > > > These macros will be useful to do page alignment checks. > > > > Reviewed-by: And

[Qemu-devel] [kvm-unit-tests PATCH v4 00/11] arm/arm64: add gic framework

b.com/rhdrjones/kvm-unit-tests/commits/arm/gic-v4 Andrew Jones (10): lib: xstr: allow multiple args arm64: fix get_"sysreg32" and make MPIDR 64bit arm/arm64: smp: support more than 8 cpus arm/arm64: add some delay routines arm/arm64: irq enable/disable arm/arm64: add initial gicv

[Qemu-devel] [kvm-unit-tests PATCH v4 10/11] arm/arm64: gicv3: add an IPI test

Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v4: - heavily comment gicv3_ipi_send_tlist() [Eric] - changes needed for gicv2 iar/irqstat fix to other patch v2: - use IRM for gicv3 broadcast --- arm/gic.c | 195 ++--

[Qemu-devel] [kvm-unit-tests PATCH v4 07/11] arm/arm64: gicv2: add an IPI test

Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v4: properly mask irqnr in ipi_handler v2: add more details in the output if a test fails, report spurious interrupts if we get them --- arm/Makefile.common | 6 +- arm/gic.c

[Qemu-devel] [kvm-unit-tests PATCH v4 11/11] arm/arm64: gic: don't just use zero

Allow user to select who sends ipis and with which irq, rather than just always sending irq=0 from cpu0. Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v4: improve structure and make sure spurious checking is done even when the sender isn't cpu0 v2: actually check that the irq re

[Qemu-devel] [kvm-unit-tests PATCH v4 06/11] arm/arm64: add initial gicv2 support

Add some gicv2 support. This just adds init and enable functions, allowing unit tests to start messing with it. Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v4: - only take defines from kernel we need now [Andre] - moved defines to asm/gic.h so they'll be shared with v3

[Qemu-devel] [kvm-unit-tests PATCH v4 09/11] arm/arm64: add initial gicv3 support

Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v4: - only take defines from kernel we need now [Andre] - simplify enable by not caring if we reinit the distributor [drew] v2: - configure irqs as NS GRP1 --- lib/arm/asm/arch_gicv3.h | 42 + lib/arm/asm/gi

[Qemu-devel] [kvm-unit-tests PATCH v4 08/11] libcflat: add IS_ALIGNED() macro, and page sizes

From: Peter Xu <pet...@redhat.com> These macros will be useful to do page alignment checks. Signed-off-by: Peter Xu <pet...@redhat.com> [drew: also added SZ_64K] Signed-off-by: Andrew Jones <drjo...@redhat.com> --- lib/libcflat.h | 6 ++ 1 file changed, 6 insertions(+)

[Qemu-devel] [kvm-unit-tests PATCH v4 05/11] arm/arm64: irq enable/disable

Reviewed-by: Alex Bennée <alex.ben...@linaro.org> Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-off-by: Andrew Jones <drjo...@redhat.com> --- lib/arm/asm/processor.h | 10 ++ lib/arm64/asm/processor.h | 10 ++ 2 files changed, 20 insertions(+) diff -

[Qemu-devel] [kvm-unit-tests PATCH v4 04/11] arm/arm64: add some delay routines

Allow a thread to wait some specified amount of time. Can specify in cycles, usecs, and msecs. Reviewed-by: Alex Bennée <alex.ben...@linaro.org> Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-off-by: Andrew Jones <drjo...@redhat.com> --- lib/arm/asm/

[Qemu-devel] [kvm-unit-tests PATCH v4 01/11] lib: xstr: allow multiple args

Make implementation equivalent to Linux's include/linux/stringify.h Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-off-by: Andrew Jones <drjo...@redhat.com> --- lib/libcflat.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/libcflat.h b/lib/libc

[Qemu-devel] [kvm-unit-tests PATCH v4 03/11] arm/arm64: smp: support more than 8 cpus

<alex.ben...@linaro.org> Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v4: improved commit message --- arm/run | 19 --- arm/selftest.c| 5 - lib/arm/asm/processor.h | 9 +++-- lib/arm/asm/setup.h | 4 ++-- lib

[Qemu-devel] [kvm-unit-tests PATCH v4 02/11] arm64: fix get_"sysreg32" and make MPIDR 64bit

mrs is always 64bit, so we should always use a 64bit register. Sometimes we'll only want to return the lower 32, but not for MPIDR, as that does define fields in the upper 32. Reviewed-by: Alex Bennée <alex.ben...@linaro.org> Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-of

[Qemu-devel] [kvm-unit-tests PATCH v5 01/11] lib: xstr: allow multiple args

Make implementation equivalent to Linux's include/linux/stringify.h Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-off-by: Andrew Jones <drjo...@redhat.com> --- lib/libcflat.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/libcflat.h b/lib/libc

[Qemu-devel] [kvm-unit-tests PATCH v5 00/11] arm/arm64: add gic framework

st 11: extend the IPI tests to take variable sender and irq Available here: https://github.com/rhdrjones/kvm-unit-tests/commits/arm/gic-v5 Andrew Jones (10): lib: xstr: allow multiple args arm64: fix get_"sysreg32" and make MPIDR 64bit arm/arm64: smp: support more than 8 cpus

[Qemu-devel] [kvm-unit-tests PATCH v5 09/11] arm/arm64: add initial gicv3 support

Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v5: use modern register names [Andre] v4: - only take defines from kernel we need now [Andre] - simplify enable by not caring if we reinit the distributor [drew] v2: - configure irqs as NS GRP1 --- lib/arm/asm/arch_gicv3.h

[Qemu-devel] [kvm-unit-tests PATCH v5 02/11] arm64: fix get_"sysreg32" and make MPIDR 64bit

mrs is always 64bit, so we should always use a 64bit register. Sometimes we'll only want to return the lower 32, but not for MPIDR, as that does define fields in the upper 32. Reviewed-by: Alex Bennée <alex.ben...@linaro.org> Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-of

[Qemu-devel] [kvm-unit-tests PATCH v5 03/11] arm/arm64: smp: support more than 8 cpus

<alex.ben...@linaro.org> Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v5: left cpus a u32 for now. Changing to u64 requires a change to devicetree. Will do it later. [Andre] v4: improved commit message --- arm/run | 19 --- arm/selftest.c

[Qemu-devel] [kvm-unit-tests PATCH v5 11/11] arm/arm64: gic: don't just use zero

Allow user to select who sends ipis and with which irq, rather than just always sending irq=0 from cpu0. Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v4: improve structure and make sure spurious checking is done even when the sender isn't cpu0 v2: actually check that the irq re

[Qemu-devel] [kvm-unit-tests PATCH v5 04/11] arm/arm64: add some delay routines

Allow a thread to wait some specified amount of time. Can specify in cycles, usecs, and msecs. Reviewed-by: Alex Bennée <alex.ben...@linaro.org> Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-off-by: Andrew Jones <drjo...@redhat.com> --- lib/arm/asm/

[Qemu-devel] [kvm-unit-tests PATCH v5 08/11] libcflat: add IS_ALIGNED() macro, and page sizes

From: Peter Xu <pet...@redhat.com> These macros will be useful to do page alignment checks. Reviewed-by: Andre Przywara <andre.przyw...@arm.com> Signed-off-by: Peter Xu <pet...@redhat.com> [drew: also added SZ_64K] Signed-off-by: Andrew Jones <drjo...@redhat.com>

[Qemu-devel] [kvm-unit-tests PATCH v5 07/11] arm/arm64: gicv2: add an IPI test

Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v5: use modern registers [Andre] v4: properly mask irqnr in ipi_handler v2: add more details in the output if a test fails, report spurious interrupts if we get them --- arm/Mak

[Qemu-devel] [kvm-unit-tests PATCH v5 10/11] arm/arm64: gicv3: add an IPI test

Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v5: - fix copy+paste error in gicv3_write_eoir [drew] - use modern register names [Andre] v4: - heavily comment gicv3_ipi_send_tlist() [Eric] - changes needed for gicv2 iar/irqstat fix to other patch v2: - use IRM for gicv3 bro

[Qemu-devel] [kvm-unit-tests PATCH v5 05/11] arm/arm64: irq enable/disable

Reviewed-by: Alex Bennée <alex.ben...@linaro.org> Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-off-by: Andrew Jones <drjo...@redhat.com> --- lib/arm/asm/processor.h | 10 ++ lib/arm64/asm/processor.h | 10 ++ 2 files changed, 20 insertions(+) diff -

[Qemu-devel] [kvm-unit-tests PATCH v5 06/11] arm/arm64: add initial gicv2 support

Add some gicv2 support. This just adds init and enable functions, allowing unit tests to start messing with it. Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v5: share/use only the modern register names [Andre] v4: - only take defines from kernel we need now [Andre] - moved d

Re: [Qemu-devel] [kvm-unit-tests PATCH v4 00/11] arm/arm64: add gic framework

al v5 is coming... Thanks, Your Friendly Spammer > > Cheers, > Andre. > > On 10/11/16 16:07, Andrew Jones wrote: > > v4: > > - Eric's r-b's > > - Andre's suggestion to only take defines we need > > - several other changes listed in individual patches >

Re: [Qemu-devel] [PATCH v4 2/3] exec: move cpu_exec_init() calls to realize functions

On Tue, Oct 18, 2016 at 09:22:52PM +0200, Laurent Vivier wrote: > Modify all CPUs to call it from XXX_cpu_realizefn() function. > > Remove all the cannot_destroy_with_object_finalize_yet as > unsafe references have been moved to cpu_exec_realizefn(). > (tested with QOM command provided by commit

Re: [Qemu-devel] [PATCH V6 0/2] Add option to configure guest vPMU

On Thu, Oct 13, 2016 at 05:19:37PM +0100, Peter Maydell wrote: > On 4 October 2016 at 22:38, Wei Huang wrote: > > This patchset adds a pmu=[on/off] option to enable/disable vPMU support > > for guest VM. There are several reasons to justify this option. First, > > vPMU can be

Re: [Qemu-devel] [PATCH v2 1/2] ACPI: Add IORT Structure definition

On Fri, Oct 14, 2016 at 10:54:54AM +0200, Eric Auger wrote: > From: Prem Mallappa > > ACPI Spec 6.0 introduces IO Remapping Table Structure. This patch > introduces the definitions required to describe the IO relationship > between the PCIe root complex and the ITS. >

Re: [Qemu-devel] [PATCH v2 1/2] ACPI: Add IORT Structure definition

On Fri, Oct 14, 2016 at 02:42:18PM +0200, Igor Mammedov wrote: > On Fri, 14 Oct 2016 10:54:54 +0200 > Eric Auger wrote: > > > From: Prem Mallappa > > > > ACPI Spec 6.0 introduces IO Remapping Table Structure. This patch > > introduces the

Re: [Qemu-devel] [PATCH v2 2/2] ARM: Virt: ACPI: Build an IORT table with RC and ITS nodes

On Fri, Oct 14, 2016 at 10:54:55AM +0200, Eric Auger wrote: > From: Prem Mallappa > > This patch builds an IORT table that features a root complex node and > an ITS node. This complements the ITS description in the ACPI MADT > table and allows vhost-net on ACPI guest.

Re: [Qemu-devel] [PATCH V7 0/2] Add option to configure guest vPMU

On Fri, Oct 21, 2016 at 05:53:00PM -0400, Wei Huang wrote: > This patchset adds a pmu=[on/off] option to enable/disable vPMU support > for guest VM. There are several reasons to justify this option. First, > vPMU can be problematic for cross-migration between different SoC as perf > counters are

Re: [Qemu-devel] [PATCH v3 2/3] exec: rename cpu_exec_init() as cpu_exec_realizefn()

On Mon, Oct 17, 2016 at 05:20:22PM -0200, Eduardo Habkost wrote: > On Sat, Oct 15, 2016 at 12:52:48AM +0200, Laurent Vivier wrote: > > Modify all CPUs to call it from XXX_cpu_realizefn() function. > > > > Remove all the cannot_destroy_with_object_finalize_yet as > > unsafe references have been

Re: [Qemu-devel] [PATCH v3 2/3] exec: rename cpu_exec_init() as cpu_exec_realizefn()

On Tue, Oct 18, 2016 at 01:22:07PM -0200, Eduardo Habkost wrote: > On Tue, Oct 18, 2016 at 04:22:47PM +0200, Andrew Jones wrote: > > On Tue, Oct 18, 2016 at 11:18:29AM -0200, Eduardo Habkost wrote: > > > On Tue, Oct 18, 2016 at 03:00:07PM +0200, Andrew Jones wrote: > >

Re: [Qemu-devel] [PATCH v3 2/3] exec: rename cpu_exec_init() as cpu_exec_realizefn()

On Tue, Oct 18, 2016 at 11:18:29AM -0200, Eduardo Habkost wrote: > On Tue, Oct 18, 2016 at 03:00:07PM +0200, Andrew Jones wrote: > > On Mon, Oct 17, 2016 at 05:20:22PM -0200, Eduardo Habkost wrote: > > > On Sat, Oct 15, 2016 at 12:52:48AM +0200, Laurent Vivier wrote: >

Re: [Qemu-devel] [PATCH V6 0/2] Add option to configure guest vPMU

On Fri, Oct 14, 2016 at 09:48:28AM +0200, Andrew Jones wrote: > On Thu, Oct 13, 2016 at 05:19:37PM +0100, Peter Maydell wrote: > > On 4 October 2016 at 22:38, Wei Huang <w...@redhat.com> wrote: > > > This patchset adds a pmu=[on/off] option to enable/disable vPMU su

Re: [Qemu-devel] [PATCH v3 2/3] exec: rename cpu_exec_init() as cpu_exec_realizefn()

On Tue, Oct 18, 2016 at 06:07:49PM +0100, Peter Maydell wrote: > On 18 October 2016 at 17:22, Andrew Jones <drjo...@redhat.com> wrote: > > I'll note that it's > > accepted to reach into machine state through current_machine from > > the machine's devices. > > Tha

Re: [Qemu-devel] [PATCH V7 0/2] Add option to configure guest vPMU

On Mon, Oct 24, 2016 at 11:39:59PM -0500, Wei Huang wrote: > >> V6->V7: > >> * change has_pmu variable type from OnOffAuto to Boolean > >> * only add "pmu" property to CPU under kvm mode, default ON > > > > Hmm, if we don't allow the property with TCG then switching a guest from > > KVM to

Re: [Qemu-devel] [PATCH V7 0/2] Add option to configure guest vPMU

On Tue, Oct 25, 2016 at 11:55:05AM -0500, Wei Huang wrote: > > > On 10/25/2016 10:26 AM, Peter Maydell wrote: > > On 25 October 2016 at 08:33, Andrew Jones <drjo...@redhat.com> wrote: > >> On Mon, Oct 24, 2016 at 11:39:59PM -0500, Wei Huang wrote: > >>

Re: [Qemu-devel] [PATCH v3 2/2] ARM: Virt: ACPI: Build an IORT table with RC and ITS nodes

On Mon, Oct 24, 2016 at 01:29:42PM +0100, Peter Maydell wrote: > On 17 October 2016 at 15:07, Andrew Jones <drjo...@redhat.com> wrote: > > On Mon, Oct 17, 2016 at 02:31:06PM +0200, Eric Auger wrote: > >> From: Prem Mallappa <prem.malla...@broadcom.com> > >&g

Re: [Qemu-devel] [PATCH V7 2/2] arm: virt: add PMU property to mach-virt machine type

s PMU option is not exposed to command line and is turned off in > virt-2.6 machine type. > > Signed-off-by: Wei Huang <w...@redhat.com> > --- > hw/arm/virt.c | 7 +++ > 1 file changed, 7 insertions(+) Reviewed-by: Andrew Jones <drjo...@redhat.com> > > di

Re: [Qemu-devel] [kvm-unit-tests PATCH v3 07/10] arm/arm64: add initial gicv3 support

Hi Andre, On Thu, Oct 20, 2016 at 06:29:01PM +0100, Andre Przywara wrote: > Hi Drew, > > On 15/07/16 14:00, Andrew Jones wrote: > > Signed-off-by: Andrew Jones <drjo...@redhat.com> > > > > --- > > v2: configure irqs as NS GRP1 > &

Re: [Qemu-devel] [PATCH v5 2/3] exec: move cpu_exec_init() calls to realize functions

DEFINE_PROP_END_OF_LIST() > }; > > @@ -1533,17 +1539,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void > *data) > cc->debug_check_watchpoint = arm_debug_check_watchpoint; > > cc->disas_set_info = arm_disas_set_info; > - > -/* > - * Reason: arm_cpu_initfn() calls cpu_exec_init(), which saves > - * the object in cpus -> dangling pointer after final > - * object_unref(). > - * > - * Once this is fixed, the devices that create ARM CPUs should be > - * updated not to set cannot_destroy_with_object_finalize_yet, > - * unless they still screw up something else. > - */ > -dc->cannot_destroy_with_object_finalize_yet = true; > } For the ARM part Reviewed-by: Andrew Jones <drjo...@redhat.com> Thanks, drew

Re: [Qemu-devel] [PATCH v4 2/3] exec: move cpu_exec_init() calls to realize functions

On Wed, Oct 19, 2016 at 10:30:52AM +0200, Laurent Vivier wrote: > > > On 19/10/2016 10:13, Andrew Jones wrote: > > On Tue, Oct 18, 2016 at 09:22:52PM +0200, Laurent Vivier wrote: > >> Modify all CPUs to call it from XXX_cpu_realizefn() functi

Re: [Qemu-devel] [kvm-unit-tests PATCH v5 07/11] arm/arm64: gicv2: add an IPI test

On Fri, Nov 11, 2016 at 02:13:31PM +0100, Andrew Jones wrote: > On Fri, Nov 11, 2016 at 11:13:46AM +, Andre Przywara wrote: > > Hi, > > > > more a comment loosely related to this patch ... > > > > > diff --git a/arm/unittests.cfg b/arm/unittests.cfg &g

Re: [Qemu-devel] [kvm-unit-tests PATCH v8 2/3] arm: pmu: Check cycle count increases

On Fri, Nov 11, 2016 at 01:55:49PM -0600, Wei Huang wrote: > > > On 11/11/2016 01:43 AM, Andrew Jones wrote: > > On Tue, Nov 08, 2016 at 12:17:14PM -0600, Wei Huang wrote: > >> From: Christopher Covington <c...@codeaurora.org> > >> > >> Ensure

Re: [Qemu-devel] virsh dump (qemu guest memory dump?): KASLR enabled linux guest support

On Mon, Nov 14, 2016 at 01:32:56PM +0800, Dave Young wrote: > On 11/09/16 at 04:38pm, Laszlo Ersek wrote: > > On 11/09/16 15:47, Daniel P. Berrange wrote: > > > On Wed, Nov 09, 2016 at 01:20:51PM +0100, Andrew Jones wrote: > > >> On Wed, Nov 09, 2016 at 11:58:19AM +

Re: [Qemu-devel] [kvm-unit-tests PATCH v5 09/11] arm/arm64: add initial gicv3 support

On Fri, Nov 11, 2016 at 04:31:36PM +, Andre Przywara wrote: > Hi, > > On 10/11/16 17:21, Andrew Jones wrote: > > Signed-off-by: Andrew Jones <drjo...@redhat.com> > > > > --- > > v5: use modern register names [Andre] > > v4: > >

Re: [Qemu-devel] [kvm-unit-tests PATCH v11 1/3] arm: Add PMU test

On Fri, Nov 25, 2016 at 12:32:24PM +, Andre Przywara wrote: > Hi Drew, > > > > On 23/11/16 17:15, Andrew Jones wrote: > >>> + > >>> +#if defined(__arm__) > >> > >> I guess you should use the arch specific header files we have in

Re: [Qemu-devel] [kvm-unit-tests PATCH v6 11/11] arm/arm64: gic: don't just use zero

On Wed, Nov 23, 2016 at 02:33:31PM +0100, Auger Eric wrote: > > > On 23/11/2016 14:01, Andrew Jones wrote: > > On Wed, Nov 23, 2016 at 12:28:34PM +0100, Auger Eric wrote: > >> Hi, > >> > >> On 14/11/2016 22:08, Andrew Jones wrote: > >>>

Re: [Qemu-devel] [kvm-unit-tests PATCH v6 10/11] arm/arm64: gicv3: add an IPI test

On Wed, Nov 23, 2016 at 12:05:42PM +0100, Auger Eric wrote: > Hi Drew, > > On 14/11/2016 22:08, Andrew Jones wrote: > > Signed-off-by: Andrew Jones <drjo...@redhat.com> > > > > --- > > v6: move most gicv2/gicv3 wrappers to common code [Al

Re: [Qemu-devel] [kvm-unit-tests PATCH v6 11/11] arm/arm64: gic: don't just use zero

On Wed, Nov 23, 2016 at 12:28:34PM +0100, Auger Eric wrote: > Hi, > > On 14/11/2016 22:08, Andrew Jones wrote: > > Allow user to select who sends ipis and with which irq, > > rather than just always sending irq=0 from cpu0. > From a user point of view is there a way to kn

Re: [Qemu-devel] [kvm-unit-tests PATCH v6 00/11] arm/arm64: add gic framework

On Wed, Nov 23, 2016 at 12:33:53PM +0100, Auger Eric wrote: > Hi, > On 23/11/2016 11:09, Alex Bennée wrote: > > > > Andrew Jones <drjo...@redhat.com> writes: > > > >> Andre, Alex, Eric, anybody, > >> > >> Any more comments on this?

[Qemu-devel] [kvm-unit-tests PATCH v7 01/11] lib: xstr: allow multiple args

Make implementation equivalent to Linux's include/linux/stringify.h Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-off-by: Andrew Jones <drjo...@redhat.com> --- lib/libcflat.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/libcflat.h b/lib/libc

[Qemu-devel] [kvm-unit-tests PATCH v7 09/11] arm/arm64: add initial gicv3 support

Reviewed-by: Alex Bennée <alex.ben...@linaro.org> Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v7: split lib/arm/gic.c into gic-v2/3.c [Eric] v6: - added comments [Alex] - added stride parameter to gicv3_set_redist_base

[Qemu-devel] [kvm-unit-tests PATCH v7 08/11] libcflat: add IS_ALIGNED() macro, and page sizes

ed to shifts] Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v6: change to shifts [Alex] --- lib/libcflat.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/lib/libcflat.h b/lib/libcflat.h index c3fa4f24c499..bdcc561ccafd 100644 --- a/lib/libcflat.h +++ b/lib/libcflat

[Qemu-devel] [kvm-unit-tests PATCH v7 03/11] arm/arm64: smp: support more than 8 cpus

<alex.ben...@linaro.org> Reviewed-by: Andre Przywara <andre.przyw...@arm.com> Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v5: left cpus a u32 for now. Changing to u64 requires a change to devicetree. Will do it lat

[Qemu-devel] [kvm-unit-tests PATCH v7 02/11] arm64: fix get_"sysreg32" and make MPIDR 64bit

mrs is always 64bit, so we should always use a 64bit register. Sometimes we'll only want to return the lower 32, but not for MPIDR, as that does define fields in the upper 32. Reviewed-by: Alex Bennée <alex.ben...@linaro.org> Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-of

[Qemu-devel] [kvm-unit-tests PATCH v7 06/11] arm/arm64: add initial gicv2 support

Add some gicv2 support. This just adds init and enable functions, allowing unit tests to start messing with it. Reviewed-by: Andre Przywara <andre.przyw...@arm.com> Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v6: added

[Qemu-devel] [kvm-unit-tests PATCH v7 00/11] arm/arm64: add gic framework

tps://github.com/rhdrjones/kvm-unit-tests/commits/arm/gic-v7 Andrew Jones (10): lib: xstr: allow multiple args arm64: fix get_"sysreg32" and make MPIDR 64bit arm/arm64: smp: support more than 8 cpus arm/arm64: add some delay routines arm/arm64: irq enable/disable arm/arm6

[Qemu-devel] [kvm-unit-tests PATCH v7 07/11] arm/arm64: gicv2: add an IPI test

Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v6: move the spurious check to its own check_ function [drew] v5: use modern registers [Andre] v4: properly mask irqnr in ipi_handler v2: add more details in the output if a test fails

[Qemu-devel] [kvm-unit-tests PATCH v7 10/11] arm/arm64: gicv3: add an IPI test

Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v7: - add common ipi_send_single/mask (replacing ipi_send). Note, the arg order irq,cpu got swapped. [Eric] - comment rewording [Eric] - make enable_defaults a common op [Eric] - gic_enable_defaults() will now invoke gi

[Qemu-devel] [kvm-unit-tests PATCH v7 11/11] arm/arm64: gic: don't just use zero

Allow user to select who sends ipis and with which irq, rather than just always sending irq=0 from cpu0. Signed-off-by: Andrew Jones <drjo...@redhat.com> --- v7: cleanup cmdline parsing and add complain on bad args [Eric] v6: - make sender/irq names more future-proof [drew] - sanity

Re: [Qemu-devel] [kvm-unit-tests PATCH v11 3/3] arm: pmu: Add CPI checking

rm/unittests.cfg | 14 +++ > 2 files changed, 136 insertions(+), 1 deletion(-) Reviewed-by: Andrew Jones <drjo...@redhat.com>

Re: [Qemu-devel] [kvm-unit-tests PATCH v11 0/3] ARM PMU tests

On Tue, Nov 22, 2016 at 12:29:11PM -0600, Wei Huang wrote: > Changes from v10: > * Change the name of loop test function to precise_instrs_loop() > * Minor comment fixes to measure_instrs() and to explain isb() in loop funcs > > Note: > 1) Current KVM code has bugs in handling PMCCFILTR write. A

Re: [Qemu-devel] [kvm-unit-tests PATCH v11 1/3] arm: Add PMU test

gister > > ... by using the newly introduced report_info() to make it look nicer. Agreed. That would look nicer and make good use of report_info. Let's do that. > > > > > Signed-off-by: Christopher Covington <c...@codeaurora.org> > > Signed-off-by: Wei Huang <w.

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