On 08/01/2022 09:13, Xiaojuan Yang wrote:
Mainly introduce how to run the softmmu
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/README | 25 +
1 file changed, 25 insertions(+)
diff --git a/target/loongarch/README b/target/loongarch/READM
On 08/01/2022 09:13, Xiaojuan Yang wrote:
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/constant_timer.c | 63 +++
target/loongarch/cpu.c| 9 +
target/loongarch/cpu.h| 10 +
target/loongarch/meson.bui
On 08/01/2022 09:13, Xiaojuan Yang wrote:
This patch introduce vmstate_loongarch_cpu
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/cpu.c | 3 ++
target/loongarch/internals.h | 4 ++
target/loongarch/machine.c | 84 +
On 08/01/2022 09:14, Xiaojuan Yang wrote:
Emulate a 3A5000 board use the new loongarch instruction.
3A5000 belongs to the Loongson3 series processors.
The board consists of a 3A5000 cpu model and the 7A1000
bridge. The host 3A5000 board is really complicated and
contains many functions.Now for t
On 08/01/2022 09:14, Xiaojuan Yang wrote:
This patch realize the PCH-PIC interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/intc/Kconfig | 4 +
hw/intc/loongarch_pch_pic.c | 428
hw/intc/meson.build
On 08/01/2022 09:14, Xiaojuan Yang wrote:
This patch realize the EIOINTC interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/intc/Kconfig| 3 +
hw/intc/loongarch_extioi.c | 376 +
hw/intc/meson.build
On 08/01/2022 09:14, Xiaojuan Yang wrote:
This patch add the irq hierarchy for the virt board.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/loongson3.c | 85 ++
include/hw/pci-host/ls7a.h | 13 ++
2 files changed, 98 inser
On 10/01/2022 02:26, yangxiaojuan wrote:
Hi, Mark
On 12/23/2021 06:52 PM, Mark Cave-Ayland wrote:
On 22/12/2021 08:26, yangxiaojuan wrote:
Hi, Mark
On 12/18/2021 06:02 PM, Mark Cave-Ayland wrote:
On 04/12/2021 12:07, Xiaojuan Yang wrote:
1.Add uart,virtio-net,vga and usb for 3A5000.
2
On 12/01/2022 09:37, maobibo wrote:
Isn't this part already handled by the code in hw/pci/pci.c when the IRQ is
asserted, for example pci_change_irq_level()?
We design a different rule for the pcie devices connect to the root bridge,
assign more irqs to these devices.
For the pci device conn
On 08/01/2022 09:13, Xiaojuan Yang wrote:
This series patch add softmmu support for LoongArch.
Base on the linux-user emulation support V14 patch.
* https://patchew.org/QEMU/20220106094200.1801206-1-gaos...@loongson.cn/
The latest kernel:
* https://github.com/loongson/linux/tree/loongarch-
On 14/01/2022 14:12, Cédric Le Goater wrote:
Yes, more info here :
https://patchwork.kernel.org/project/qemu-devel/patch/1458121432-2855-1-git-send-email-lviv...@redhat.com/
mac99+970 only boots with a 64bit kernel. 32bit are not supported because
of the use of the rfi instruction which was
mu to QEMU
- add extra PVRs for MPC7450 family
----
Mark Cave-Ayland (1):
roms/openbios: update OpenBIOS images to 04dfc98 built from submodule
pc-bios/openbios-ppc | Bin 696912 -> 697088 bytes
pc-bios/openbios-sparc32
On 17/01/2022 14:52, Cédric Le Goater wrote:
Initially, I installed a debian11 ppc64 on a QEMU mac99/970 machine.
Something went wrong with the bootloader at installation and I was
stuck with memory boot. I didn't manage to restore a decent boot
setup even after that.
Interesting. I had a simi
On 22/01/2022 00:07, Philippe Mathieu-Daudé via wrote:
Commit 2dd285b5f3 ("tcx: make display updates thread safe")
converted this model to use the DirtyBitmapSnapshot API,
resetting the dirty bitmap in tcx_update_display(). There
is no need to do it again in the DeviceReset handler.
See more de
or use the MX server
indicated to send emails?
Otherwise it might be worth either getting your own gmail or domain for
posting.
=)
I'm seeing the same with Mark's email: Mark Cave-Ayland via
maybe Google is running a global SMTP purge?
Similar SPF/DKIM errors:
https://toolbox.googleapps
;< 24) + (((uint32_t)in_data[1]) << 16)
- + (((uint32_t)in_data[2]) << 8) + in_data[3];
+ti = ldl_be_p(in_data);
s->tick_offset = ti - (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
/ NANOSECONDS_PER_SECOND);
return true;
Looks fine to me.
Reviewed-by: Mark Cave-Ayland
ATB,
Mark.
On 26/01/2022 16:41, Fabiano Rosas wrote:
This handles the exception code for the 74xx family, i.e. 7400, 7410,
7440, 7445, 7450, 7455, 7457.
This is another family that is quite well known, so it should be
straight-forward as well.
Based on legoater/ppc-7.0
Fabiano Rosas (8):
target/ppc:
On 27/01/2022 20:28, Howard Spoelstra wrote:
Hi Zoltan,
While I can reproduce the issue you report when running morphos with gtk, I cannot
currently reproduce with the Mac OS/OSX guests I tested on Linux host. Both mac99
(adb mouse and kbd) and mac99,via=pmu (usb mouse and kbd) keep the mouse
no
longer required with these latest changes.
Signed-off-by: Mark Cave-Ayland
Mark Cave-Ayland (11):
mos6522: add defines for IFR bit flags
mac_via: use IFR bit flag constants for VIA1 IRQs
mac_via: use IFR bit flag constants for VIA2 IRQs
mos6522: switch over to use qdev gpios for IRQs
These are intended to make it easier to see how the physical control lines
are wired for each instance.
Signed-off-by: Mark Cave-Ayland
---
include/hw/misc/mos6522.h | 22 +++---
1 file changed, 15 insertions(+), 7 deletions(-)
diff --git a/include/hw/misc/mos6522.h b/include
This allows us to easily see how the physical control lines are mapped to the
IFR bit flags.
Signed-off-by: Mark Cave-Ayland
---
include/hw/misc/mac_via.h | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/include/hw/misc/mac_via.h b/include/hw/misc/mac_via.h
index
for the mos6522 device and update all instances
accordingly.
Signed-off-by: Mark Cave-Ayland
---
hw/misc/mac_via.c | 56 +++
hw/misc/macio/cuda.c | 5 ++--
hw/misc/macio/pmu.c | 4 +--
hw/misc/mos6522.c | 15 +++
include/hw
This allows us to easily see how the physical control lines are mapped to the
IFR bit flags.
Signed-off-by: Mark Cave-Ayland
---
include/hw/misc/mac_via.h | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/hw/misc/mac_via.h b/include/hw/misc/mac_via.h
index
This displays detailed information about the device registers and timers to aid
debugging problems with timers and interrupts.
Signed-off-by: Mark Cave-Ayland
---
hmp-commands-info.hx | 12 ++
hw/misc/mos6522.c| 92
2 files changed, 104
Now that the mos6522 IRQs are managed using standard qdev gpios these methods
are no longer required.
Signed-off-by: Mark Cave-Ayland
---
hw/misc/mos6522.c | 9 -
include/hw/misc/mos6522.h | 2 --
2 files changed, 11 deletions(-)
diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522
Switch from using a legacy approach to the more formal approach for propagating
device reset to the parent.
Signed-off-by: Mark Cave-Ayland
---
hw/misc/mac_via.c| 7 +--
hw/misc/macio/cuda.c | 3 ++-
hw/misc/macio/pmu.c | 3 ++-
hw/misc/mos6522.c| 1 -
4 files changed, 9 insertions
to IFR as necessary.
To maintain bisectibility this change also updates the SCSI, SCSI data, Nubus
and VIA2 60Hz/1Hz clocks in the q800 machine to be negative edge-triggered as
confirmed by the PCR programming in all of Linux, NetBSD and MacOS.
Signed-off-by: Mark Cave-Ayland
---
hw/m68k/q800.c
Now that the logic related to edge-triggered interrupts is all contained within
the mos6522 device the redundant implementation for the mac99 PMU device can
be removed.
Signed-off-by: Mark Cave-Ayland
---
hw/misc/macio/pmu.c | 33 -
include/hw/misc/macio
This helps to follow how the guest is programming the mos6522 when debugging.
Signed-off-by: Mark Cave-Ayland
---
hw/misc/mos6522.c| 10 --
hw/misc/trace-events | 4 ++--
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c
index
To detect edge-triggered IRQs it is necessary to store the last state of each
IRQ in a last_irq_levels bitmap.
Note: this is a migration break for machines which use mos6522 instances which
are g3beige/mac99 (PPC) and q800 (m68k).
Signed-off-by: Mark Cave-Ayland
---
hw/misc/mos6522.c
target/ppc/excp_helper.c | 197 +++
1 file changed, 197 insertions(+)
That certainly covers a good range MacOS images so I'm happy to give:
Acked-by: Mark Cave-Ayland
Just out of curiosity have you tried booting MacOS 9.2 under KVM-PR? Last time I
tried on
On 27/01/2022 23:08, Fabiano Rosas wrote:
Mark Cave-Ayland writes:
On 27/01/2022 20:11, Fabiano Rosas wrote:
Changes from v1:
- Restored the 'sc 1' support to avoid breaking the pegasos2 machine.
I tested this version in the G4 with the following OSes:
- Linux 5.15 (5.16 s
In the case where mmu_translate() returns EXCP0D_GPF ensure that
handle_mmu_fault()
returns immediately to propagate the fault back to the guest instead of
returning
EXCP0E_PAGE.
Signed-off-by: Mark Cave-Ayland
Fixes: 661ff4879e ("target/i386: extract mmu_translate")
Closes: https://
Based upon the qtest reproducer posted to Gitlab issue #663 at
https://gitlab.com/qemu-project/qemu/-/issues/663.
Signed-off-by: Mark Cave-Ayland
---
tests/qtest/am53c974-test.c | 36
1 file changed, 36 insertions(+)
diff --git a/tests/qtest/am53c974-test.c
get_cmd(), hoist the check to cancel
in-flight SCSI requests from esp_select() into get_cmd() to ensure it is always
called when executing a select command to initiate a new SCSI request.
Signed-off-by: Mark Cave-Ayland
Closes: https://gitlab.com/qemu-project/qemu/-/issues/662
Closes: https
qtest reproducer posted on issue 662 didn't
trigger the issue for me, however this fix does prevent the attached hyfuzz
image from triggering the assert).
Signed-off-by: Mark Cave-Ayland
Mark Cave-Ayland (2):
esp: ensure in-flight SCSI requests are always cancelled
qtest/am53c974-test
bits together when transmitting
data.
Add extra logic to update both transmit status bits accordingly when writing to
W_TXCTRL1 which enables the Sun PROM to initialise and boot again under QEMU.
Signed-off-by: Mark Cave-Ayland
---
hw/char/escc.c | 12
1 file changed, 12 inser
On 30/10/2021 14:29, Mark Cave-Ayland wrote:
In the case where mmu_translate() returns EXCP0D_GPF ensure that
handle_mmu_fault()
returns immediately to propagate the fault back to the guest instead of
returning
EXCP0E_PAGE.
Signed-off-by: Mark Cave-Ayland
Fixes: 661ff4879e ("target
bios queue
----
Mark Cave-Ayland (1):
roms/openbios: update OpenBIOS images to b9062dea built from submodule
pc-bios/openbios-ppc | Bin 696912 -> 696912 bytes
pc-bios/openbios-sparc32 | Bin 382048 -> 382048 bytes
pc-bios/openbios-sparc64 | Bin 1593408 ->
Signed-off-by: Mark Cave-Ayland
---
pc-bios/openbios-ppc | Bin 696912 -> 696912 bytes
pc-bios/openbios-sparc32 | Bin 382048 -> 382048 bytes
pc-bios/openbios-sparc64 | Bin 1593408 -> 1593408 bytes
roms/openbios| 2 +-
4 files changed, 1 insertion(+), 1 deletion(-)
d
cannot happen for nested
page tables, move it directly to handle_mmu_fault, even before the
invocation of mmu_translate.
Fixes: 661ff4879e ("target/i386: extract mmu_translate", 2021-05-11)
Cc: qemu-sta...@nongnu.org
Cc: Mark Cave-Ayland
Fixes: #676
Signed-off-by: Paolo Bonzini
---
t
\n%s", list);
g_free(list);
Thanks Laurent, looks good to me.
Reviewed-by: Mark Cave-Ayland
ATB,
Mark.
in that it matches the CONFIG_GBM guards
around other similar functions and the resulting binary appears to work, so:
Reviewed-by: Mark Cave-Ayland
ATB,
Mark.
On 08/11/2021 09:22, Daniel P. Berrangé wrote:
On Mon, Nov 08, 2021 at 09:17:19AM +0100, Philippe Mathieu-Daudé wrote:
+Thomas & Daniel for Travis-CI
On 11/8/21 09:12, Mark Cave-Ayland wrote:
On 05/11/2021 18:49, Philippe Mathieu-Daudé wrote:
On 11/5/21 19:26, Philippe Mathieu-Daudé w
On 29/10/2021 21:23, matheus.fe...@eldorado.org.br wrote:
From: Fernando Eckhardt Valle
Move load floating point instructions (lfs, lfsu, lfsx, lfsux, lfd, lfdu, lfdx,
lfdux)
and store floating point instructions(stfs, stfsu, stfsx, stfsux, stfd, stfdu,
stfdx,
stfdux) from legacy system to d
On 09/11/2021 17:32, Matheus K. Ferst wrote:
On 09/11/2021 10:43, Mark Cave-Ayland wrote:
On 29/10/2021 21:23, matheus.fe...@eldorado.org.br wrote:
From: Fernando Eckhardt Valle
Move load floating point instructions (lfs, lfsu, lfsx, lfsux, lfd, lfdu, lfdx,
lfdux)
and store floating
On 20/10/2021 13:57, Lucas Mateus Castro (alqotel) wrote:
From: "Lucas Mateus Castro (alqotel)"
mtfsf, mtfsfi and mtfsb1 instructions call helper_float_check_status
after updating the value of FPSCR, but helper_float_check_status
checks fp_status and fp_status isn't updated based on FPSCR and
On 09/05/2022 23:30, Daniel Henrique Barboza wrote:
On 5/9/22 18:17, Mark Cave-Ayland wrote:
On 07/05/2022 20:06, Daniel Henrique Barboza wrote:
Hi,
Since the 7.0.0 release cycle we have a desire to use the powernv
emulation with libvirt. To do that we need to enable user creatable
pnv-phb
On 05/05/2022 17:17, Bernhard Beschow wrote:
Commit 250263033c5343012b2cd6f01210ffb5b908a159 'isa: introduce wrapper
isa_connect_gpio_out' introduced it in 2016. Since then, its only user
remained mc146818rtc. Remove this one-off solution.
Signed-off-by: Bernhard Beschow
---
hw/isa/isa-bus.c
any knowledge of the internals of the artist framebuffer, but feel free
to add an:
Acked-by: Mark Cave-Ayland
when you respin the v2. It's not far off a Tested-by but I don't feel I can offer
that without being able to test a HP-UX X environment.
ATB,
Mark.
On 16/05/2022 15:43, Helge Deller wrote:
On 5/16/22 09:19, Mark Cave-Ayland wrote:
On 12/05/2022 00:50, Helge Deller wrote:
This series adds additional HP fonts to the SeaBIOS-hppa firmware.
And in the qemu artist graphics driver it:
- fixes the vertical postioning of the X11 cursor with HP
Signed-off-by: Mark Cave-Ayland
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..8367ffe1d4 100644
--- a/tests/qtest/bios-tables-test
This is in preparation for separating out the VIOT ACPI table build from the
PCI host bridge numeration.
Signed-off-by: Mark Cave-Ayland
---
hw/acpi/viot.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/acpi/viot.c b/hw/acpi/viot.c
index c1af75206e..2897aa8c88 100644
This ensures that the VIOT ACPI table output is always stable for a given PCI
topology by ensuring that entries are ordered according to min_bus.
Signed-off-by: Mark Cave-Ayland
---
hw/acpi/viot.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/hw/acpi/viot.c b/hw/acpi
Instead of generating each table entry inline, move the individual PCI host
bridge
table entry generation to a separate build_pci_host_range() function.
Signed-off-by: Mark Cave-Ayland
---
hw/acpi/viot.c | 48 +++-
1 file changed, 27 insertions
y does the right thing here. Patches 1-5
make the required changes before patch 6 updates the VIOT binary to match the
updated ACPI VIOT table ordering.
Signed-off-by: Mark Cave-Ayland
Mark Cave-Ayland (6):
hw/acpi/viot: rename build_pci_range_node() to pci_host_bridges()
hw/acpi/viot: move the
means it is no longer necessary to use a
sub-array to hold the PCI host bridge range information along with viommu_off.
Finally the PCI host bridge array is iterated again to add the required entries
to the final VIOT ACPI table.
Signed-off-by: Mark Cave-Ayland
---
hw/acpi/viot.c | 42
// 00..
+0060: 00 00 00 00 00 30 FF 30 30 00 00 00 00 00 00 00 // .0.00...
Signed-off-by: Mark Cave-Ayland
---
tests/data/acpi/q35/VIOT.viot | Bin 112 -> 112 bytes
tests/qtest/bios-tables-test-allowed-diff.h | 1 -
2 files changed, 1 deletion(-)
diff --
On 18/05/2022 12:36, Ani Sinha wrote:
On Wed, May 18, 2022 at 4:38 PM Mark Cave-Ayland
wrote:
This is in preparation for separating out the VIOT ACPI table build from the
PCI host bridge numeration.
Signed-off-by: Mark Cave-Ayland
---
hw/acpi/viot.c | 4 ++--
1 file changed, 2
On 24/04/2022 17:49, Mark Cave-Ayland wrote:
Here are the next set of patches from my ongoing work to allow the q800
machine to boot MacOS related to SCSI devices.
The first patch implements a dummy FORMAT UNIT command which is used by
the Apple HD SC Setup program when preparing an empty disk
PCI_DEVICE,
TYPE_PIIX3_PCI_DEVICE)
+#define TYPE_PIIX4_PCI_DEVICE "piix4-isa"
+
PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus);
DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus);
Reviewed-by: Mark Cave-Ayland
ATB,
Mark.
+ irq_num) & 0x03;
-/* Unknown device, don't do any translation */
-default:
-return irq_num;
-}
-}
-
DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus)
{
PIIX4State *s;
Reviewed-by: Mark Cave-Ayland
ATB,
Mark.
qdev_get_gpio_in_named(dev, "isa", 9),
NULL, 0, NULL);
}
-pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s, PIIX_NUM_PIRQS);
-
return dev;
}
As long as the error handling works as required:
Reviewed-by: Mark Cave-Ayland
ATB,
Mark.
Bus *pci_bus, ISABus **isa_bus, I2CBus **smbus);
+DeviceState *piix4_create(PCIBus *pci_bus, I2CBus **smbus);
#endif
Reviewed-by: Mark Cave-Ayland
ATB,
Mark.
On 13/05/2022 18:54, Bernhard Beschow wrote:
Initialize the SM bus just like is done for piix3 which modernizes the
code.
Signed-off-by: Bernhard Beschow
---
hw/isa/piix4.c| 15 +++
hw/mips/malta.c | 7 ++-
include/hw/southbridge/piix.h | 2 +
On 13/05/2022 18:54, Bernhard Beschow wrote:
The piix3 and piix4 southbridge devices still rely on create() functions which
are deprecated. This series resolves these functions piece by piece to
modernize the code.
Both devices are modified in lockstep where possible to provide more context.
T
#define TYPE_PIIX4_PCI_DEVICE "piix4-isa"
I think it would make sense for the movement of these types to be included in patch 1
in a single place.
-PIIX3State *piix3_create(PCIBus *pci_bus);
-
-PCIDevice *piix4_create(PCIBus *pci_bus);
-
#endif
Otherwise:
Reviewed-by: Mark Cave-Ayland
ATB,
Mark.
size = 8;
char *nodename;
Rather than using NULL as the last parameter to object_property_get_uint() I think
using &error_abort to force an explicit failure if the irq property doesn't exist
would be better.
Otherwise:
Reviewed-by: Mark Cave-Ayland
ATB,
Mark.
,7 +50,6 @@ struct RTCState {
};
#define RTC_ISA_IRQ 8
-#define RTC_ISA_BASE 0x70
... and so you'll need to keep this.
ISADevice *mc146818_rtc_init(ISABus *bus, int base_year,
qemu_irq intercept_irq);
Otherwise:
Reviewed-by: Mark Cave-Ayland
ATB,
Mark.
ard */
-isa_create_simple(s->isa_bus, "i8042");
+isa_create_simple(s->isa_bus, TYPE_I8042);
/* Floppy */
for (i = 0; i < MAX_FD; i++) {
Reviewed-by: Mark Cave-Ayland
ATB,
Mark.
NICInfo *nd,
- qemu_irq tx_irq,
- qemu_irq rx_irq,
- qemu_irq err_irq);
-
void etsec_update_irq(eTSEC *etsec);
void etsec_walk_tx_ring(eTSEC *etsec, int ring_nbr);
Reviewed-by: Mark Cave-Ayland
ATB,
Mark.
all.h| 3 ---
include/hw/i386/pc.h | 14 --
11 files changed, 23 insertions(+), 67 deletions(-)
In general these changes look okay, so I'd be fine to give an:
Acked-by: Mark Cave-Ayland
for those I haven't already given a Reviewed-by tag for.
Laurent, are yo
On 22/05/2022 10:07, Bernhard Beschow wrote:
On Sat, May 21, 2022 at 11:24 AM Mark Cave-Ayland <mailto:mark.cave-ayl...@ilande.co.uk>> wrote:
On 20/05/2022 18:45, Bernhard Beschow wrote:
> Exposing the io_base offset as a QOM property not only allows it to be
> c
On 22/05/2022 10:21, Bernhard Beschow wrote:
On Sat, May 21, 2022 at 10:39 AM Mark Cave-Ayland <mailto:mark.cave-ayl...@ilande.co.uk>> wrote:
On 13/05/2022 18:54, Bernhard Beschow wrote:
> Initialize the SM bus just like is done for piix3 which modernizes the
On 19/05/2022 08:45, Ani Sinha wrote:
On Wed, May 18, 2022 at 5:57 PM Mark Cave-Ayland
wrote:
On 18/05/2022 12:36, Ani Sinha wrote:
On Wed, May 18, 2022 at 4:38 PM Mark Cave-Ayland
wrote:
This is in preparation for separating out the VIOT ACPI table build from the
PCI host bridge
On 19/05/2022 08:50, Ani Sinha wrote:
On Wed, May 18, 2022 at 4:39 PM Mark Cave-Ayland
wrote:
This ensures that the VIOT ACPI table output is always stable for a given PCI
topology by ensuring that entries are ordered according to min_bus.
Signed-off-by: Mark Cave-Ayland
other than the
y does the right thing here. Patches 1-5
make the required changes before patch 6 updates the VIOT binary to match the
updated ACPI VIOT table ordering.
Signed-off-by: Mark Cave-Ayland
v2:
- Rebase onto master
- Rename pci_host_bridges() to enumerate_pci_host_bridges() in patch 1
- Change retu
means it is no longer necessary to use a
sub-array to hold the PCI host bridge range information along with viommu_off.
Finally the PCI host bridge array is iterated again to add the required entries
to the final VIOT ACPI table.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Ani Sinha
---
hw
This is in preparation for separating out the VIOT ACPI table build from the
PCI host bridge numeration.
Signed-off-by: Mark Cave-Ayland
---
hw/acpi/viot.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/acpi/viot.c b/hw/acpi/viot.c
index c1af75206e..a41daded71 100644
Instead of generating each table entry inline, move the individual PCI host
bridge
table entry generation to a separate build_pci_host_range() function.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Ani Sinha
---
hw/acpi/viot.c | 48 +++-
1 file
This ensures that the VIOT ACPI table output is always stable for a given PCI
topology by ensuring that entries are ordered according to min_bus.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Ani Sinha
---
hw/acpi/viot.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/hw
// 00..
+0060: 00 00 00 00 00 30 FF 30 30 00 00 00 00 00 00 00 // .0.00...
Signed-off-by: Mark Cave-Ayland
---
tests/data/acpi/q35/VIOT.viot | Bin 112 -> 112 bytes
tests/qtest/bios-tables-test-allowed-diff.h | 1 -
2 files changed, 1 deletion(-)
diff --
Signed-off-by: Mark Cave-Ayland
Acked-by: Ani Sinha
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..8367ffe1d4 100644
--- a/tests
i/q35/viot. This can be fixed by applying the series at
https://lists.gnu.org/archive/html/qemu-devel/2022-05/msg04266.html
"hw/acpi/viot: generate stable VIOT ACPI tables" first.
Signed-off-by: Mark Cave-Ayland
Mark Cave-Ayland (50):
ps2: checkpatch fixes
ps2: QOMify PS2Stat
Make PS2State a new abstract PS2_DEVICE QOM type to represent the common
functionality shared between PS2 keyboard and mouse devices.
Signed-off-by: Mark Cave-Ayland
---
hw/input/ps2.c | 28
1 file changed, 28 insertions(+)
diff --git a/hw/input/ps2.c b/hw/input
The default value for scancode_set is already set in ps2_reset() so there is no
need to duplicate this in ps2_kbd_init().
Signed-off-by: Mark Cave-Ayland
---
hw/input/ps2.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/input/ps2.c b/hw/input/ps2.c
index 5990eb6f79..555abb5392 100644
Signed-off-by: Mark Cave-Ayland
---
hw/input/ps2.c | 154 +++--
1 file changed, 86 insertions(+), 68 deletions(-)
diff --git a/hw/input/ps2.c b/hw/input/ps2.c
index c16df1de7a..67dd2eca84 100644
--- a/hw/input/ps2.c
+++ b/hw/input/ps2.c
@@ -34,41
Make PS2MouseState into a new PS2_MOUSE_DEVICE QOM type which inherits from the
abstract PS2_DEVICE type.
Signed-off-by: Mark Cave-Ayland
---
hw/input/ps2.c | 98 ++
1 file changed, 60 insertions(+), 38 deletions(-)
diff --git a/hw/input/ps2.c b
This allows the KBDState mask value to be set using a qdev property rather
than directly in i8042_mm_init().
Signed-off-by: Mark Cave-Ayland
---
hw/input/pckbd.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/hw/input/pckbd.c b/hw/input/pckbd.c
index df443aaff2
Move the QOM type definitions into the ps2.h header file to allow the new QOM
types to be used by other devices.
Signed-off-by: Mark Cave-Ayland
---
hw/input/ps2.c | 55 ---
include/hw/input/ps2.h | 58 +-
2
Make PS2KbdState into a new PS2_KBD_DEVICE QOM type which inherits from the
abstract PS2_DEVICE type.
Signed-off-by: Mark Cave-Ayland
---
hw/input/ps2.c | 104 ++---
1 file changed, 65 insertions(+), 39 deletions(-)
diff --git a/hw/input/ps2.c b/hw
.
Signed-off-by: Mark Cave-Ayland
---
hw/input/ps2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/input/ps2.c b/hw/input/ps2.c
index 1d223de59f..04360c7f74 100644
--- a/hw/input/ps2.c
+++ b/hw/input/ps2.c
@@ -1232,7 +1232,6 @@ void *ps2_kbd_init(void (*update_irq)(void *, int
alize().
Signed-off-by: Mark Cave-Ayland
---
hw/input/ps2.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/hw/input/ps2.c b/hw/input/ps2.c
index 555abb5392..2abd6510ab 100644
--- a/hw/input/ps2.c
+++ b/hw/input/ps2.c
@@ -1213,6 +1213,11 @@ static QemuInputHa
With the latest changes it is now possible to improve some of the function
prototypes in ps2.c and ps.h to use the appropriate PS2KbdState or
PS2MouseState type instead of being a void opaque.
Signed-off-by: Mark Cave-Ayland
---
hw/input/ps2.c | 22 +-
include/hw
legacy update_irq()
function to use gpios instead.
Signed-off-by: Mark Cave-Ayland
---
hw/input/ps2.c | 21 +++--
include/hw/input/ps2.h | 4
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/hw/input/ps2.c b/hw/input/ps2.c
index 214dda60bf..891eb7181c
.
Signed-off-by: Mark Cave-Ayland
---
hw/input/ps2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/input/ps2.c b/hw/input/ps2.c
index 04360c7f74..e3ee69870b 100644
--- a/hw/input/ps2.c
+++ b/hw/input/ps2.c
@@ -1262,7 +1262,6 @@ void *ps2_mouse_init(void (*update_irq)(void *, int
This is in preparation for allowing the new PS2_KBD_DEVICE and PS2_MOUSE_DEVICE
QOM types to reference the parent PS2_DEVICE device reset() function.
Signed-off-by: Mark Cave-Ayland
---
include/hw/input/ps2.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/include/hw
alize().
Signed-off-by: Mark Cave-Ayland
---
hw/input/ps2.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/hw/input/ps2.c b/hw/input/ps2.c
index 2abd6510ab..1d223de59f 100644
--- a/hw/input/ps2.c
+++ b/hw/input/ps2.c
@@ -1244,6 +1244,11 @@ static QemuInputHa
the same time update lasips2_initfn() return the LASIPS2 device so that it
can later be accessed using qdev APIs by the HPPA machine.
Signed-off-by: Mark Cave-Ayland
---
hw/hppa/machine.c | 4 ++--
hw/input/lasips2.c | 6 --
include/hw/input/lasips2.h | 3 ++-
3 files
This helps improve the readability of lasips2.c.
Signed-off-by: Mark Cave-Ayland
---
hw/input/lasips2.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/input/lasips2.c b/hw/input/lasips2.c
index 94f18be4cd..2ac3433014 100644
--- a/hw/input/lasips2.c
+++ b/hw/input
1601 - 1700 of 5751 matches
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