Hai Everyone, Please send me your best *SystemVerilog candidate*. * I have included a list of questions to be answered as well.* Please send candidate resume, contact info, and rate.
San Diego, CA. SystemVerilog VMM Design Verification Specialist Detailed skills set and tools expertise required: • Ideal candidate would have 7+ years verification experience coupled with expertise in SystemVerilog and VMM over the last 2-3 years. • Career design verification engineer (5-10 years experience) with full chip level verification experience. • Expertise (multi-year) in VMM methodology, including latest revision (1.2) • Proven ability to set up SystemVerilog/VMM verification environment, top level test benches, simulations, test code coverage, debug. • Create and execute complex ASIC verification plans. • Technical expert in creating/enhancing tools/scripts and overall verification environment. • Strongly desired: Domain knowledge/expertise in Bluetooth, 802.11, WLAN, MAC and PHY verification. How many years experience with full chip level verification do you have? How many years experience with Verification Methodology Manual (VMM) do you have? Can you set up SystemVerilog/VMM verification environment, top level test benches, simulations, test code coverage, debug, etc.? Can you create and execute complex verification plans? Are you an expert in creating/enhancing tools/scripts and overall verification environment? Do you have experience/expertise in Bluetooth, 802.11, WLAN, MAC and PHY verification? -- Thanks & Regards, Tommy jibin Technical Recruiter Hi-range Technologies Ltd 906 Lacey Avenue Suite 106 Lisle; Illinois:60532 Ph: 630 929 5198 Fax: 630-969-2722 www.hirange.net to...@hirange.net -- You received this message because you are subscribed to the Google Groups "SAP ABAP" group. To post to this group, send email to sap-a...@googlegroups.com. To unsubscribe from this group, send email to sap-abap+unsubscr...@googlegroups.com. For more options, visit this group at http://groups.google.com/group/sap-abap?hl=en.