*Hi, * *Hope you are doing great!!*
*We have urgent requirement for the below position.* *If you have any excellent match for this position * *please send me resume and contact details* *Please reply at **a...@tresourceinc.com <a...@tresourceinc.com> for quick response* *SOC verification engineer- San Diego, CA* *we need someone can join within 15 days * *PHONE/SKYPE* *Title: ASIC/SoC Verification Engineer * *Location: San Diego, CA* *Duration: 6+ months can extent further * *Visa requirement: H1-B, GC, Citizen, EAD* *Job Description: * *· Skills/Experience Strong verification skills: * *· 4+ years of experience in digital design & verification.* *· Test planning, problem solving, debug, adversarial testing.* *· Strong working knowledge of System Verilog Testbench, UVM methodology* *· Low Power design concepts, Low Power Verification Methodology* *· Verification of high-speed parallel/serial IO interfaces such as D-PHY, M-PHY, SATA, Display Port, PCIe, USB2.0, USB3.0, HDMI experience is plus* *· Mixed signal methodology experience(spice in the leaf, spice in the middle) in addition behavioural modelled mixed signal verification is added advantage* *· Experience is Analog behavioural modelling using Real Number Modelling, VerilogA is added advantage* *· FPGA emulation experience is added advantage* *· Excellent communication and teamwork skills* *· B.E/M.E. in Electronics or Computer Science * *Responsibilities: * *You will be responsible for understanding the Analog-digital partition at system level, develop testplan for functional and circuit performance verification, develop the scalable testbench using the SVTB-UVM, test case development, debugging, coverage model development, coverage closure. You will be working with Analog circuit design team, digital design team, Analog modelling, characterization team, SoC integration team to complete the successful core level verification, integration into SoC, post-silicon validation.* *Keywords: system Verilog, Low Power, UVM, AMS, Ethernet, USB2.0, USB3.0, SGMII, PCIe, UFS, DDR* *Thanks & Regards* *Amandeep singh Bali* *Sr. Resource Specialist* *1700 Park St| Unit 212|* *|Naperville IL|60563* Office: 408-709-1760 Ext: 9669 Direct: 408-426-2031 -- You received this message because you are subscribed to the Google Groups "SAP BASIS" group. To unsubscribe from this group and stop receiving emails from it, send an email to sap-basis+unsubscr...@googlegroups.com. To post to this group, send email to sap-basis@googlegroups.com. Visit this group at https://groups.google.com/group/sap-basis. For more options, visit https://groups.google.com/d/optout.
