Re: [SeaBIOS] [PATCH] piix: do not reset APIC base address (0x80) on piix4_reset.

2013-12-18 Thread Michael S. Tsirkin
On Wed, Dec 18, 2013 at 03:22:59PM +0100, Paolo Bonzini wrote: Il 11/12/2013 10:21, Gal Hammer ha scritto: Fix a bug that was introduced in commit c046e8c4. QEMU fails to resume from suspend mode (S3). Signed-off-by: Gal Hammer gham...@redhat.com --- hw/acpi/piix4.c | 1 - 1 file

Re: [SeaBIOS] [Qemu-devel] [PATCH] piix: do not reset APIC base address (0x80) on piix4_reset.

2013-12-18 Thread Michael S. Tsirkin
On Wed, Dec 18, 2013 at 06:27:12PM +0200, Marcel Apfelbaum wrote: On Wed, 2013-12-18 at 17:22 +0200, Michael S. Tsirkin wrote: On Wed, Dec 18, 2013 at 03:22:59PM +0100, Paolo Bonzini wrote: Il 11/12/2013 10:21, Gal Hammer ha scritto: Fix a bug that was introduced in commit c046e8c4. QEMU

Re: [SeaBIOS] [Qemu-devel] [PATCH] piix: do not reset APIC base address (0x80) on piix4_reset.

2013-12-18 Thread Michael S. Tsirkin
On Wed, Dec 18, 2013 at 11:34:14AM -0500, Paolo Bonzini wrote: - Messaggio originale - Da: Michael S. Tsirkin m...@redhat.com A: marcel a marce...@redhat.com Cc: Paolo Bonzini pbonz...@redhat.com, Gal Hammer gham...@redhat.com, seabios@seabios.org, qemu-de...@nongnu.org

Re: [SeaBIOS] [PATCH] piix: do not reset APIC base address (0x80) on piix4_reset.

2013-12-18 Thread Gal Hammer
On 18/12/2013 16:22, Paolo Bonzini wrote: Il 11/12/2013 10:21, Gal Hammer ha scritto: Fix a bug that was introduced in commit c046e8c4. QEMU fails to resume from suspend mode (S3). Signed-off-by: Gal Hammer gham...@redhat.com --- hw/acpi/piix4.c | 1 - 1 file changed, 1 deletion(-) diff

Re: [SeaBIOS] [Qemu-devel] [PATCH] piix: do not reset APIC base address (0x80) on piix4_reset.

2013-12-18 Thread Marcel Apfelbaum
On Wed, 2013-12-18 at 11:34 -0500, Paolo Bonzini wrote: - Messaggio originale - Da: Michael S. Tsirkin m...@redhat.com A: marcel a marce...@redhat.com Cc: Paolo Bonzini pbonz...@redhat.com, Gal Hammer gham...@redhat.com, seabios@seabios.org, qemu-de...@nongnu.org Inviato:

Re: [SeaBIOS] [PATCH] piix: do not reset APIC base address (0x80) on piix4_reset.

2013-12-18 Thread Paolo Bonzini
Il 18/12/2013 16:59, Gal Hammer ha scritto: Note this is not the APIC base address, that one is 80h on the ISA bridge (function 0). You're changing the behavior for 80h on the power management function, which is function 3. The register is PMBA—POWER MANAGEMENT BASE ADDRESS and it is indeed

Re: [SeaBIOS] [Qemu-devel] [PATCH] piix: do not reset APIC base address (0x80) on piix4_reset.

2013-12-18 Thread Marcel Apfelbaum
On Wed, 2013-12-18 at 18:33 +0200, Michael S. Tsirkin wrote: On Wed, Dec 18, 2013 at 06:27:12PM +0200, Marcel Apfelbaum wrote: On Wed, 2013-12-18 at 17:22 +0200, Michael S. Tsirkin wrote: On Wed, Dec 18, 2013 at 03:22:59PM +0100, Paolo Bonzini wrote: Il 11/12/2013 10:21, Gal Hammer ha

Re: [SeaBIOS] [Qemu-devel] [PATCH] piix: do not reset APIC base address (0x80) on piix4_reset.

2013-12-18 Thread Laszlo Ersek
On 12/18/13 17:34, Paolo Bonzini wrote: - Messaggio originale - Da: Michael S. Tsirkin m...@redhat.com A: marcel a marce...@redhat.com Cc: Paolo Bonzini pbonz...@redhat.com, Gal Hammer gham...@redhat.com, seabios@seabios.org, qemu-de...@nongnu.org Inviato: Mercoledì, 18

Re: [SeaBIOS] [Qemu-devel] [PATCH] piix: do not reset APIC base address (0x80) on piix4_reset.

2013-12-18 Thread Laszlo Ersek
On 12/18/13 23:10, Laszlo Ersek wrote: 1. SEC after cold boot 2. PEI after cold boot 2.5 DXE IPL PEIM loads DXE core 3. DXE after cold boot 4. BDS after cold boot 5. runtime (OSPM), normal entry 6. PEI after S3 resume 6.5 DXE IPL PEIM branches to S3 resume PEIM 7. runtime (OSPM), entry

Re: [SeaBIOS] [Qemu-devel] [PATCH] piix: do not reset APIC base address (0x80) on piix4_reset.

2013-12-18 Thread Paolo Bonzini
Il 18/12/2013 23:10, Laszlo Ersek ha scritto: So, if PEI must do something after S3 resume that is independent of any DXE drivers, it can simply do it. The boot script is only necessary when the S3 resume PEI actions (in step 6) need to depend on earlier actions during DXE (step 3). In