[SeaBIOS] Problem with boot coreboot

Hello friends I compiled coreboot and seabios based on https://review.coreboot.org/cgit/board-status.git/plain/intel/minnowmax/4.5-306-g00ad7ff/2016-11-17T17_00_43Z/ but my Freebsd or grub2 or Debian or ubuntu did not boot and it shows this message. Running option rom at c000:0003 Turning on v

[SeaBIOS] enable log path of devices in seabios

Hello Friends I want to enable a log that show path of devices that by seabios was recognize . this paths are different from boot default paths. Could you suggest me a advice? Thank you, Zahra ___ SeaBIOS mailing list SeaBIOS@seabios.org https://mail

[SeaBIOS] Error Data Hob

Hello Friends , I compiled Coreboot 4.5 and seabios for Minnow board max and see this message in consol. "Memory Configure Data Hob is not present. Not updating MRC data in flash." what is Data Hob? what is MRC data؟ Cold you help me how to solve it? Best wishes , Zhara

[SeaBIOS] How to add support for PCIe bridge to coreboot on Baytrial SoC

I Compiled Coreboot with Seabios and Tianocore payload on Baytrail SoC. I want to use a [PCIe bridge][3] to convert a PCIE-x1 to 2 PCIE-X1 connectors but booting FreeBSD won't show any active bridge. The [Baytrail SoC documentation][1] states that a register called [SLCTL_SLSTS][2] should be set i