On 13/08/19 18:18, Bob Supnik wrote:
ith Rich Cornwell's recent work, it's clear that the DECtape controllers
should have been abstracted to a library ten years ago, but doing so
would be a major PITA, now that there are six (at least) distinct
implementations (PDP1, PDP18b, PDP11, PDP8 TC, PDP
Well, no. It's a PDP-8/A as initially released and documented in the
late 1976 PDP-8/A manuals and schematics. That machine was limited to
32KW. So was the initial, 1976 version of the FPP8-A.
The KT8-A was released in mid 1978. It expanded memory capability to
128KW and added a number of othe
> The reason there are two DECtape controllers in the current PDP-8
> simulator is that one is block-by-block (TC) and the other is line-by-line
> (TD), where "line" is 3 bits! That means there is a device driver in
> TD-aware PDP-8 software that has to assemble incoming data 3 bits at a time!
>
>
On Tue, Aug 13, 2019 at 10:18 AM Bob Supnik wrote:
> As was pointed out, the existing PDP-8 CPU is basically a PDP-8/E or
> -8/A.
It's a mongrel. SIMH's FPP (floating point processor) peripheral emulates
the version for the 8/a, but memory is limited to 32 kWords as in all
models before the 8/a
> On Aug 13, 2019, at 12:25 PM, Richard Cornwell wrote:
>
> Hi Bob,
>
>
>> ...
>> I looked at a PDP-12 implementation. It's not hard, but I really
>> didn't want to do Yet Another DECtape Simulator for Linctape. With
>> Rich Cornwell's recent work, it's clear that the DECtape controllers
>> s
Hi Bob,
> As was pointed out, the existing PDP-8 CPU is basically a PDP-8/E or
> -8/A. It doesn't have the model-specific capabilities of the current
> PDP-11 CPU simulator.
>
> Making the PDP-8 "model specific" is a bit more difficult than just
> putting in model tests at various points in t
As was pointed out, the existing PDP-8 CPU is basically a PDP-8/E or
-8/A. It doesn't have the model-specific capabilities of the current
PDP-11 CPU simulator.
Making the PDP-8 "model specific" is a bit more difficult than just
putting in model tests at various points in the CPU. The periphera