Module Name:src
Committed By: rin
Date: Sat Jun 29 06:52:34 UTC 2024
Modified Files:
src/lib/libc/arch/vax/gen: __longjmp14.c _setjmp.S
Log Message:
vax: {,_}longjmp(3): Return 1 if `val` == 0
Found by tests/lib/libc/setjmp/t_setjmp:{,_}longjmp_zero.
To generate a diff
Module Name:src
Committed By: rin
Date: Sat Jun 29 06:52:34 UTC 2024
Modified Files:
src/lib/libc/arch/vax/gen: __longjmp14.c _setjmp.S
Log Message:
vax: {,_}longjmp(3): Return 1 if `val` == 0
Found by tests/lib/libc/setjmp/t_setjmp:{,_}longjmp_zero.
To generate a diff
Module Name:src
Committed By: skrll
Date: Thu May 30 15:56:43 UTC 2024
Modified Files:
src/lib/libc/arch/riscv: genassym.cf
src/lib/libc/arch/riscv/sys: __sigtramp2.S
Log Message:
Annotate the RISC-V signal trampoline with CFI attributes.
To generate a diff of
Module Name:src
Committed By: skrll
Date: Tue May 28 06:57:17 UTC 2024
Modified Files:
src/lib/libc/arch/riscv/sys: __sigtramp2.S
Log Message:
Change MIPS to RISC-V.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/lib/libc/arch/riscv/sys/__sigtramp2.S
Module Name:src
Committed By: skrll
Date: Tue May 28 06:57:17 UTC 2024
Modified Files:
src/lib/libc/arch/riscv/sys: __sigtramp2.S
Log Message:
Change MIPS to RISC-V.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/lib/libc/arch/riscv/sys/__sigtramp2.S
Module Name:src
Committed By: riastradh
Date: Thu May 16 01:02:35 UTC 2024
Modified Files:
src/lib/libc/arch/riscv/gen: fpgetsticky.c fpsetsticky.c
Log Message:
riscv: More shiftiness reduction around FCSR in libc.
To generate a diff of this commit:
cvs rdiff -u -r1.3
Module Name:src
Committed By: riastradh
Date: Thu May 16 01:02:35 UTC 2024
Modified Files:
src/lib/libc/arch/riscv/gen: fpgetsticky.c fpsetsticky.c
Log Message:
riscv: More shiftiness reduction around FCSR in libc.
To generate a diff of this commit:
cvs rdiff -u -r1.3
Module Name:src
Committed By: riastradh
Date: Thu May 16 00:56:11 UTC 2024
Modified Files:
src/lib/libc/arch/riscv/gen: fpgetround.c fpsetround.c
Log Message:
riscv: Nix shifting around FRRM and FSRM in libc too.
These read and write the floating-point rounding mode
Module Name:src
Committed By: riastradh
Date: Thu May 16 00:56:11 UTC 2024
Modified Files:
src/lib/libc/arch/riscv/gen: fpgetround.c fpsetround.c
Log Message:
riscv: Nix shifting around FRRM and FSRM in libc too.
These read and write the floating-point rounding mode
Module Name:src
Committed By: skrll
Date: Sat May 11 07:40:18 UTC 2024
Modified Files:
src/lib/libc/arch/riscv/gen: fpsetmask.c
Log Message:
Do the '#if FCSR_FMASK == 0' thing that fpgetmask.c does for consistency.
To generate a diff of this commit:
cvs rdiff -u -r1.3
Module Name:src
Committed By: skrll
Date: Sat May 11 07:40:18 UTC 2024
Modified Files:
src/lib/libc/arch/riscv/gen: fpsetmask.c
Log Message:
Do the '#if FCSR_FMASK == 0' thing that fpgetmask.c does for consistency.
To generate a diff of this commit:
cvs rdiff -u -r1.3
Module Name:src
Committed By: skrll
Date: Mon May 6 06:57:32 UTC 2024
Modified Files:
src/lib/libc/arch/arm/gen: setjmp.S
Log Message:
arm longjmp: Restore stack first, then signal mask.
Otherwise, a pending signal may be delivered on the wrong stack when
we restore the
Module Name:src
Committed By: skrll
Date: Mon May 6 06:57:32 UTC 2024
Modified Files:
src/lib/libc/arch/arm/gen: setjmp.S
Log Message:
arm longjmp: Restore stack first, then signal mask.
Otherwise, a pending signal may be delivered on the wrong stack when
we restore the
Module Name:src
Committed By: skrll
Date: Sat May 4 14:48:28 UTC 2024
Modified Files:
src/lib/libc/arch/hppa/gen: _setjmp.S
Log Message:
Remove magic numbers. NFCI.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/lib/libc/arch/hppa/gen/_setjmp.S
Please
Module Name:src
Committed By: skrll
Date: Sat May 4 12:43:36 UTC 2024
Modified Files:
src/lib/libc/arch/riscv/gen: makecontext.c
Log Message:
makecontext: correct the type to setup register based arguments.
Use __greg_t rather than int for register based arguments. This
Module Name:src
Committed By: skrll
Date: Sat May 4 12:43:36 UTC 2024
Modified Files:
src/lib/libc/arch/riscv/gen: makecontext.c
Log Message:
makecontext: correct the type to setup register based arguments.
Use __greg_t rather than int for register based arguments. This
Module Name:src
Committed By: skrll
Date: Sat Apr 20 14:09:40 UTC 2024
Modified Files:
src/lib/libc/arch/hppa: genassym.cf
src/lib/libc/arch/hppa/gen: __setjmp14.S
Log Message:
Remove some magic numbers by using genassym.cf
To generate a diff of this commit:
cvs
Module Name:src
Committed By: skrll
Date: Sat Apr 20 14:09:40 UTC 2024
Modified Files:
src/lib/libc/arch/hppa: genassym.cf
src/lib/libc/arch/hppa/gen: __setjmp14.S
Log Message:
Remove some magic numbers by using genassym.cf
To generate a diff of this commit:
cvs
Module Name:src
Committed By: rillig
Date: Tue Apr 2 20:42:13 UTC 2024
Modified Files:
src/lib/libc/arch/sparc/gen: fpsetround.c
Log Message:
sparc/fpsetround: fix the nearby signed integer overflow as well
Same as for sparc64 a few days ago.
To generate a diff of
Module Name:src
Committed By: rillig
Date: Tue Apr 2 20:42:13 UTC 2024
Modified Files:
src/lib/libc/arch/sparc/gen: fpsetround.c
Log Message:
sparc/fpsetround: fix the nearby signed integer overflow as well
Same as for sparc64 a few days ago.
To generate a diff of
Module Name:src
Committed By: christos
Date: Tue Apr 2 20:27:44 UTC 2024
Modified Files:
src/lib/libc/arch/sparc/gen: fpsetround.c
Log Message:
fix lint
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/lib/libc/arch/sparc/gen/fpsetround.c
Please note
Module Name:src
Committed By: christos
Date: Tue Apr 2 20:27:44 UTC 2024
Modified Files:
src/lib/libc/arch/sparc/gen: fpsetround.c
Log Message:
fix lint
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/lib/libc/arch/sparc/gen/fpsetround.c
Please note
Module Name:src
Committed By: rillig
Date: Wed Mar 20 06:15:40 UTC 2024
Modified Files:
src/lib/libc/arch/sparc64/gen: fpsetround.c
Log Message:
sparc64/fpsetround: avoid shifting into the sign bit
Lint had warned about the constant expression '0x03 << 30' but not about
Module Name:src
Committed By: rillig
Date: Wed Mar 20 06:15:40 UTC 2024
Modified Files:
src/lib/libc/arch/sparc64/gen: fpsetround.c
Log Message:
sparc64/fpsetround: avoid shifting into the sign bit
Lint had warned about the constant expression '0x03 << 30' but not about
Module Name:src
Committed By: christos
Date: Mon Mar 11 23:05:35 UTC 2024
Modified Files:
src/lib/libc/arch/sparc64/gen: fpsetround.c
Log Message:
fix lint
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/lib/libc/arch/sparc64/gen/fpsetround.c
Please
Module Name:src
Committed By: christos
Date: Mon Mar 11 23:05:35 UTC 2024
Modified Files:
src/lib/libc/arch/sparc64/gen: fpsetround.c
Log Message:
fix lint
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/lib/libc/arch/sparc64/gen/fpsetround.c
Please
Module Name:src
Committed By: uwe
Date: Tue Feb 20 00:09:31 UTC 2024
Modified Files:
src/lib/libc/arch/sparc/gen: longjmp.c
Log Message:
fix typo in comment
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/lib/libc/arch/sparc/gen/longjmp.c
Please note
Module Name:src
Committed By: uwe
Date: Tue Feb 20 00:09:31 UTC 2024
Modified Files:
src/lib/libc/arch/sparc/gen: longjmp.c
Log Message:
fix typo in comment
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/lib/libc/arch/sparc/gen/longjmp.c
Please note
Module Name:src
Committed By: skrll
Date: Wed Oct 11 09:12:21 UTC 2023
Modified Files:
src/lib/libc/arch/ia64/gen: setjmp.S
src/lib/libc/arch/or1k/gen: __setjmp14.S
src/lib/libc/arch/powerpc/gen: __setjmp14.S __sigsetjmp14.S
Module Name:src
Committed By: skrll
Date: Wed Oct 11 09:12:21 UTC 2023
Modified Files:
src/lib/libc/arch/ia64/gen: setjmp.S
src/lib/libc/arch/or1k/gen: __setjmp14.S
src/lib/libc/arch/powerpc/gen: __setjmp14.S __sigsetjmp14.S
Module Name:src
Committed By: skrll
Date: Wed Oct 11 06:16:13 UTC 2023
Modified Files:
src/lib/libc/arch/sparc64/gen: setjmp.S
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/lib/libc/arch/sparc64/gen/setjmp.S
Please
Module Name:src
Committed By: skrll
Date: Wed Oct 11 06:16:13 UTC 2023
Modified Files:
src/lib/libc/arch/sparc64/gen: setjmp.S
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/lib/libc/arch/sparc64/gen/setjmp.S
Please
Module Name:src
Committed By: skrll
Date: Wed Oct 11 06:15:57 UTC 2023
Modified Files:
src/lib/libc/arch/powerpc64/gen: __setjmp14.S
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/lib/libc/arch/powerpc64/gen/__setjmp14.S
Module Name:src
Committed By: skrll
Date: Wed Oct 11 06:15:57 UTC 2023
Modified Files:
src/lib/libc/arch/powerpc64/gen: __setjmp14.S
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/lib/libc/arch/powerpc64/gen/__setjmp14.S
Module Name:src
Committed By: skrll
Date: Wed Oct 11 06:15:37 UTC 2023
Modified Files:
src/lib/libc/arch/ia64/gen: setjmp.S
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/lib/libc/arch/ia64/gen/setjmp.S
Please note that
Module Name:src
Committed By: skrll
Date: Wed Oct 11 06:15:37 UTC 2023
Modified Files:
src/lib/libc/arch/ia64/gen: setjmp.S
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/lib/libc/arch/ia64/gen/setjmp.S
Please note that
Module Name:src
Committed By: rin
Date: Thu Sep 14 03:58:50 UTC 2023
Modified Files:
src/lib/libc/arch/or1k/gen: Makefile.inc
src/lib/libc/arch/powerpc64/gen: Makefile.inc
src/lib/libc/arch/riscv/gen: Makefile.inc
Log Message:
libc/arch: Fix copy-paste;
Module Name:src
Committed By: rin
Date: Thu Sep 14 03:58:50 UTC 2023
Modified Files:
src/lib/libc/arch/or1k/gen: Makefile.inc
src/lib/libc/arch/powerpc64/gen: Makefile.inc
src/lib/libc/arch/riscv/gen: Makefile.inc
Log Message:
libc/arch: Fix copy-paste;
Module Name:src
Committed By: mrg
Date: Sun Sep 3 21:41:45 UTC 2023
Modified Files:
src/lib/libc/arch/sparc: Makefile.inc
src/lib/libc/arch/sparc/gen: Makefile.inc longjmp.c setjmp.S
Added Files:
src/lib/libc/arch/sparc: genassym.cf
Module Name:src
Committed By: mrg
Date: Sun Sep 3 21:41:45 UTC 2023
Modified Files:
src/lib/libc/arch/sparc: Makefile.inc
src/lib/libc/arch/sparc/gen: Makefile.inc longjmp.c setjmp.S
Added Files:
src/lib/libc/arch/sparc: genassym.cf
Module Name:src
Committed By: skrll
Date: Sun Jul 23 07:25:04 UTC 2023
Modified Files:
src/lib/libc/arch/aarch64: SYS.h
src/lib/libc/arch/arm: SYS.h
Log Message:
ENTRY / END indentation. NFCI.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4
Module Name:src
Committed By: skrll
Date: Sun Jul 23 07:25:04 UTC 2023
Modified Files:
src/lib/libc/arch/aarch64: SYS.h
src/lib/libc/arch/arm: SYS.h
Log Message:
ENTRY / END indentation. NFCI.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4
Module Name:src
Committed By: skrll
Date: Sun Jul 23 07:24:20 UTC 2023
Modified Files:
src/lib/libc/arch/mips: SYS.h
Log Message:
Indentation consistency. NFCI.
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/lib/libc/arch/mips/SYS.h
Please note that
Module Name:src
Committed By: skrll
Date: Sun Jul 23 07:24:20 UTC 2023
Modified Files:
src/lib/libc/arch/mips: SYS.h
Log Message:
Indentation consistency. NFCI.
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/lib/libc/arch/mips/SYS.h
Please note that
Module Name:src
Committed By: skrll
Date: Fri May 19 06:41:41 UTC 2023
Modified Files:
src/lib/libc/arch/riscv: SYS.h
Log Message:
No need for double semi-colon
Indent END the same as ENTRY.
NFCI.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5
Module Name:src
Committed By: skrll
Date: Fri May 19 06:41:41 UTC 2023
Modified Files:
src/lib/libc/arch/riscv: SYS.h
Log Message:
No need for double semi-colon
Indent END the same as ENTRY.
NFCI.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5
Module Name:src
Committed By: skrll
Date: Fri May 19 06:31:01 UTC 2023
Modified Files:
src/lib/libc/arch/riscv: genassym.cf
Log Message:
KNF
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/lib/libc/arch/riscv/genassym.cf
Please note that diffs are not
Module Name:src
Committed By: skrll
Date: Fri May 19 06:31:01 UTC 2023
Modified Files:
src/lib/libc/arch/riscv: genassym.cf
Log Message:
KNF
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/lib/libc/arch/riscv/genassym.cf
Please note that diffs are not
Module Name:src
Committed By: skrll
Date: Sun Apr 2 07:26:18 UTC 2023
Modified Files:
src/lib/libc/arch/i386/gen: _lwp.c
src/lib/libc/arch/m68k/gen: _lwp.c
src/lib/libc/arch/vax/gen: _lwp.c
src/lib/libc/arch/x86_64/gen: _lwp.c
Log Message:
Module Name:src
Committed By: skrll
Date: Sun Apr 2 07:26:18 UTC 2023
Modified Files:
src/lib/libc/arch/i386/gen: _lwp.c
src/lib/libc/arch/m68k/gen: _lwp.c
src/lib/libc/arch/vax/gen: _lwp.c
src/lib/libc/arch/x86_64/gen: _lwp.c
Log Message:
Module Name:src
Committed By: skrll
Date: Tue Dec 13 12:43:32 UTC 2022
Modified Files:
src/lib/libc/arch/arm/gen: setjmp.S
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.17 -r1.18 src/lib/libc/arch/arm/gen/setjmp.S
Please note that
Module Name:src
Committed By: skrll
Date: Tue Dec 13 12:43:32 UTC 2022
Modified Files:
src/lib/libc/arch/arm/gen: setjmp.S
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.17 -r1.18 src/lib/libc/arch/arm/gen/setjmp.S
Please note that
Module Name:src
Committed By: skrll
Date: Sat Dec 3 14:04:39 UTC 2022
Modified Files:
src/lib/libc/arch/mips/sys: cerror.S
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/lib/libc/arch/mips/sys/cerror.S
Please note
Module Name:src
Committed By: skrll
Date: Sat Dec 3 14:04:39 UTC 2022
Modified Files:
src/lib/libc/arch/mips/sys: cerror.S
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/lib/libc/arch/mips/sys/cerror.S
Please note
Module Name:src
Committed By: skrll
Date: Sat Dec 3 09:38:53 UTC 2022
Modified Files:
src/lib/libc/arch/riscv/gdtoa: gd_qnan.h
src/lib/libc/arch/riscv/gen: fpgetmask.c fpgetround.c fpgetsticky.c
fpsetmask.c fpsetround.c fpsetsticky.c resumecontext.c
Module Name:src
Committed By: skrll
Date: Sat Dec 3 09:38:53 UTC 2022
Modified Files:
src/lib/libc/arch/riscv/gdtoa: gd_qnan.h
src/lib/libc/arch/riscv/gen: fpgetmask.c fpgetround.c fpgetsticky.c
fpsetmask.c fpsetround.c fpsetsticky.c resumecontext.c
Module Name:src
Committed By: skrll
Date: Mon Jun 6 06:32:44 UTC 2022
Modified Files:
src/lib/libc/arch/hppa/sys: ptrace.S
Log Message:
Save and restore %r19 the "linkage table pointer register" across the call
to __cerror so if the ptrace syscall fails we can call
Module Name:src
Committed By: rin
Date: Mon May 30 14:43:37 UTC 2022
Modified Files:
src/lib/libc/arch/powerpc/string: Makefile.inc
Log Message:
Obsolete hack for evbppc to replace memcmp(9), memcpy(9), and memmove(9)
with strictly-aligned versions.
Now all 32-bit
Module Name:src
Committed By: rin
Date: Mon May 30 14:43:37 UTC 2022
Modified Files:
src/lib/libc/arch/powerpc/string: Makefile.inc
Log Message:
Obsolete hack for evbppc to replace memcmp(9), memcpy(9), and memmove(9)
with strictly-aligned versions.
Now all 32-bit
Module Name:src
Committed By: skrll
Date: Sat Nov 27 10:00:01 UTC 2021
Modified Files:
src/lib/libc/arch/arm/sys: __sigtramp2.S
src/lib/libc/arch/powerpc/sys: __sigtramp2.S
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.4
Module Name:src
Committed By: skrll
Date: Sat Nov 27 10:00:01 UTC 2021
Modified Files:
src/lib/libc/arch/arm/sys: __sigtramp2.S
src/lib/libc/arch/powerpc/sys: __sigtramp2.S
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.4
Module Name:src
Committed By: thorpej
Date: Wed Nov 24 15:05:16 UTC 2021
Modified Files:
src/lib/libc/arch/vax: genassym.cf
src/lib/libc/arch/vax/sys: __sigtramp3.S
Log Message:
Decorate the VAX signal trampoline with the appropriate .cfi
directives to allow
Module Name:src
Committed By: thorpej
Date: Wed Nov 24 15:05:16 UTC 2021
Modified Files:
src/lib/libc/arch/vax: genassym.cf
src/lib/libc/arch/vax/sys: __sigtramp3.S
Log Message:
Decorate the VAX signal trampoline with the appropriate .cfi
directives to allow
Module Name:src
Committed By: thorpej
Date: Wed Nov 24 02:01:15 UTC 2021
Modified Files:
src/lib/libc/arch/sh3: Makefile.inc
src/lib/libc/arch/sh3/sys: __sigtramp2.S
Added Files:
src/lib/libc/arch/sh3: genassym.cf
Log Message:
Decorate the SuperH signal
Module Name:src
Committed By: thorpej
Date: Wed Nov 24 02:01:15 UTC 2021
Modified Files:
src/lib/libc/arch/sh3: Makefile.inc
src/lib/libc/arch/sh3/sys: __sigtramp2.S
Added Files:
src/lib/libc/arch/sh3: genassym.cf
Log Message:
Decorate the SuperH signal
Module Name:src
Committed By: thorpej
Date: Tue Nov 23 18:45:53 UTC 2021
Modified Files:
src/lib/libc/arch/arm: genassym.cf
src/lib/libc/arch/arm/sys: __sigtramp2.S
Log Message:
Decorate the ARM signal trampoline with the appropriate .cfi
directives to allow
Module Name:src
Committed By: thorpej
Date: Tue Nov 23 18:45:53 UTC 2021
Modified Files:
src/lib/libc/arch/arm: genassym.cf
src/lib/libc/arch/arm/sys: __sigtramp2.S
Log Message:
Decorate the ARM signal trampoline with the appropriate .cfi
directives to allow
Module Name:src
Committed By: thorpej
Date: Tue Nov 23 02:49:56 UTC 2021
Modified Files:
src/lib/libc/arch/aarch64: genassym.cf
src/lib/libc/arch/aarch64/sys: __sigtramp2.S
Log Message:
Because the PC is not a general purpose register on aarch64, we need
to use
Module Name:src
Committed By: thorpej
Date: Tue Nov 23 02:49:56 UTC 2021
Modified Files:
src/lib/libc/arch/aarch64: genassym.cf
src/lib/libc/arch/aarch64/sys: __sigtramp2.S
Log Message:
Because the PC is not a general purpose register on aarch64, we need
to use
Module Name:src
Committed By: thorpej
Date: Sun Nov 21 23:58:09 UTC 2021
Modified Files:
src/lib/libc/arch/m68k: genassym.cf
src/lib/libc/arch/m68k/sys: __sigtramp2.S
Log Message:
Decorate the m68k signal trampoline with the appropriate .cfi
directives to allow
Module Name:src
Committed By: thorpej
Date: Sun Nov 21 23:58:09 UTC 2021
Modified Files:
src/lib/libc/arch/m68k: genassym.cf
src/lib/libc/arch/m68k/sys: __sigtramp2.S
Log Message:
Decorate the m68k signal trampoline with the appropriate .cfi
directives to allow
Module Name:src
Committed By: thorpej
Date: Sun Nov 21 21:31:25 UTC 2021
Modified Files:
src/lib/libc/arch/powerpc: genassym.cf
src/lib/libc/arch/powerpc/sys: __sigtramp2.S
Log Message:
Decorate the powerpc signal trampoline with the appropriate .cfi
directives to
Module Name:src
Committed By: thorpej
Date: Sun Nov 21 21:31:25 UTC 2021
Modified Files:
src/lib/libc/arch/powerpc: genassym.cf
src/lib/libc/arch/powerpc/sys: __sigtramp2.S
Log Message:
Decorate the powerpc signal trampoline with the appropriate .cfi
directives to
Module Name:src
Committed By: thorpej
Date: Sat Nov 20 19:26:20 UTC 2021
Modified Files:
src/lib/libc/arch/alpha/sys: __sigtramp2.S
Log Message:
Use the DWARF pseudo-register for the signal trampoline return address.
To generate a diff of this commit:
cvs rdiff -u -r1.7
Module Name:src
Committed By: thorpej
Date: Sat Nov 20 19:26:20 UTC 2021
Modified Files:
src/lib/libc/arch/alpha/sys: __sigtramp2.S
Log Message:
Use the DWARF pseudo-register for the signal trampoline return address.
To generate a diff of this commit:
cvs rdiff -u -r1.7
Module Name:src
Committed By: thorpej
Date: Thu Nov 18 04:33:20 UTC 2021
Modified Files:
src/lib/libc/arch/mips: genassym.cf
src/lib/libc/arch/mips/sys: __sigtramp2.S
Log Message:
Decorate the MIPS signal trampoline with the appropriate .cfi
directives to allow
Module Name:src
Committed By: thorpej
Date: Thu Nov 18 04:33:20 UTC 2021
Modified Files:
src/lib/libc/arch/mips: genassym.cf
src/lib/libc/arch/mips/sys: __sigtramp2.S
Log Message:
Decorate the MIPS signal trampoline with the appropriate .cfi
directives to allow
Module Name:src
Committed By: thorpej
Date: Wed Nov 3 04:52:51 UTC 2021
Modified Files:
src/lib/libc/arch/alpha/sys: __sigtramp2.S
Log Message:
CFI: Saved RA needs to point to the PC slot in the ucontext_t.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7
Module Name:src
Committed By: thorpej
Date: Wed Nov 3 04:52:51 UTC 2021
Modified Files:
src/lib/libc/arch/alpha/sys: __sigtramp2.S
Log Message:
CFI: Saved RA needs to point to the PC slot in the ucontext_t.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7
Module Name:src
Committed By: thorpej
Date: Wed Nov 3 03:58:31 UTC 2021
Modified Files:
src/lib/libc/arch/alpha/sys: __sigtramp2.S
Log Message:
Set up the CFI in a slightly more rational way.
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6
Module Name:src
Committed By: thorpej
Date: Wed Nov 3 03:58:31 UTC 2021
Modified Files:
src/lib/libc/arch/alpha/sys: __sigtramp2.S
Log Message:
Set up the CFI in a slightly more rational way.
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6
Module Name:src
Committed By: skrll
Date: Thu Oct 7 06:44:19 UTC 2021
Modified Files:
src/lib/libc/arch/aarch64/gen: _setjmp.S setjmp.S
Log Message:
Fix the lib/libc/setjmp/t_setjmp:{,_}longjmp_zero test cases
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5
Module Name:src
Committed By: skrll
Date: Thu Oct 7 06:44:19 UTC 2021
Modified Files:
src/lib/libc/arch/aarch64/gen: _setjmp.S setjmp.S
Log Message:
Fix the lib/libc/setjmp/t_setjmp:{,_}longjmp_zero test cases
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5
On 2021/07/25 6:32, Joerg Sonnenberger wrote:
On Sat, Jul 24, 2021 at 05:27:26AM +, Rin Okuyama wrote:
Module Name:src
Committed By: rin
Date: Sat Jul 24 05:27:26 UTC 2021
Modified Files:
src/lib/libc/arch/powerpc/string: Makefile.inc
Log Message:
For evbppc, use C
On Sat, Jul 24, 2021 at 05:27:26AM +, Rin Okuyama wrote:
> Module Name: src
> Committed By: rin
> Date: Sat Jul 24 05:27:26 UTC 2021
>
> Modified Files:
> src/lib/libc/arch/powerpc/string: Makefile.inc
>
> Log Message:
> For evbppc, use C version of bcopy(3), memcpy(3),
Oops, this is broken. I will fix shortly...
rin
On 2021/06/30 8:29, Rin Okuyama wrote:
Module Name:src
Committed By: rin
Date: Tue Jun 29 23:29:12 UTC 2021
Modified Files:
src/lib/libc/arch/arm/gen: swapcontext.S
src/lib/libc/arch/arm/sys: __clone.S
Log
On Sat, Aug 18, 2018 at 07:11:40PM +0900, Ryo Shimizu wrote:
>
> >On Sat, Aug 11, 2018 at 10:06:41AM +, Ryo Shimizu wrote:
> >> Module Name: src
> >> Committed By: ryo
> >> Date: Sat Aug 11 10:06:41 UTC 2018
> >>
> >> Modified Files:
> >>
>On Sat, Aug 11, 2018 at 10:06:41AM +, Ryo Shimizu wrote:
>> Module Name: src
>> Committed By:ryo
>> Date:Sat Aug 11 10:06:41 UTC 2018
>>
>> Modified Files:
>> src/lib/libc/arch/aarch64/softfloat: qp.c
>>
>> Log Message:
>> fix multiple definition of
On Sat, Aug 11, 2018 at 10:06:41AM +, Ryo Shimizu wrote:
> Module Name: src
> Committed By: ryo
> Date: Sat Aug 11 10:06:41 UTC 2018
>
> Modified Files:
> src/lib/libc/arch/aarch64/softfloat: qp.c
>
> Log Message:
> fix multiple definition of __{ge,lt,gt,le,eq,ne,unordt}tf2 in
On 12/02/2018 22:31, Jonathan A. Kollasch wrote:
@@ -47,6 +47,6 @@ END(__sigsetjmp14)
ENTRY(__siglongjmp14)
ldr x3, [x0, #_JB_MAGIC]
- tbz x3, #0, _C_LABEL(__longjmp14)
+ tbnzx3, #0, _C_LABEL(__longjmp14)
b _C_LABEL(_longjmp)
On Sat, Aug 13, 2016 at 07:49:32AM +, Nick Hudson wrote:
> Module Name: src
> Committed By: skrll
> Date: Sat Aug 13 07:49:32 UTC 2016
>
> Modified Files:
> src/lib/libc/arch/mips/gen: _resumecontext.S
>
> Log Message:
> PIC_TAILCALL on n32/n64 would mess up GP, so just use
On Wed, Jul 15, 2015 at 02:23:40PM +, Antti Kantee wrote:
Modified Files:
src/lib/libc/arch/i386/gen: Makefile.inc
src/lib/libc/arch/x86_64/gen: Makefile.inc
Log Message:
Remove objects built from C sources comments. Everyone can see
they're built from C sources
On Sat, Feb 01, 2014 at 08:26:21PM +, Matt Thomas wrote:
Modified Files:
src/lib/libc/arch/powerpc/sys: __syscall.S syscall.S
Log Message:
Since powerpc passes 8 arguments in registers and the syscall number in r0,
shuffle register argument so the kernel won't need to access
On Tue, Mar 12, 2013 at 09:20:44PM +, Christos Zoulas wrote:
In article 20130312193820.a36b017...@cvs.netbsd.org,
Martin Husemann source-changes-d@NetBSD.org wrote:
is the memset() in longjmp desired? It will just slow down things.
I have a bad feeling setting random values to registers,
On Mar 13, 8:33am, mar...@duskware.de (Martin Husemann) wrote:
-- Subject: Re: CVS commit: src/lib/libc/arch/alpha/gen
| I have a bad feeling setting random values to registers, and we will
| do a system call right afterwards, so I think it is no big deal performance
| wise. We can carfully null
On Wed, Mar 13, 2013 at 08:44:03AM -0400, Christos Zoulas wrote:
But most of the structure is explicitly initialized. It is probably better
to explicitly set the missing members that calling memset().
I have verified that only argument and scratch registers remain
uninitialized, and so removed
In article 20130312193820.a36b017...@cvs.netbsd.org,
Martin Husemann source-changes-d@NetBSD.org wrote:
is the memset() in longjmp desired? It will just slow down things.
christos
Matt Thomas m...@netbsd.org writes:
Module Name: src
Committed By: matt
Date: Sat Jan 26 07:08:14 UTC 2013
Modified Files:
src/lib/libc/arch/arm/softfloat: arm-gcc.h
Log Message:
Appease clang by making 64-bit literals use ULL
To generate a diff of this commit:
cvs
On Fri, Aug 31, 2012 at 08:57:24PM +, Matthias Drochner wrote:
Module Name: src
Committed By: drochner
Date: Fri Aug 31 20:57:24 UTC 2012
Modified Files:
src/lib/libc/arch/i386/gen: _lwp.c
Log Message:
Align the stack to a 16-byte boundary on LWP creation.
This is
Hi Veleriy,
On Wed, Jul 11, 2012 at 11:08:46PM +0400, Valeriy E. Ushakov wrote:
Log Message:
On the libc/libgcc clashes cleanup that removed divsi3.o from libc,
ARM/evbarm
was forgotten. This patch fixes it making static binaries possible again!
Please, complete this by moving the .S
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