CVS commit: src/libexec/ld.elf_so/arch/riscv

2024-07-22 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Mon Jul 22 23:11:05 UTC 2024 Modified Files: src/libexec/ld.elf_so/arch/riscv: mdreloc.c Log Message: ld.elf_so: Cite reference for RISC-V ELF relocations. PR lib/58455: Missing references for processor-specific ELF relocation

CVS commit: src/libexec/ld.elf_so/arch/riscv

2024-07-22 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Mon Jul 22 23:11:05 UTC 2024 Modified Files: src/libexec/ld.elf_so/arch/riscv: mdreloc.c Log Message: ld.elf_so: Cite reference for RISC-V ELF relocations. PR lib/58455: Missing references for processor-specific ELF relocation

CVS commit: src/libexec/ld.elf_so/arch/riscv

2022-12-04 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon Dec 5 07:33:43 UTC 2022 Modified Files: src/libexec/ld.elf_so/arch/riscv: rtld_start.S Log Message: Use the SZREG symbol instead of __SIZEOF_POINTER__ as its shorter. Assert that they're the same just in case. Sprinkle some

CVS commit: src/libexec/ld.elf_so/arch/riscv

2022-12-04 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon Dec 5 07:33:43 UTC 2022 Modified Files: src/libexec/ld.elf_so/arch/riscv: rtld_start.S Log Message: Use the SZREG symbol instead of __SIZEOF_POINTER__ as its shorter. Assert that they're the same just in case. Sprinkle some

CVS commit: src/libexec/ld.elf_so/arch/riscv

2022-12-04 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon Dec 5 07:26:25 UTC 2022 Modified Files: src/libexec/ld.elf_so/arch/riscv: mdreloc.c Log Message: RISC-V is RELA To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/libexec/ld.elf_so/arch/riscv/mdreloc.c Please n

CVS commit: src/libexec/ld.elf_so/arch/riscv

2022-12-04 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon Dec 5 07:26:25 UTC 2022 Modified Files: src/libexec/ld.elf_so/arch/riscv: mdreloc.c Log Message: RISC-V is RELA To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/libexec/ld.elf_so/arch/riscv/mdreloc.c Please n

CVS commit: src/libexec/ld.elf_so/arch/riscv

2022-12-03 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Dec 3 09:39:44 UTC 2022 Modified Files: src/libexec/ld.elf_so/arch/riscv: mdreloc.c rtld_start.S Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/libexec/ld.elf_so/arch/riscv/m

CVS commit: src/libexec/ld.elf_so/arch/riscv

2022-12-03 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Dec 3 09:39:44 UTC 2022 Modified Files: src/libexec/ld.elf_so/arch/riscv: mdreloc.c rtld_start.S Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/libexec/ld.elf_so/arch/riscv/m