CVS commit: src/sys/arch/evbmips/mipssim

2022-12-28 Thread Havard Eidnes
Module Name:src Committed By: he Date: Wed Dec 28 11:50:25 UTC 2022 Modified Files: src/sys/arch/evbmips/mipssim: machdep.c mipssimreg.h Log Message: evbmips/mipssim: on mips64, probe for additional memory. Probe for memory from above the ISA I/O hole and up to 16GB, whic

CVS commit: src/sys/arch/evbmips/mipssim

2022-12-28 Thread Havard Eidnes
Module Name:src Committed By: he Date: Wed Dec 28 11:50:25 UTC 2022 Modified Files: src/sys/arch/evbmips/mipssim: machdep.c mipssimreg.h Log Message: evbmips/mipssim: on mips64, probe for additional memory. Probe for memory from above the ISA I/O hole and up to 16GB, whic

CVS commit: src/sys/arch/evbmips/mipssim

2022-12-28 Thread Havard Eidnes
Module Name:src Committed By: he Date: Wed Dec 28 11:40:35 UTC 2022 Modified Files: src/sys/arch/evbmips/mipssim: mipssim_dma.c Log Message: mipssim_dma.c: set _bounce_thresh so that bounce buffering works. Suggested by jmcneill@, thanks! To generate a diff of this comm

CVS commit: src/sys/arch/evbmips/mipssim

2022-12-28 Thread Havard Eidnes
Module Name:src Committed By: he Date: Wed Dec 28 11:40:35 UTC 2022 Modified Files: src/sys/arch/evbmips/mipssim: mipssim_dma.c Log Message: mipssim_dma.c: set _bounce_thresh so that bounce buffering works. Suggested by jmcneill@, thanks! To generate a diff of this comm

CVS commit: src/sys/arch/evbmips/mipssim

2021-11-15 Thread Simon Burge
Module Name:src Committed By: simonb Date: Tue Nov 16 06:44:40 UTC 2021 Modified Files: src/sys/arch/evbmips/mipssim: machdep.c Log Message: Use CPU frequencies defined in QEMU for mipssim - 6 MHz for 64-bit guests and 12 MHz for 32-bit guests. To generate a diff of this

CVS commit: src/sys/arch/evbmips/mipssim

2021-11-15 Thread Simon Burge
Module Name:src Committed By: simonb Date: Tue Nov 16 06:44:40 UTC 2021 Modified Files: src/sys/arch/evbmips/mipssim: machdep.c Log Message: Use CPU frequencies defined in QEMU for mipssim - 6 MHz for 64-bit guests and 12 MHz for 32-bit guests. To generate a diff of this

CVS commit: src/sys/arch/evbmips/mipssim

2021-11-03 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Wed Nov 3 07:53:56 UTC 2021 Modified Files: src/sys/arch/evbmips/mipssim: virtio_mainbus.c Log Message: Catch up with member renaming To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/evbmips/mipssim/virti

CVS commit: src/sys/arch/evbmips/mipssim

2021-11-03 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Wed Nov 3 07:53:56 UTC 2021 Modified Files: src/sys/arch/evbmips/mipssim: virtio_mainbus.c Log Message: Catch up with member renaming To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/evbmips/mipssim/virti