Sorry for being unresponsive to your mails. I appreciate the hard work
you're doing, but I have too many other things on my table to answer
you in a timely manner. I hope you can put up with the delays.
On Fri, 22 Jun 2007 14:18:43 -0700
David Brownell <[EMAIL PROTECTED]> wrote:
>
> If so, then
On Saturday 30 June 2007, Atsushi Nemoto wrote:
> On Sat, 30 Jun 2007 09:53:19 -0700, David Brownell <[EMAIL PROTECTED]> wrote:
> > > This is a driver for SPI controller built into TXx9 MIPS SoCs.
> > > This driver is derived from arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c.
> > >
> > > Signed-of
On Sat, 30 Jun 2007 09:53:19 -0700, David Brownell <[EMAIL PROTECTED]> wrote:
> > This is a driver for SPI controller built into TXx9 MIPS SoCs.
> > This driver is derived from arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c.
> >
> > Signed-off-by: Atsushi Nemoto <[EMAIL PROTECTED]>
> > ---
> > Chang
On Wednesday 27 June 2007, Atsushi Nemoto wrote:
> This is a driver for SPI controller built into TXx9 MIPS SoCs.
> This driver is derived from arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c.
>
> Signed-off-by: Atsushi Nemoto <[EMAIL PROTECTED]>
> ---
> Changes from previous version:
Better, but st
> -Original Message-
> From: David Brownell [mailto:[EMAIL PROTECTED]
> Sent: den 30 juni 2007 17:12
> To: spi-devel-general@lists.sourceforge.net;
> [EMAIL PROTECTED]
> Subject: Re: [spi-devel-general] [PATCH] spi_mpc83xx.c,
> support QE enabled 83xx CPU's like mpc832x
>
> On Saturd
On Saturday 30 June 2007, Joakim Tjernlund wrote:
> @@ -197,12 +203,22 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi,
> struct spi_transfer *t)
> || ((bits_per_word > 16) && (bits_per_word != 32)))
> return -EINVAL;
>
> + mpc83xx_spi->rx_shift = 0;
> +
On Saturday 30 June 2007, Joakim Tjernlund wrote:
> Quicc Engine enabled mpc83xx CPU's has a somewhat different HW interface
> to the SPI controller. This patch adds a qe_mode knob that sees to that
> needed adaptions are performed.
But nothing seems to add it to ...
so this won't build. Right?
> This is a resend of a patch Kumar and I tossed back and forth a few
> times.
>
> Jocke
Quicc Engine enabled mpc83xx CPU's has a somewhat different HW interface
to the SPI controller. This patch adds a qe_mode knob that sees to that
needed adaptions are performed.
Signed-off-by: Joakim Tjernl
Quicc Engine enabled mpc83xx CPU's has a somewhat different HW interface
to the SPI controller. This patch adds a qe_mode knob that sees to that
needed adaptions are performed.
Signed-off-by: Joakim Tjernlund <[EMAIL PROTECTED]>
---
This is a resend of a patch Kumar and I tossed back and forth a