On Wed, Oct 20, 2010 at 09:23:57AM -0700, Tony Lindgren wrote:
> * Ilkka Koskinen [101019 06:55]:
> > In case of TX only with DMA, the driver assumes that the data
> > has been transferred once DMA callback in invoked. However,
> > SPI's shift register may still contain data. Thus, the driver
> >
* Ilkka Koskinen [101019 06:55]:
> In case of TX only with DMA, the driver assumes that the data
> has been transferred once DMA callback in invoked. However,
> SPI's shift register may still contain data. Thus, the driver
> is supposed to verify that the register is empty and the end of
> the SPI
On Tue, Oct 19, 2010 at 06:03:27PM +0800, Jason Wang wrote:
> In the TX_ONLY transfer, the SPI controller also receives data
> simultaneously and saves them in the rx register. After the TX_ONLY
> transfer, the rx register will hold the random data received during
> the last tx transaction.
>
> If
On Mon, Oct 18, 2010 at 03:25:14PM -0400, Cyril Chemparathy wrote:
> This patch adds an SPI master implementation that operates on top of an
> underlying TI-SSP port.
>
> Signed-off-by: Cyril Chemparathy
> ---
> arch/arm/mach-davinci/include/mach/ti_ssp.h |5 +
> drivers/spi/Kconfig
On Mon, Oct 18, 2010 at 03:25:18PM -0400, Cyril Chemparathy wrote:
> This patch adds a GPIO driver based on TI's SSP device. This driver does not
> support GPIO-IRQs.
>
> Signed-off-by: Cyril Chemparathy
Acked-by: Grant Likely
> ---
> arch/arm/mach-davinci/include/mach/ti_ssp.h |4 +
> d
On Mon, Oct 18, 2010 at 03:25:11PM -0400, Cyril Chemparathy wrote:
> TI's sequencer serial port (TI-SSP) is a jack-of-all-trades type of serial
> port
> device. It has a built-in programmable execution engine that can be
> programmed
> to operate as almost any serial bus (I2C, SPI, EasyScale, an
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