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On Wed, Nov 21, 2012 at 5:56 PM, Alan Cox wrote:
> On Wed, 21 Nov 2012 17:44:21 +0530
> Shubhrajyoti Datta wrote:
>
> > On Wed, Nov 21, 2012 at 7:46 AM, chao bi wrote:
> >
> > > + /* Create the PM_QOS request */
> > > + if (drv_context->quirks & QUIRKS_USE_PM_QOS)
> > > +
On Thu, Nov 22, 2012 at 8:56 AM, Bi, Chao wrote:
> if (chip_info->enable_loopback)
> + chip->cr1 |= SSCR1_LBM;
>
> Who sets the enable_loopback?
>
> ** **
>
> [Chao] ‘enable_loopback’ could be configured by SPI Protocol driver before
> it setup SPI cont
+ if (chip_info->enable_loopback)
+ chip->cr1 |= SSCR1_LBM;
Who sets the enable_loopback?
[Chao] 'enable_loopback' could be configured by SPI Protocol driver before it
setup SPI controller. Generally it is not set by default because it's used for
test and vali
On Wed, Nov 21, 2012 at 02:35:52PM -0500, Jason Cooper wrote:
> > /* we support only mode 0, and no options */
> > - master->mode_bits = 0;
> > + master->mode_bits = SPI_CPHA | SPI_CPOL;
>
> The comment no longer seems valid. ;-) Also, you are unconditionally
> enabling these modes. Do
On Wed, Nov 21, 2012 at 12:23:35PM -0700, Jason Gunthorpe wrote:
> Support these transfer modes from the SPI layer by setting
> the appropriate register bits before doing the transfer.
>
> This was tested on the Marvell kirkwood SOC that uses this driver.
>
> Reviewed-by: Jason Gunthorpe
> Signe
Support these transfer modes from the SPI layer by setting
the appropriate register bits before doing the transfer.
This was tested on the Marvell kirkwood SOC that uses this driver.
Reviewed-by: Jason Gunthorpe
Signed-off-by: Rolf Manderscheid
---
drivers/spi/spi-orion.c | 25 ++
On Fri, 16 Nov 2012 11:32:46 -0500, Murali Karicheri
wrote:
> On 11/15/2012 11:20 AM, Grant Likely wrote:
> > On Mon, 12 Nov 2012 16:28:22 -0500, Murali Karicheri
> > wrote:
> >> This adds OF support to DaVinci SPI controller to configure platform
> >> data through device bindings.
> >>
> >> Si
On Thu, 15 Nov 2012 20:19:57 +0100, Jean-Christophe PLAGNIOL-VILLARD
wrote:
> This will allow to use gpio for chip select with no modification in the
> driver binding
>
> When use the cs-gpios, the gpio number will be passed via the cs_gpio field
> and the number of chip select will automaticall
On Wed, 21 Nov 2012 17:44:21 +0530
Shubhrajyoti Datta wrote:
> On Wed, Nov 21, 2012 at 7:46 AM, chao bi wrote:
>
> > + /* Create the PM_QOS request */
> > + if (drv_context->quirks & QUIRKS_USE_PM_QOS)
> > + pm_qos_add_request(&drv_context->pm_qos_req,
> > +
On Wed, Nov 21, 2012 at 7:46 AM, chao bi wrote:
> + /* Create the PM_QOS request */
> + if (drv_context->quirks & QUIRKS_USE_PM_QOS)
> + pm_qos_add_request(&drv_context->pm_qos_req,
> + PM_QOS_CPU_DMA_LATENCY,
> + PM_QOS_DEFAULT_VALUE);
>
Wha
On Wed, Nov 21, 2012 at 7:46 AM, chao bi wrote:
>
> This patch is to implement SSP SPI controller driver, which has been
> applied and
> validated on intel Moorestown & Medfield platform. The patch are
> originated by
> Ken Mills and Sylvain Centelles <
> sylvain.centel...@intel.com>,
> and to b
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