Rather than calling m->complete() directly we choose the sane way and call
spi_finalize_current_message instead.
Signed-off-by: Thomas Langer
Signed-off-by: John Crispin
---
drivers/spi/spi-falcon.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/spi-falco
Due to hardware limitations of the spi/flash frontend of the EBU we need to set
the SPI_MASTER_HALF_DUPLEX flag.
Signed-off-by: Thomas Langer
Signed-off-by: John Crispin
---
drivers/spi/spi-falcon.c |1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/spi/spi-falcon.c b/drivers/spi
On 22/08/12 20:59, Mark Brown wrote:
>> + if (of_machine_is_compatible("lantiq,ase"))
>> > + master->num_chipselect = 3;
>> > + else
>> > + master->num_chipselect = 6;
> This is very suspicious - why is this being done based on the machine
> rather than based
This patch adds support for the SPI core found on several Lantiq SoCs.
The Driver has been runtime tested in combination with m25p80 Flash Devices
on Amazon_SE and VR9.
Signed-off-by: Daniel Schwierzeck
Signed-off-by: John Crispin
---
drivers/spi/Kconfig|8 +
drivers/spi/Makefile
> What exactly does this mean? How does it not support any other type
> of SPI peripheral? SPI is a really simple protocol, so what is it
> about this hardware that prevents it being used with other SPI
> hardware?
>
> I see a big state machine that appears to interpret the messages and
> preten
-by: John Crispin
Cc: spi-devel-general@lists.sourceforge.net
---
This patch is part of a series moving the mips/lantiq target to OF and clkdev
support. The patch, once Acked, should go upstream via Ralf's MIPS tree.
Changes in V5
* drop duplicate busnum assignment
Changes in V4
* drop b
On 20/05/12 15:20, John Crispin wrote:
> + master->mode_bits = SPI_MODE_3;
> + master->num_chipselect = 1;
> + master->bus_num = -1;
once
> + master->setup = falcon_sflash_setup;
> + master->prepare_transfer_hardware = falcon_sflas
-by: John Crispin
Cc: spi-devel-general@lists.sourceforge.net
---
This patch is part of a series moving the mips/lantiq target to OF and clkdev
support. The patch, once Acked, should go upstream via Ralf's MIPS tree.
Changes in V4
* drop busnum property
Changes in V3
* rephrase spi->SPI
*
-by: John Crispin
Cc: spi-devel-general@lists.sourceforge.net
---
This patch was previously Acked in V2 by Grant
http://www.mail-archive.com/spi-devel-general@lists.sourceforge.net/msg07874.html
Changes in V3
* rephrase spi->SPI
* fix rate detection
* adds support for transfer_one & co
*
On 14/05/12 20:32, Jonas Gorski wrote:
> There was a patch accepted just a few days ago dropping the
> requirement for (un)prepare_transfer being populated :)
>
Hi,
this patch needs to flow via ralfs next tree, so i will keep this to
avoid merge order breaking the code. I will add it on my todo f
The external bus unit (EBU) found on the FALCON SoC has spi emulation that is
designed for serial flash access. This driver has only been tested with m25p80
type chips. The hardware has no support for other types of spi peripherals.
Signed-off-by: Thomas Langer
Signed-off-by: John Crispin
Cc
The external bus unit (EBU) found on the FALC-ON SoC has spi emulation that is
designed for serial flash access. This driver has only been tested with m25p80
type chips. The hardware has no support for other types of spi peripherals.
Signed-off-by: Thomas Langer
Signed-off-by: John Crispin
Cc
Add code to register the spi driver on FALC-ON based boards.
Signed-off-by: Thomas Langer
Signed-off-by: John Crispin
Cc: spi-devel-general@lists.sourceforge.net
---
arch/mips/lantiq/falcon/devices.c| 13 +
arch/mips/lantiq/falcon/devices.h|4
arch/mips
The external bus unit (EBU) found on the FALC-ON SoC has spi emulation that is
designed for serial flash access. This driver has only been tested with m25p80
type chips. The hardware has no support for other types of spi peripherals.
Signed-off-by: Thomas Langer
Signed-off-by: John Crispin
Cc
14 matches
Mail list logo
