On 09/23/2013 03:01 PM, Rhyland Klein wrote:
> On 9/23/2013 3:58 PM, Stephen Warren wrote:
>> On 09/23/2013 01:48 PM, Rhyland Klein wrote:
>>> On 9/23/2013 2:51 PM, Stephen Warren wrote:
>>>> On 09/18/2013 12:17 PM, Rhyland Klein wrote:
>>>>> The
On 09/23/2013 01:48 PM, Rhyland Klein wrote:
> On 9/23/2013 2:51 PM, Stephen Warren wrote:
>> On 09/18/2013 12:17 PM, Rhyland Klein wrote:
>>> The tegra114 driver wasn't currently handling the cs_change functionality.
>>> It is meant to invert normal behavior, and w
On 09/18/2013 12:17 PM, Rhyland Klein wrote:
> The tegra114 driver wasn't currently handling the cs_change functionality.
> It is meant to invert normal behavior, and we were only using it to possibly
> delay at the end of a transfer.
I don't really follow this patch description well. It may help
On 07/09/2013 09:47 AM, Michal Simek wrote:
>> diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
>> index e1d7696..f321bf9 100644 --- a/drivers/spi/spi-xilinx.c +++
>> b/drivers/spi/spi-xilinx.c @@ -232,21 +232,6 @@ static int
>> xilinx_spi_setup_transfer(struct spi_device *spi, ret
On 05/31/2013 02:45 AM, Arnd Bergmann wrote:
> Can you check this part again:
>
> On Tuesday 21 May 2013 20:36:35 Stephen Warren wrote:
>> diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
...
>> @@ -1190,11 +1172,13 @@ static int pxa2xx_spi_probe(struct plat
Fill in the recently added spi_master.bits_per_word_mask field in as
many drivers as possible. Make related cleanups, such as removing any
redundant error-checking, or empty setup callbacks.
Cc: device-drivers-de...@blackfin.uclinux.org
Cc: Mike Frysinger
Signed-off-by: Stephen Warren
---
The
Introduce two macros to make setting up spi_master.bits_per_word_mask
easier, and avoid mistakes like writing BIT(n) instead of BIT(n - 1).
SPI_BPW_MASK is for a single supported value of bits_per_word_mask.
SPI_BPW_RANGE_MASK represents a contiguous set of bit lengths.
Signed-off-by: Stephen
On 05/14/2013 04:07 AM, Laurent Navet wrote:
> Check of 'r' and calls to dev_err are already done in devm_ioremap_resource,
> so no need to do them twice.
I think this duplicates part of a much wider patch series that Wolfram
is working on; I CC'd him here.
---
On 05/10/2013 02:17 AM, Wolfram Sang wrote:
> devm_ioremap_resource does sanity checks on the given resource. No need to
> duplicate this in the driver.
> diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
> - r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> - if (!
On 03/09/2013 02:21 AM, Grant Likely wrote:
> On Sat, Mar 9, 2013 at 1:10 AM, Rhyland Klein wrote:
>> On 3/2/2013 6:02 PM, Grant Likely wrote:
>>>
>>> On Fri, 15 Feb 2013 15:03:50 -0700, Stephen Warren
>>> wrote:
>>>>
>>>> From: Ste
On 04/01/2013 01:52 PM, Trent Piepho wrote:
> On Tue, Mar 26, 2013 at 7:37 PM, Stephen Warren wrote:
>> Allow SPI masters to define the set of bits_per_word values they support.
>> If they do this, then the SPI core will reject transfers that attempt to
>> use an unsupporte
On 04/01/2013 07:18 AM, Mark Brown wrote:
> The core can do the validation for us.
Reviewed-by: Stephen Warren
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This driver only supports bits_per_word==8, so inform the SPI core of
this. Remove all the open-coded validation that's no longer needed.
Signed-off-by: Stephen Warren
---
This only converts one driver, but if the concept is acceptable, I'll try
to take a look at other drivers and co
Allow SPI masters to define the set of bits_per_word values they support.
If they do this, then the SPI core will reject transfers that attempt to
use an unsupported bits_per_word value. This eliminates the need for each
SPI driver to implement this checking in most cases.
Signed-off-by: Stephen
ly.
* Remove redundant checks from bcm2835_spi_check_transfer() and
bcm2835_spi_setup().
* Re-ordered IRQ handler to check for RXR before DONE. Added comments to
ISR.
* Removed empty prepare/unprepare implementations.
* Removed use of devinit/devexit.
* Added BCM2835_ prefix to defines.
Signed-off-by: Chris
calling this in transfer_one_message().
Tested-by: Stephen Warren
This does fix some slightly intermittent lockups/crashes for me when
erasing and re-writing the SPI flash on Cardhu.
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On 03/05/2013 09:05 PM, Mark Brown wrote:
> On Tue, Mar 05, 2013 at 07:49:02PM -0700, Stephen Warren wrote:
>> +switch (bpw) { +case 8: + break; +
>> default: +
>> dev_err(&spi->dev, "unsupported bits_per_word=%d\n", bpw); +
On 03/05/2013 09:05 PM, Mark Brown wrote:
> On Tue, Mar 05, 2013 at 07:49:02PM -0700, Stephen Warren wrote:
>> +static irqreturn_t bcm2835_spi_interrupt(int irq, void *dev_id)
>> +{
>>
>> if (cs & BCM2835_SPI_CS_DONE) { if (bs->len) { /* first interrupt
>&
On 03/05/2013 09:05 PM, Mark Brown wrote:
> On Tue, Mar 05, 2013 at 07:49:02PM -0700, Stephen Warren wrote:
>
>> +Optional properties: +- brcm,realtime: Boolean. Indicates the
>> driver should operate with realtime + priority to minimise the
>> transfer latency on
* Don't use devm_request_irq(), to ensure that the IRQ doesn't fire after
we've torn down the device, but not unhooked the IRQ.
* Removed empty prepare/unprepare implementations.
* Removed use of devinit/devexit.
* Added BCM2835_ prefix to defines.
Signed-off-by: Chris Boot
Signed
On 02/21/2013 12:10 AM, Laxman Dewangan wrote:
> Add SPI driver for NVIDIA's Tegra114 SPI controller. This controller
> is different than the older SoCs SPI controller in internal design as
> well as register interface.
Looks good. Just a couple of nits mentioned below, then,
Review
On 02/20/2013 10:57 AM, Mark Brown wrote:
> On Wed, Feb 20, 2013 at 10:36:41AM -0700, Stephen Warren wrote:
>> On 02/20/2013 10:31 AM, Mark Brown wrote:
>
>>> Since we can extend the list of clocks it doesn't seem like
>>> there's much issue here, esp
On 02/20/2013 10:31 AM, Mark Brown wrote:
> On Wed, Feb 20, 2013 at 10:25:13AM -0700, Stephen Warren wrote:
>
>> But, please do think this approach through fully. The DT binding
>> needs to define which clock-names the driver requires to be
>> present, and any optional
On 02/20/2013 06:26 AM, Laxman Dewangan wrote:
> On Wednesday 20 February 2013 06:41 PM, Mark Brown wrote:
>> * PGP Signed by an unknown key
>>
>> On Wed, Feb 20, 2013 at 05:59:03PM +0530, Laxman Dewangan wrote:
> +tspi->clk = devm_clk_get(&pdev->dev, "spi");
Does this HW block use mul
On 02/19/2013 06:38 AM, Laxman Dewangan wrote:
> Add spi driver for NVIDIA's Tegra114 spi controller. This controller
> is different than the older SoCs spi controller in internal design as
> well as register interface.
Nit: SPI should be capitalized. Also in Kconfig below.
> diff --git a/Documen
From: Stephen Warren
Tegra only supports, and always enables, device tree. Remove all ifdefs
and runtime checks for DT support from the driver. Platform data is
therefore no longer required. Rework the driver to parse the device tree
directly into struct tegra_slink_data.
Signed-off-by: Stephen
From: Stephen Warren
The platform data header is no longer used. Delete it.
Signed-off-by: Stephen Warren
---
include/linux/spi/spi-tegra.h | 40
1 file changed, 40 deletions(-)
delete mode 100644 include/linux/spi/spi-tegra.h
diff --git a/include
From: Stephen Warren
There is no code to set spi->controller_data, and hence the HW CS logic
can never trigger. Remove the unused code.
Signed-off-by: Stephen Warren
---
drivers/spi/spi-tegra20-slink.c | 32 +---
1 file changed, 1 insertion(+), 31 deleti
From: Stephen Warren
Tegra only supports, and always enables, device tree. Remove all ifdefs
and runtime checks for DT support from the driver. Platform data is
therefore no longer required. Rework the driver to parse the device tree
directly into struct tegra_sflash_data.
Signed-off-by
On 01/11/2013 01:01 AM, Prashant Gaikwad wrote:
> Since Tegra spi devices do not have multiple clocks, no need to use
> clock name to get the clock.
Cc'ing in the SPI maintainers as an FYI and for Acks; this patch needs
to go through the Tegra tree due to dependencies.
> Signed-off-by: Prashant G
On 11/23/2012 02:22 AM, Laxman Dewangan wrote:
> Spi starts transfer using dma with DMA_CTRL_ACK which is not require
> becasue spi driver does not use completed dma_desc after transfer
> done and so it does not ack the dma descriptor. Removing the
> DMA_CTRL_ACK flag to avoid memory leak in dma dr
t; + }
> + tegra_sflash_writel(tsd, tsd->command_reg, SPI_COMMAND);
> + pm_runtime_put(dev);
Can we avoid this whole function simply by programming SPI_COMMAND at
the start of each transaction? That seems simpler. I assume that
shouldn't e.g. leave any chip-sel
On 11/09/2012 10:10 AM, Mark Brown wrote:
> On Fri, Nov 09, 2012 at 10:04:56AM -0700, Stephen Warren wrote:
>
>> However just FYI, it should not be necessary for correctness; The
>> DT matching order is supposed to be driven purely by the order of
>> the compatible value
On 11/09/2012 02:07 AM, Laxman Dewangan wrote:
> Sequence compatible list for tegra20-slink driver to first
> look for Tegra30 and then Tegra20. Tegra30 have additional
> feature in HW which need to be utilize if it is provided from DT.
I don't object to this patch.
However just FYI, it should no
On 10/30/2012 01:04 AM, Laxman Dewangan wrote:
> Tegra20/Tegra30 supports the spi interface through its SLINK
> controller. Add spi driver for SLINK controller.
Reviewed-by: Stephen Warren
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On 10/29/2012 11:18 AM, Laxman Dewangan wrote:
> Tegra20/Tegra30 supports the spi interface through its SLINK
> controller. Add spi driver for SLINK controller.
> diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
> +config SPI_TEGRA20_SLINK
> + tristate "Nvidia Tegra20/Tegra30 SLINK Cont
On 10/29/2012 10:18 AM, Laxman Dewangan wrote:
> On Monday 29 October 2012 08:47 PM, Stephen Warren wrote:
>> On 10/26/2012 12:49 PM, Laxman Dewangan wrote:
>>>>
>>>> Why not just always set SLINK_FIFO_ERROR; does it have to be set in the
>>>> write o
On 10/26/2012 12:49 PM, Laxman Dewangan wrote:
> Thanks Stephen for review.
> I have taken care of almost all feedback. Some of having my below comments.
>
> On Tuesday 23 October 2012 01:32 AM, Stephen Warren wrote:
>> On 10/18/2012 04:47 AM, Laxman Dewangan wrote:
>>&g
On 10/18/2012 04:47 AM, Laxman Dewangan wrote:
> Tegra20/Tegra30 supports the spi interface through its SLINK
> controller. Add spi driver for SLINK controller.
> diff --git a/drivers/spi/spi-tegra20-slink.c b/drivers/spi/spi-tegra20-slink.c
> +static inline void tegra_slink_writel(struct tegra_s
From: Stephen Warren
The current SPI driver has many issues. Examples are:
* Segfaulting on most transfers due to expecting all transfers to have
both RX and TX buffers.
* Hanging on TX transfers since the whole driver flow is driven by RX
DMA completion, but the HW is only told to enable
From: Laxman Dewangan
Remove the support code which uses the legacy APB DMA driver
for accessing the I2S FIFO.
The driver will use the dmaengine based APB DMA driver for
accessing reqding/writing to I2S FIFO.
Signed-off-by: Laxman Dewangan
Signed-off-by: Stephen Warren
---
sound/soc/tegra
From: Laxman Dewangan
Remove the support code which uses the legacy APB DMA driver
for accessing the SPI FIFO.
The driver will use the dmaengine based APB DMA driver for
accessing reqding/writing to SPI FIFO.
Signed-off-by: Laxman Dewangan
Signed-off-by: Stephen Warren
---
drivers/spi
From: Laxman Dewangan
Remove the legacy APB dma driver. The APB DMA support
is moved to dmaengine based Tegra APB DMA driver.
All clients are also moved to dmaengine based APB DMA
driver.
Signed-off-by: Laxman Dewangan
Signed-off-by: Stephen Warren
---
arch/arm/mach-tegra/Kconfig
From: Laxman Dewangan
Enable config for dmaengine based Tegra APB DMA driver and
disable the legacy APB DMA driver (SYSTEM_DMA).
Signed-off-by: Laxman Dewangan
Signed-off-by: Stephen Warren
---
I'm looking for Ack's on patches 4 and 5 from the SPI and ASoC maintainers
respectively,
From: Laxman Dewangan
Remove the support code which uses the legacy APB DMA driver
for accessing the apbio register.
The driver will use the dmaengine based APB DMA driver for
accessing apbio register.
Signed-off-by: Laxman Dewangan
Signed-off-by: Stephen Warren
---
arch/arm/mach-tegra
On 09/14/2012 09:53 AM, Mark Brown wrote:
> On Thu, Sep 13, 2012 at 05:36:30PM -0600, Stephen Warren wrote:
>
>> Please note that I've applied this to Tegra's for-3.7/dmaengine branch,
>> even though it hasn't been ack'd by an ASoC maintainer.
>
> P
On 09/06/2012 05:50 PM, Stephen Warren wrote:
> On 08/16/2012 08:13 AM, Laxman Dewangan wrote:
>> Remove the support code which uses the legacy APB DMA driver
>> for accessing the SPI FIFO.
>> The driver will use the dmaengine based APB DMA driver for
>> accessing
On 09/06/2012 05:50 PM, Stephen Warren wrote:
> On 08/16/2012 08:13 AM, Laxman Dewangan wrote:
>> Remove the support code which uses the legacy APB DMA driver
>> for accessing the I2S FIFO.
>> The driver will use the dmaengine based APB DMA driver for
>> accessing
On 08/16/2012 08:13 AM, Laxman Dewangan wrote:
> Remove the support code which uses the legacy APB DMA driver
> for accessing the I2S FIFO.
> The driver will use the dmaengine based APB DMA driver for
> accessing reqding/writing to I2S FIFO.
>
> Signed-off-by: Laxman Dewangan
Please note that I'
On 08/16/2012 08:13 AM, Laxman Dewangan wrote:
> Remove the support code which uses the legacy APB DMA driver
> for accessing the SPI FIFO.
> The driver will use the dmaengine based APB DMA driver for
> accessing reqding/writing to SPI FIFO.
>
> Signed-off-by: Laxman Dewangan
Please note that I'
On 08/16/2012 08:13 AM, Laxman Dewangan wrote:
> This patch series enable the dmaengine based Tegra APB DMA driver
> and remove the support code for the legacy dma driver from different
> APB DMA clients.
> Patch 1 enable the dmaengine based dma drie and disable the legacy dma driver
> in c
On 08/16/2012 08:13 AM, Laxman Dewangan wrote:
> Remove the support code which uses the legacy APB DMA driver
> for accessing the I2S FIFO.
> The driver will use the dmaengine based APB DMA driver for
> accessing reqding/writing to I2S FIFO.
>
> Signed-off-by: Laxman Dewangan
Mark, Liam,
I'd li
On 08/16/2012 08:13 AM, Laxman Dewangan wrote:
> Remove the support code which uses the legacy APB DMA driver
> for accessing the SPI FIFO.
> The driver will use the dmaengine based APB DMA driver for
> accessing reqding/writing to SPI FIFO.
>
> Signed-off-by: Laxman Dewangan
Grant, Mark,
I'd l
On 08/17/2012 09:17 AM, Stephen Warren wrote:
> On 08/17/2012 12:38 AM, Laxman Dewangan wrote:
>> On Thursday 16 August 2012 11:23 PM, Stephen Warren wrote:
>>> On 08/16/2012 08:13 AM, Laxman Dewangan wrote:
>>>> Enable config for dmaengine based Tegra APB DMA driv
On 08/17/2012 12:38 AM, Laxman Dewangan wrote:
> On Thursday 16 August 2012 11:23 PM, Stephen Warren wrote:
>> On 08/16/2012 08:13 AM, Laxman Dewangan wrote:
>>> Enable config for dmaengine based Tegra APB DMA driver and
>>> disable the legacy APB DMA driver (SYSTEM_
On 08/16/2012 08:13 AM, Laxman Dewangan wrote:
> Enable config for dmaengine based Tegra APB DMA driver and
> disable the legacy APB DMA driver (SYSTEM_DMA).
Laxman, if I apply this series to next-20120816 (plus a few patches in
my local work branch plus the CPU hotplug patches from Joseph, althou
ough config
> file.
>
> Signed-off-by: Laxman Dewangan
Acked-by: Stephen Warren
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Greg KH wrote at Tuesday, September 06, 2011 4:57 PM:
> On Fri, Sep 02, 2011 at 11:24:04AM -0700, Stephen Warren wrote:
> > Jean Delvare wrote at Friday, September 02, 2011 3:25 AM:
...
> > > > Why not make it platform data for now and 'if' it becomes way more
&
/ whatever so that your
> > > patch series are no longer sent duplicated?
> > >
> > > On Thu, 1 Sep 2011 16:04:27 -0600, Stephen Warren wrote:
> > >> Some devices use a single pin as both an IRQ and a GPIO. In that case,
> > >> irq_gpio is the GPIO
gpio_is_valid() is the defined mechanism to determine whether a GPIO is
valid. Use this instead of assuming that 0 is an invalid GPIO.
Signed-off-by: Stephen Warren
---
drivers/staging/iio/magnetometer/ak8975.c | 11 +--
1 files changed, 5 insertions(+), 6 deletions(-)
diff --git a
Fix ak8975_probe() to jump to the appropriate exit labels when an error
occurs. With the previous code, some cleanup actions were being skipped
for some error conditions.
Signed-off-by: Stephen Warren
---
drivers/staging/iio/magnetometer/ak8975.c |2 +-
1 files changed, 1 insertions(+), 1
Tegra doesn't have irq_to_gpio() any more, and ak8975 is included in
tegra_defconfig. This causes a build failure.
Instead, obtain the GPIO ID corresponding to the chip's IRQ from the new
i2c_client field irq_gpio.
Signed-off-by: Stephen Warren
---
drivers/staging/iio/magnetomete
invalid GPIO ID, such as -1.
Signed-off-by: Stephen Warren
---
v3: Also add the field to i2c_board_info, and copy the field from
i2c_board_info to i2c_client upon instantiation
drivers/i2c/i2c-core.c |1 +
include/linux/i2c.h|9 +
2 files changed, 10 insertions(+), 0 deletions
invalid GPIO ID, such as -1.
Signed-off-by: Stephen Warren
---
v3: New patch for v3; apply the same change to spi as for i2c per Mark
Brown.
drivers/spi/spi.c |1 +
include/linux/spi/spi.h | 10 ++
2 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/drivers/spi
Fix ak8975_probe() to jump to the appropriate exit labels when an error
occurs. With the previous code, some cleanup actions were being skipped
for some error conditions.
Signed-off-by: Stephen Warren
---
drivers/staging/iio/magnetometer/ak8975.c |2 +-
1 files changed, 1 insertions(+), 1
invalid GPIO ID, such as -1.
Signed-off-by: Stephen Warren
---
v3: New patch for v3; apply the same change to spi as for i2c per Mark
Brown.
drivers/spi/spi.c |1 +
include/linux/spi/spi.h | 10 ++
2 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/drivers/spi
invalid GPIO ID, such as -1.
Signed-off-by: Stephen Warren
---
v3: Also add the field to i2c_board_info, and copy the field from
i2c_board_info to i2c_client upon instantiation
drivers/i2c/i2c-core.c |1 +
include/linux/i2c.h|9 +
2 files changed, 10 insertions(+), 0 deletions
gpio_is_valid() is the defined mechanism to determine whether a GPIO is
valid. Use this instead of assuming that 0 is an invalid GPIO.
Signed-off-by: Stephen Warren
---
drivers/staging/iio/magnetometer/ak8975.c | 11 +--
1 files changed, 5 insertions(+), 6 deletions(-)
diff --git a
Tegra doesn't have irq_to_gpio() any more, and ak8975 is included in
tegra_defconfig. This causes a build failure.
Instead, obtain the GPIO ID corresponding to the chip's IRQ from the new
i2c_client field irq_gpio.
Signed-off-by: Stephen Warren
---
drivers/staging/iio/magnetomete
Engineering names are more stable than marketing names. Hence, use them
for Device Tree compatible properties instead.
Signed-off-by: Stephen Warren
---
Grant, this is against devicetree/arm, and also makes sense for
devicetree/test.
.../devicetree/bindings/spi/spi_nvidia.txt |2
Grant Likely wrote at Wednesday, June 15, 2011 1:08 PM:
> Allow the tegra spi driver to obtain populate the spi bus with devices
Remote "obtain"?
> from the device tree.
>
> Signed-off-by: Grant Likely
> ---
> .../devicetree/bindings/spi/spi_nvidia.txt |5 +
> drivers/spi/spi-t
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