* i);
> +
Unneeded change.
> }
>
> mvreg_write(pp, MVNETA_BASE_ADDR_ENABLE, win_enable);
> + mvreg_write(pp, MVNETA_ACCESS_PROTECT_ENABLE, win_protect);
> }
Thanks,
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-elect
code is wrong,
but things were working fine until now.
So I am not questioning that this patch should be merged, but only
questioning whether the stable tag is appropriate.
Same questions for your patch 3/6.
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android
x-csum-limit' to 9800B in
> 'ethernet@7' node.
>
> Signed-off-by: Marcin Wojtas
> Cc: # v3.18+
This and the previous patch is not a fix, and has no business going in
stable. It is enabling a better functionality, but it is clearly not a
fix.
Thomas
--
Thomas Petaz
quot;)
Signed-off-by: Thomas Petazzoni
Cc: # v4.0+
---
arch/arm/boot/dts/armada-388-gp.dts | 10 --
1 file changed, 10 deletions(-)
diff --git a/arch/arm/boot/dts/armada-388-gp.dts
b/arch/arm/boot/dts/armada-388-gp.dts
index a633be3..cd31602 100644
--- a/arch/arm/boot/dts/armada-388-g
d in 3.13.
Signed-off-by: Lior Amsalem
Signed-off-by: Thomas Petazzoni
Cc: stable@vger.kernel.org
Cc: Thomas Gleixner
---
The problem has been present since 344e873e5657e8dc0 ('arm: mvebu: Add
IPI support via doorbells'), that is since v3.8. However, notice that
the IRQ driver was moved f
ost of the boards were properly adjusted accordingly,
the Armada 370 DB board was left unchanged, and therefore, PCIe is
seen as not enabled on this board. This patch fixes that by moving the
PCIe controller node one level-up in armada-370-db.dts.
Signed-off-by: Thomas Petazzoni
Cc: stable@vger.
h
fixes that by using the virtual CPU registers.
Signed-off-by: Gregory CLEMENT
Signed-off-by: Thomas Petazzoni
Cc: stable@vger.kernel.org
---
This bug has been introduced in e60304f8cb7bb5 ("arm: mvebu: Add
hardware I/O Coherency support"), merged in v3.8. Therefore this fix
should be
at the .dtsi
level was 14fd8ed0a7fd199131425fe9e802173c4ba6a4e9, merged for 3.12.
Therefore, I confirm that this patch should only be applied to
3.12-stable, and not 3.10-stable.
Thanks!
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://f
omas
On Mon, 25 Nov 2013 17:26:44 +0100, Thomas Petazzoni wrote:
> From: Lior Amsalem
>
> In the Armada 370/XP driver, when we receive an IRQ 0, we read the
> list of doorbells that caused the interrupt from register
> ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS. This gives the list of IPIs th
5657e8dc0 'arm: mvebu: Add IPI support via doorbells'
>
> to this patch.
Great, thanks! Note that the patch will not apply as is on 3.8, but I
will be able to provide a backported variant of it when needed.
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded L
e seen as a new feature for this platform,
and is therefore not a regression (i.e something that used to work, and
that no longer works). There has been no kernel release for which SATA
hotplug was working for Armada 370/XP.
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Li
he rules in
Documentation/stable_kernel_rules.txt.
Best regards,
Thomas
--
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Embedded Linux, Kernel and Android engineering
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe stable" in
the body of a message to majord
work
properly when the system is booted big-endian.
> + return ret;
> +}
> +arch_initcall(mvebu_soc_id_init);
> +#ifdef CONFIG_ARCH_MVEBU
> +int mvebu_get_soc_id(u32 *dev, u32 *rev);
> +#else
> +int mvebu_get_soc_id(u32 *dev, u32 *rev)
Missing "static inline". Wi
n't get the SoC revision
> + * weplay safe and we don't enable it
weplay -> we play
> + */
> + if (mvebu_get_soc_id(&rev, &dev) == 0 && dev > MV78XX0_A0_REV)
> + drv_data->offload_enabled = tru
IG register.
This patch has been tested on Armada 370 Mirabox, and now both network
interfaces are usable after boot.
Signed-off-by: Thomas Petazzoni
Cc: Willy Tarreau
Cc: Jochen De Smet
Cc: Peter Sanford
Cc: Ethan Tuttle
Cc: Chény Yves-Gael
Cc: Ryan Press
Cc: Simon Guinot
Cc: vdo
s detected. I believe it
could probably be extended to cover other use cases such as
modifying the DTB to add the MAC addresses where appropriate. I've
added Jason Cooper in the Cc list if he wants to comment on that.
(3) Continue to manually apply the patches from Willy that add support
Dear Willy Tarreau,
On Thu, 5 Sep 2013 09:44:26 +0200, Willy Tarreau wrote:
> On Thu, Sep 05, 2013 at 09:28:08AM +0200, Thomas Petazzoni wrote:
> > I indeed submitted a revised/improved version of your patches some time
> > ago, but they were rejected. See
> > http:
bout this as well, but I don't think that's possible, the
U-Boot scripting/parsing capabilities seems to be too limited to
achieve that, unfortunately.
Best regards,
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, traini
Mae Roxas
Signed-off-by: Thomas Petazzoni
---
drivers/net/ethernet/marvell/mvneta.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/mvneta.c
b/drivers/net/ethernet/marvell/mvneta.c
index 45beca1..d49f08d 100644
--- a/drivers/net/ethernet/marvell/m
ts with the first bus that
has cell-index = <0>).
This commit fixes that by using of_property_read_u32() to read the
property value, which does the appropriate endianness conversion when
needed.
Fixes: f814f9ac5a81 ("spi/orion: add device tree binding")
Cc: # v3.6+
Signed-off-by:
commit
a7d4f81821f7eec3175f8e23dd6949c71ab2da43 ('ARM: mvebu: Add support for
NOR flash device on Openblocks AX3 board') which was merged in v3.10.
Signed-off-by: Thomas Petazzoni
Link:
https://lkml.kernel.org/r/1397489361-5833-5-git-send-email-thomas.petazz...@free-electrons
da8d1b38356853c37116f9afa29f15648d7fb159 ('ARM: mvebu: Add support for
NOR flash device on Armada XP-GP board') which was merged in v3.10.
Signed-off-by: Thomas Petazzoni
Link:
https://lkml.kernel.org/r/1397489361-5833-3-git-send-email-thomas.petazz...@free-electrons.com
Fixes: da8d1b38
s,bus-width= <16>;
>
> iirc, we did some dts node reshuffling after v3.10. Mind taking a look
> and see if we can get this applied?
Done (for both Armada XP GP and Armada XP OpenBlocks). Thanks for the
notification!
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Free E
those functions, instead
of directly calling the mvebu-mbus driver functions.
Fixes: 45361a4fe446 ('pci: PCIe driver for Marvell Armada 370/XP systems')
Cc: # v3.11+
Signed-off-by: Thomas Petazzoni
Link:
https://lkml.kernel.org/r/1397823593-1932-8-git-send-email-thomas.petazz...@fre
rmada 38x
(which are multiple cores processors), but will no longer be used on
Armada 370 (which is a single core processor).
In the process, it simplifies the implementation of the
coherency_type() function, and adds a missing call to of_node_put().
Signed-off-by: Thomas Petazzoni
urn a physical address of 0 to indicate that the coherency
fabric is not enabled.
Signed-off-by: Thomas Petazzoni
Cc: # v3.8+
---
Technically speaking, this patch is not needed up to 3.8, since the
code was completely different back then. However, the next commit has
to be backported up to 3.8, and r
ng like:
drv_data->offload_enable = !of_property_read_bool(np,
"offload-broken");
Thanks!
Thomas
--
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Embedded Linux, Kernel and Android engineering
http://free-electrons.com
--
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mpatible, and can therefore share the same root compatible strings.
Best regards,
Thomas
--
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Embedded Linux, Kernel and Android engineering
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe stable" in
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More majordomo info at http://vger.kernel.org/majordomo-info.html
s_compatible() and the function it's
calling seem to indicate that of_device_is_compatible will return false
if the passed struct device_node * is NULL.
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
--
To
of of_device_is_compatible() and the function it's
> > calling seem to indicate that of_device_is_compatible will return false
> > if the passed struct device_node * is NULL.
>
> I see.
>
> It seems to me, you already have a patch ready to send. Isn't it ?
> Or
log, add
stable markers.]
Cc: Russell King
Cc: # v3.8+
Fixes: de4901933f6d ("arm: mm: Add support for PJ4B cpu and init routines")
Signed-off-by: Nadav Haklai
Signed-off-by: Thomas Petazzoni
---
This patch is submitted as part of the suspend/resume work, because
the suspend/resu
urn a physical address of 0 to indicate that the coherency
fabric is not enabled.
Signed-off-by: Thomas Petazzoni
Cc: # v3.8+
---
arch/arm/mach-mvebu/coherency_ll.S | 21 +++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-mvebu/coherency_ll.S
b/arc
rmada 38x
(which are multiple cores processors), but will no longer be used on
Armada 370 (which is a single core processor).
In the process, it simplifies the implementation of the
coherency_type() function, and adds a missing call to of_node_put().
Signed-off-by: Thomas Petazzoni
There is a missing of_node_put() to decrement the device_node
reference counter after a of_find_matching_node() in coherency_init().
Fixes: 501f928e0097 ("ARM: mvebu: add a coherency_available() call")
Cc: # v3.16+
Signed-off-by: Thomas Petazzoni
---
arch/arm/mach-mvebu/coherency.c
le pointer.
This commit therefore moves the of_device_id array into the
cs42l51-i2c.c file, and restore the proper .of_match_table pointer.
Fixes: a1253ef6d3fa ("ASoC: cs42l51: split i2c from codec driver")
Cc: # v3.16+
Cc: Arnaud Patard (Rtp)
Cc: Brian Austin
Signed-off-by: Thomas P
same problem as above.
Indeed. Will fix in v4.
> Also, for both this patch and 02/20, it would be better to replace the
> "errN" labels with something more descriptive, so that it's not
> necessary to renumber them every time something changes.
Sure. I've added
to label names.]
Fixes: 8c869edaee07c623066266827371235fb9c12e01 ('ARM: Orion: EHCI: Add support
for enabling clocks')
Cc: # v3.8+
Signed-off-by: Gregory CLEMENT
Signed-off-by: Thomas Petazzoni
---
drivers/usb/host/ehci-orion.c | 45 ---
to label names.]
Fixes: 8c869edaee07c623066266827371235fb9c12e01 ('ARM: Orion: EHCI: Add support
for enabling clocks')
Cc: # v3.8+
Signed-off-by: Gregory CLEMENT
Signed-off-by: Thomas Petazzoni
Acked-by: Alan Stern
---
drivers/usb/host/ehci-orion.c | 45
fixes this issue.
Signed-off-by: Thomas Petazzoni
Cc: # 3.14+
Fixes: af8d1c63afcbf36eea06789c92e22d4af118d2fb ('ARM: mvebu: Add support to
get the ID and the revision of a SoC')
---
arch/arm/mach-mvebu/mvebu-soc-id.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu
Cc: Jason Gunthorpe
Cc: Kevin Hilman
Signed-off-by: Thomas Petazzoni
Cc: # 3.14+
Fixes: af8d1c63afcbf36eea06789c92e22d4af118d2fb ('ARM: mvebu: Add support to
get the ID and the revision of a SoC')
---
arch/arm/mach-mvebu/mvebu-soc-id.c | 14 --
1 file changed, 12 insert
) and
mvebu_hwcc_platform_nb to mvebu_hwcc_nb because they are no longer
specific to platform devices.
Signed-off-by: Thomas Petazzoni
Fixes: e60304f8cb7b ("arm: mvebu: Add hardware I/O Coherency support")
Cc: # v3.8+
---
Applies to mvebu/soc.
Whether this commit qualifies as stable material c
) and
mvebu_hwcc_platform_nb to mvebu_hwcc_nb because they are no longer
specific to platform devices.
Fixes: e60304f8cb7b ("arm: mvebu: Add hardware I/O Coherency support")
Cc: # v3.8+
Signed-off-by: Thomas Petazzoni
---
Changes since v1:
* Fix stupid tab vs. space problem
Applies to mvebu/soc.
Whet
A operations would cause many PL310 cache maintenance
operations, and therefore a high chance of hitting the deadlock.
However, this is only a new problem in 3.16, which has the SMP support
for Armada 375/Armada 38x.
So, as I said, feel free to drop the stable tags :)
Thanks!
Thomas
--
Thomas P
this
kernel release.
Signed-off-by: Thomas Petazzoni
---
drivers/mtd/nand/pxa3xx_nand.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 7588fe2..3003611 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/dr
le,
on both the OpenBlocks AX3 (SGMII configuration) and the Armada XP GP
(RGMII configuration).
Reported-by: Steve McIntyre
Cc: stable@vger.kernel.org # 3.11.x: 5445eaf309ff mvneta: Try to fix mvneta
when compiled as module
Signed-off-by: Thomas Petazzoni
---
drivers/net/
Bit 3 of the MVNETA_GMAC_CTRL_2 is actually used to enable the PCS,
not the PSC: there was a typo in the name of the define, which this
commit fixes.
Cc: stable@vger.kernel.org
Signed-off-by: Thomas Petazzoni
---
This patch is needed for a followup commit that fixes using the mvneta
driver as a
: it tries to access a register from a
hardware unit that isn't clocked.
Cc: stable@vger.kernel.org
Signed-off-by: Thomas Petazzoni
---
arch/arm/boot/dts/armada-370-xp.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi
b/arch/arm/boot/dts/armad
k to you with an
updated patch once I have enough information to write a fix.
Thanks for the report,
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
--
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o be cleared.
Since getting this information is apparently going to take much more
time that I originally hoped, I'm starting to think that the safest and
fastest course of action is indeed to revert this patch.
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android
ivers: memory: Introduce
Marvell EBU Device Bus driver'), which was merged in v3.11.
Signed-off-by: Thomas Petazzoni
Cc: stable@vger.kernel.org
---
drivers/memory/mvebu-devbus.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/memory/mvebu-devbus.c b/drivers/me
k, while RGMII-ID works. This needs
more investigation, but in the mean time, let's unbreak the network
for all those users.
Signed-off-by: Thomas Petazzoni
Reported-by: Arnaud Ebalard
Reported-by: Alexander Reuter
Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=73401
Cc: stable@vger.kern
ied in the datasheet) and not 0x0.
Signed-off-by: Thomas Petazzoni
Cc: stable@vger.kernel.org
---
This should be backported to stable all the way to v3.12.
Signed-off-by: Thomas Petazzoni
---
arch/arm/mach-orion5x/common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/ma
ivers: memory: Introduce
Marvell EBU Device Bus driver'), which was merged in v3.11.
Signed-off-by: Thomas Petazzoni
Cc: stable@vger.kernel.org
---
drivers/memory/mvebu-devbus.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/memory/mvebu-devbus.c b/drivers/me
b484ff42df475c5087d614c4d477273e1906bcb9 ('ARM: mvebu: Add support for
NOR flash device on Armada XP-DB board') which was merged in v3.11.
Signed-off-by: Thomas Petazzoni
Cc: stable@vger.kernel.org
---
arch/arm/boot/dts/armada-xp-db.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
hardware in fact uses a 16 bits bus width.
This commit fixes that by adjusting the conversion logic.
This patch fixes a bug that was introduced in
3edad321b1bd2e6c8b5f38146c115c8982438f06 ('drivers: memory: Introduce
Marvell EBU Device Bus driver'), which was merged in v3.11.
Signed-off-
commit
a7d4f81821f7eec3175f8e23dd6949c71ab2da43 ('ARM: mvebu: Add support for
NOR flash device on Openblocks AX3 board') which was merged in v3.10.
Signed-off-by: Thomas Petazzoni
Cc: stable@vger.kernel.org
---
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 2 +-
1 file changed, 1
da8d1b38356853c37116f9afa29f15648d7fb159 ('ARM: mvebu: Add support for
NOR flash device on Armada XP-GP board') which was merged in v3.10.
Signed-off-by: Thomas Petazzoni
Cc: stable@vger.kernel.org
---
arch/arm/boot/dts/armada-xp-gp.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
ount all the review
comments I've received).
Thanks!
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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.
Maybe an update to stable_kernel_rules.txt is in order? :-)
Thanks again!
Thomas
--
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Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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xes: 31f614edb726fcc4d5aa0f2895fbdec9b04a3ca4 ('irqchip: armada-370-xp:
implement MSI support')
Cc: # v3.13+
Signed-off-by: Thomas Petazzoni
Tested-by: Neil Greatorex
---
drivers/irqchip/irq-armada-370-xp.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/irqchip/irq-armada-370-xp
ca4 ('irqchip: armada-370-xp:
implement MSI support')
Cc: # v3.13+
Signed-off-by: Neil Greatorex
Signed-off-by: Thomas Petazzoni
---
drivers/irqchip/irq-armada-370-xp.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-armada-370-xp.c
b/driver
Fixes: fb52a6c4e2438f4514ed979183653ca0732a ('bus: introduce an Marvell EBU
MBus driver')
Cc: # v3.10+
Signed-off-by: Thomas Petazzoni
Tested-by: Neil Greatorex
---
drivers/bus/mvebu-mbus.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/bus/mvebu-mbus.c b/drivers/bus/mvebu-mbus.
silently accept and round up bogus sizes.
Fix this by adding one to the computed size.
Fixes: 45361a4fe4464180815157654aabbd2afb4848ad ('PCIe driver for Marvell
Armada 370/XP systems')
Cc: # v3.11+
Signed-off-by: Willy Tarreau
Reviewed-By: Jason Gunthorpe
Signed-off-by: Thomas Petazzoni
those functions, instead
of directly calling the mvebu-mbus driver functions.
Fixes: 45361a4fe4464180815157654aabbd2afb4848ad ('pci: PCIe driver for Marvell
Armada 370/XP systems')
Cc: # v3.11+
Signed-off-by: Thomas Petazzoni
Tested-by: Neil Greatorex
---
drivers/pci/host/p
ned-off-by: Thomas Petazzoni
Tested-by: Neil Greatorex
---
drivers/irqchip/irq-armada-370-xp.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-armada-370-xp.c
b/drivers/irqchip/irq-armada-370-xp.c
index 41be897..3c8d89b 100644
--- a/drivers/irqchip/irq-armad
hardware in fact uses a 16 bits bus width.
This commit fixes that by adjusting the conversion logic.
This patch fixes a bug that was introduced in
3edad321b1bd2e6c8b5f38146c115c8982438f06 ('drivers: memory: Introduce
Marvell EBU Device Bus driver'), which was merged in v3.11.
Signed-off-
ied in the datasheet) and not 0x0.
Signed-off-by: Thomas Petazzoni
Cc: stable@vger.kernel.org
---
This should be backported to stable all the way to v3.12.
Signed-off-by: Thomas Petazzoni
---
arch/arm/mach-orion5x/common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/ma
rency workaround"), but it was not
visible until now since it didn't cause any problem when HW I/O
coherency is enabled.
Signed-off-by: Thomas Petazzoni
Cc: v3.16..v3.18
---
arch/arm/mach-mvebu/coherency.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/a
Dear Baruch Siach,
On Thu, 12 Mar 2015 12:57:08 +0200, Baruch Siach wrote:
> > It does make a lot of sense to backport this commit entirely, since it
>
> "It does not" maybe?
Obviously, thanks for spotting. I'll send a v2 that fixes that.
Thanks,
Thomas
--
a 375 coherency workaround"), but it was not
visible until now since it didn't cause any problem when HW I/O
coherency is enabled.
Signed-off-by: Thomas Petazzoni
Cc: v3.16..v3.18
---
arch/arm/mach-mvebu/coherency.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/ar
ot plug support also uses some of the CPU Idle functions it is
> also affected by the same issue. This patch disables it also for the
> Armada 38x SoCs.
>
> Signed-off-by: Gregory CLEMENT
> Cc: # v3.17 +
Tested-by: Thomas Petazzoni
I tested on Armada 38x, and indeed CPU hotplu
eading the
received data if needed.
This commit was tested on:
- Armada XP OpenBlocks AX3-4 (EEPROM on I2C and RTC on I2C)
- Armada XP WRT1900AC (LED controller on I2C)
- Armada XP GP (EEPROM on I2C)
Fixes: 930ab3d403ae ("i2c: mv64xxx: Add I2C Transaction Generator support")
nd we can reasonably verify that this assumption is also
true for the limited number of platform drivers doing DMA used on
Marvell EBU platforms.
Fixes: fb52a6c4 ("bus: introduce an Marvell EBU MBus driver")
Cc: # v3.10+
Signed-off-by: Thomas Petazzoni
---
Due to the coherent mapping
are I/O Coherency support")
Cc: # v3.8+
Signed-off-by: Thomas Petazzoni
---
arch/arm/mach-mvebu/coherency.c | 51 ++---
1 file changed, 2 insertions(+), 49 deletions(-)
diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c
ind
.
Fixes: 4de59085091 ("ARM: mvebu: add Device Tree description of the Armada 375
SoC")
Fixes: 0d3d96ab005 ("ARM: mvebu: add Device Tree description of the Armada
380/385 SoCs")
Cc: # v3.15+
Signed-off-by: Thomas Petazzoni
---
arch/arm/boot/dts/armada-375.dtsi | 2 +-
arch
8X because the window 13 of Armada
370 does not support the remap capability.
[Thomas: adapted for the mainline kernel, minor clarifications in the
code, reword the commit log.]
Fixes: fb52a6c ("bus: introduce an Marvell EBU MBus driver")
Cc: # v3.10+
Signed-off-by: Michal Mazu
5491ce3f79ee ("mmc: sdhci-pxav3: add support for the Armada 38x SDHCI
controller")
Cc: # v3.15+
Signed-off-by: Thomas Petazzoni
---
drivers/mmc/host/sdhci-pxav3.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/mmc/host/sdhci-pxav3.c b/dr
ng code around, the error handling should also be fixed. You
probably need "goto put_hcd;" instead of "return ret;".
Thanks,
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
--
To unsubscribe from
G_SMP configurations on Armada XP, Armada 375 and Armada 38x
(which are multiple cores processors), but will no longer be used on
Armada 370 (which is a single core processor).
Signed-off-by: Thomas Petazzoni
Fixes: e60304f8cb7bb545e79fe62d9b9762460c254ec2 ("arm: mvebu: Add hardware I/O
Coheren
G_SMP configurations on Armada XP, Armada 375 and Armada 38x
(which are multiple cores processors), but will no longer be used on
Armada 370 (which is a single core processor).
Signed-off-by: Thomas Petazzoni
Fixes: e60304f8cb7bb545e79fe62d9b9762460c254ec2 ("arm: mvebu: Add hardware I/O
Coheren
solution based on
automatic I/O synchronization barriers, this commit disables hardware
I/O coherency entirely. Future patches will re-enable it.
Signed-off-by: Thomas Petazzoni
Cc: # v3.8+
---
Due to the coherent mapping problem, the I/O coherency has in fact
been broken since its introduction, which
gt; > Cc: # v3.10+
> > Signed-off-by: Michal Mazur
> > Signed-off-by: Thomas Petazzoni
>
> I merged in the revert of the simple fix for window 13. So the end
> patch is below.
>
> merged into mvebu/soc
Quickly looked at it, it looks fine to me.
Thanks again for handli
le pointer.
This commit exports the of_device_id array in cs42l51, and uses it as
.of_match_able in cs42l51-i2c.c. This solution was suggested by Brian
Austin.
Fixes: a1253ef6d3fa ("ASoC: cs42l51: split i2c from codec driver")
Cc: # v3.16+
Cc: Arnaud Patard (Rtp)
Cc: Brian Austin
S
urn a physical address of 0 to indicate that the coherency
fabric is not enabled.
Signed-off-by: Thomas Petazzoni
Cc: # v3.8+
Acked-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/coherency_ll.S | 21 +++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-
ff-by: Thomas Petazzoni
Fixes: e60304f8cb7bb545e79fe62d9b9762460c254ec2 ("arm: mvebu: Add hardware I/O
Coherency support")
Cc: # v3.8+
Acked-by: Gregory CLEMENT
---
arch/arm/mach-mvebu/coherency.c | 44 -
1 file changed, 30 insertions(+), 14 del
manipulate the DT in the
early assembly code, or 2/ make sure that the initialization done in
the assembly code can be overridden later.
What do you think?
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
--
ble with doing a
multi-platform kernel.
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe stable" in
the body of a message to majord...@vger.ke
log, add
stable markers.]
Cc: Russell King
Cc: # v3.8+
Fixes: de4901933f6d ("arm: mm: Add support for PJ4B cpu and init routines")
Signed-off-by: Nadav Haklai
Signed-off-by: Thomas Petazzoni
Acked-by: Gregory CLEMENT
---
This patch is submitted as part of the suspend/resume work, b
log, add
stable markers.]
Cc: Russell King
Cc: # v3.8+
Fixes: de4901933f6d ("arm: mm: Add support for PJ4B cpu and init routines")
Signed-off-by: Nadav Haklai
Signed-off-by: Thomas Petazzoni
Acked-by: Gregory CLEMENT
---
This patch is submitted as part of the suspend/resume work, b
veloper/patches/viewpatch.php?id=8222/1.
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe stable" in
the body of a message to majord...@vger.
8X because the window 13 of Armada
370 does not support the remap capability.
[Thomas: adapted for the mainline kernel, minor clarifications in the
code, reword the commit log.]
Fixes: fb52a6c ("bus: introduce an Marvell EBU MBus driver")
Cc: # v3.10+
Signed-off-by: Michal Mazu
.
Fixes: 4de59085091 ("ARM: mvebu: add Device Tree description of the Armada 375
SoC")
Fixes: 0d3d96ab005 ("ARM: mvebu: add Device Tree description of the Armada
380/385 SoCs")
Cc: # v3.15+
Signed-off-by: Thomas Petazzoni
---
arch/arm/boot/dts/armada-375.dtsi | 2 +-
arch
After updating to a more recent version of the Armada XP datasheet, we
realized that some of the pins documented as having a NAND-related
functionality in fact did not have such functionality. This commit
updates the pinctrl driver accordingly.
Signed-off-by: Thomas Petazzoni
Cc: # v3.7+
Fixes
After updating to a more recent version of the Armada 375, we realized
that some of the pins documented as having a NAND-related
functionality in fact did not have such functionality. This commit
updates the pinctrl driver accordingly.
Signed-off-by: Thomas Petazzoni
Cc: # v3.15+
Fixes
There was an incorrect space in the definition of the function of one
pin in the Armada 375 pinctrl driver, which this commit fixes.
Signed-off-by: Thomas Petazzoni
Cc: # v3.15+
Fixes: ce3ed59dcddd ("pinctrl: mvebu: add pin-muxing driver for the Marvell
Armada 375")
---
drivers/pin
The latest version of the Armada XP datasheet no longer documents the
VDD cpu_pd functions, which might indicate they are not working and/or
not supported. This commit ensures the pinctrl driver matches the
datasheet.
Signed-off-by: Thomas Petazzoni
Cc: # v3.7+
Fixes: 463e270f766a ("pi
There was a mistake in the definition of the functions for MPP48 on
Marvell Armada XP. The second function is dev(clkout), and not tclk.
Signed-off-by: Thomas Petazzoni
Cc: # v3.7+
Fixes: 463e270f766a ("pinctrl: mvebu: add pinctrl driver for Armada XP")
---
Documentation/devicetre
Due to a mistake, the CS0 and CS1 SPI0 functions were incorrectly
named "spi0-1" instead of just "spi0". This commit fixes that.
This DT binding change does not affect any of the in-tree users.
Signed-off-by: Thomas Petazzoni
Cc: # v3.7+
Fixes: 5f597bb2be57 ("pinctrl:
The pinctrl_gpio_range[] array described a first bank of 32 GPIOs and
a second one of 27 GPIOs. However, since there is a total of 60 MPP
pins that can be muxed as GPIOs, the second bank really has 28 GPIOs.
Signed-off-by: Thomas Petazzoni
Cc: # v3.15+
Fixes: ca6d9a084b56f ("pinctrl: mvebu
The pinctrl_gpio_range[] array described a first bank of 32 GPIOs and
a second one of 27 GPIOs. However, since there is a total of 60 MPP
pins that can be muxed as GPIOs, the second bank really has 28 GPIOs.
Signed-off-by: Thomas Petazzoni
Cc: # v4.1+
Fixes: ee086577abe7f ("pinctrl: mvebu
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