From: Ville Syrjälä
This patch has been added to the 3.12 stable tree. If you have any
objections, please let us know.
===
commit 8e7a65aa70bcc1235a44e40ae0da5056525fe081 upstream.
We accidentally lost the initial DPLL register write in
1c4e02746147 drm/i915: Fix DVO 2x clock enabl
On Mon, Nov 09, 2015 at 12:56:24PM +0100, Jiri Slaby wrote:
> From: Ville Syrjälä
>
> This patch has been added to the 3.12 stable tree. If you have any
> objections, please let us know.
>
> ===
>
> commit 8e7a65aa70bcc1235a44e40ae0da5056525fe081 upstream.
>
> We accidentally lost
On 11/11/2015, 11:25 PM, Luis Henriques wrote:
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -1379,6 +1379,8 @@ static void i9xx_enable_pll(struct intel_crtc *crtc)
>>
>> I915_WRITE(reg, dpll);
>>
>> +I915_WRITE(reg, dpll);
>> +
>
>