This is a note to let you know that I've just added the patch titled

    drm/i915: Fix GT_MODE default value

to the 3.6-stable tree which can be found at:
    
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-i915-fix-gt_mode-default-value.patch
and it can be found in the queue-3.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.


>From f8f2ac9a76b0f80a6763ca316116a7bab8486997 Mon Sep 17 00:00:00 2001
From: Ben Widawsky <b...@bwidawsk.net>
Date: Wed, 3 Oct 2012 19:34:24 -0700
Subject: drm/i915: Fix GT_MODE default value

From: Ben Widawsky <b...@bwidawsk.net>

commit f8f2ac9a76b0f80a6763ca316116a7bab8486997 upstream.

I can't even find how I figured this might be needed anymore. But sure
enough, the value I'm reading back on platforms doesn't match what the
docs recommends.

It seemed to fix Chris' GT1 in limited testing as well.

Tested-by: Chris Wilson <ch...@chris-wilson.co.uk>
Signed-off-by: Ben Widawsky <b...@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vet...@ffwll.ch>
Signed-off-by: Greg Kroah-Hartman <gre...@linuxfoundation.org>

---
 drivers/gpu/drm/i915/i915_reg.h |    3 +++
 drivers/gpu/drm/i915/intel_pm.c |    5 +++++
 2 files changed, 8 insertions(+)

--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -519,6 +519,9 @@
 # define VS_TIMER_DISPATCH                             (1 << 6)
 # define MI_FLUSH_ENABLE                               (1 << 12)
 
+#define GEN6_GT_MODE   0x20d0
+#define   GEN6_GT_MODE_HI      (1 << 9)
+
 #define GFX_MODE       0x02520
 #define GFX_MODE_GEN7  0x0229c
 #define RING_MODE_GEN7(ring)   ((ring)->mmio_base+0x29c)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3387,6 +3387,11 @@ static void gen6_init_clock_gating(struc
                           DISPPLANE_TRICKLE_FEED_DISABLE);
                intel_flush_display_plane(dev_priv, pipe);
        }
+
+       /* The default value should be 0x200 according to docs, but the two
+        * platforms I checked have a 0 for this. (Maybe BIOS overrides?) */
+       I915_WRITE(GEN6_GT_MODE, _MASKED_BIT_DISABLE(0xffff));
+       I915_WRITE(GEN6_GT_MODE, _MASKED_BIT_ENABLE(GEN6_GT_MODE_HI));
 }
 
 static void gen7_setup_fixed_func_scheduler(struct drm_i915_private *dev_priv)


Patches currently in stable-queue which might be from b...@bwidawsk.net are

queue-3.6/drm-i915-fix-gt_mode-default-value.patch
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