Author: imp
Date: Sun Jan 10 19:39:08 2010
New Revision: 202027
URL: http://svn.freebsd.org/changeset/base/202027
Log:
Merge from projects/mips to head by hand:
r201881 | imp | 2010-01-08 20:08:22 -0700 (Fri, 08 Jan 2010) | 3 lines
Rename mips_pcpu_init to mips_pcpu0_init since it applies only to the
BSP. Provide a missing prototype.
r201845 | imp | 2010-01-08 15:48:21 -0700 (Fri, 08 Jan 2010) | 2 lines
Centralize initialization of pcpu, and set curthread early...
r198669 | rrs | 2009-10-30 02:53:11 -0600 (Fri, 30 Oct 2009) | 5 lines
With this commit our friend RMI will now compile. I have
not tested it and the chances of it running yet are about
ZERO.. but it will now compile. The hard part now begins,
making it run ;-)
r198154 | rrs | 2009-10-15 15:03:32 -0600 (Thu, 15 Oct 2009) | 10 lines
Does 4 things:
1) Adds future RMI directories
2) Places intr_machdep.c in specfic files.arch pointing to the generic
intr_machdep.c. This allows us to have an architecture dependant
intr_machdep.c (which we will need for RMI) in the machine specific
directory
3) removes intr_machdep.c from files.mips
4) Adds some TARGET_XLR_XLS ifdef's for the machine specific intra_machdep.h.
We
may need to look at finding a better place to put this. But first I want to
get this thing compiling.
r194216 | gonzo | 2009-06-14 15:16:23 -0600 (Sun, 14 Jun 2009) | 2 lines
- Fix prototypes to make compiler happy
r194215 | gonzo | 2009-06-14 15:16:04 -0600 (Sun, 14 Jun 2009) | 2 lines
- Get rid of mask_fn and fix pre_filter/post_filter functions' prototypes
r191282 | gonzo | 2009-04-19 16:02:14 -0600 (Sun, 19 Apr 2009) | 3 lines
- Make mips_bus_space_generic be of type bus_space_tag_t instead of
struct bus_space and update all relevant places.
r191084 | gonzo | 2009-04-14 20:28:26 -0600 (Tue, 14 Apr 2009) | 6 lines
Use FreeBSD/arm approach for handling bus space access: space tag is a pointer
to bus_space structure that defines access methods and hence every bus can
define own accessors. Default space is mips_bus_space_generic. It's a simple
interface to physical memory, values are read with regard to host system
byte order.
Modified:
head/sys/mips/idt/files.idt
head/sys/mips/idt/idt_machdep.c
head/sys/mips/idt/obio.c
head/sys/mips/idt/uart_bus_rc32434.c
head/sys/mips/idt/uart_cpu_rc32434.c
Modified: head/sys/mips/idt/files.idt
==============================================================================
--- head/sys/mips/idt/files.idt Sun Jan 10 19:21:23 2010 (r202026)
+++ head/sys/mips/idt/files.idt Sun Jan 10 19:39:08 2010 (r202027)
@@ -6,3 +6,5 @@ mips/idt/if_kr.c optional kr
mips/idt/obio.c standard
mips/idt/uart_cpu_rc32434.c optional uart
mips/idt/uart_bus_rc32434.c optional uart
+mips/mips/intr_machdep.c standard
+mips/mips/tick.c standard
Modified: head/sys/mips/idt/idt_machdep.c
==============================================================================
--- head/sys/mips/idt/idt_machdep.c Sun Jan 10 19:21:23 2010
(r202026)
+++ head/sys/mips/idt/idt_machdep.c Sun Jan 10 19:39:08 2010
(r202027)
@@ -76,6 +76,12 @@ extern int *edata;
extern int *end;
void
+platform_cpu_init()
+{
+ /* Nothing special */
+}
+
+void
platform_halt(void)
{
@@ -131,6 +137,9 @@ platform_start(__register_t a0, __regist
kernend = round_page((vm_offset_t)&end);
memset(&edata, 0, kernend - (vm_offset_t)(&edata));
+ /* Initialize pcpu stuff */
+ mips_pcpu0_init();
+
/*
* Looking for mem=XXM argument
*/
Modified: head/sys/mips/idt/obio.c
==============================================================================
--- head/sys/mips/idt/obio.c Sun Jan 10 19:21:23 2010 (r202026)
+++ head/sys/mips/idt/obio.c Sun Jan 10 19:39:08 2010 (r202027)
@@ -76,8 +76,10 @@ static int obio_setup_intr(device_t, dev
static int obio_teardown_intr(device_t, device_t, struct resource *,
void *);
-static void obio_mask_irq(unsigned int irq)
+static void
+obio_mask_irq(void *arg)
{
+ unsigned int irq = (unsigned int)arg;
int ip_bit, mask, mask_register;
/* mask IRQ */
@@ -88,8 +90,10 @@ static void obio_mask_irq(unsigned int i
ICU_REG_WRITE(mask_register, mask | ip_bit);
}
-static void obio_unmask_irq(unsigned int irq)
+static void
+obio_unmask_irq(void *arg)
{
+ unsigned int irq = (unsigned int)arg;
int ip_bit, mask, mask_register;
/* unmask IRQ */
@@ -274,7 +278,7 @@ obio_setup_intr(device_t dev, device_t c
event = sc->sc_eventstab[irq];
if (event == NULL) {
error = intr_event_create(&event, (void *)irq, 0, irq,
- (mask_fn)obio_mask_irq, (mask_fn)obio_unmask_irq,
+ obio_mask_irq, obio_unmask_irq,
NULL, NULL,
"obio intr%d:", irq);
Modified: head/sys/mips/idt/uart_bus_rc32434.c
==============================================================================
--- head/sys/mips/idt/uart_bus_rc32434.c Sun Jan 10 19:21:23 2010
(r202026)
+++ head/sys/mips/idt/uart_bus_rc32434.c Sun Jan 10 19:39:08 2010
(r202027)
@@ -88,10 +88,10 @@ uart_rc32434_probe(device_t dev)
sc->sc_class = &uart_ns8250_class;
bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
sc->sc_sysdev->bas.regshft = 2;
- sc->sc_sysdev->bas.bst = 0;
+ sc->sc_sysdev->bas.bst = mips_bus_space_generic;
sc->sc_sysdev->bas.bsh = MIPS_PHYS_TO_KSEG1(IDT_BASE_UART0);
sc->sc_bas.regshft = 2;
- sc->sc_bas.bst = 0;
+ sc->sc_bas.bst = mips_bus_space_generic;
sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(IDT_BASE_UART0);
return (uart_bus_probe(dev, 2, 330000000UL/2, 0, 0));
Modified: head/sys/mips/idt/uart_cpu_rc32434.c
==============================================================================
--- head/sys/mips/idt/uart_cpu_rc32434.c Sun Jan 10 19:21:23 2010
(r202026)
+++ head/sys/mips/idt/uart_cpu_rc32434.c Sun Jan 10 19:39:08 2010
(r202027)
@@ -71,7 +71,7 @@ uart_cpu_getdev(int devtype, struct uart
/* Got it. Fill in the instance and return it. */
di->ops = uart_getops(&uart_ns8250_class);
di->bas.chan = 0;
- di->bas.bst = 0;
+ di->bas.bst = mips_bus_space_generic;
di->bas.regshft = 2;
di->bas.rclk = 330000000UL/2; /* IPbus clock */
di->baudrate = 115200;
@@ -79,7 +79,7 @@ uart_cpu_getdev(int devtype, struct uart
di->stopbits = 1;
di->parity = UART_PARITY_NONE;
uart_bus_space_io = 0;
- uart_bus_space_mem = 0;
+ uart_bus_space_mem = mips_bus_space_generic;
di->bas.bsh = MIPS_PHYS_TO_KSEG1(maddr);
return (0);
}
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