Author: imp
Date: Sun Jan 19 17:45:13 2014
New Revision: 260884
URL: http://svnweb.freebsd.org/changeset/base/260884
Log:
Add standard memory controller helper functions.
Added:
head/sys/arm/at91/at91_smc.c (contents, props changed)
head/sys/arm/at91/at91_smc.h (contents, props changed)
Modified:
head/sys/arm/at91/files.at91
Added: head/sys/arm/at91/at91_smc.c
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm/at91/at91_smc.c Sun Jan 19 17:45:13 2014
(r260884)
@@ -0,0 +1,91 @@
+/*-
+ * Copyright (c) 2014 M. Warner Losh. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/types.h>
+
+#include <arm/at91/at91reg.h>
+#include <arm/at91/at91_smc.h>
+#include <arm/at91/at91sam9260reg.h>
+
+/*
+ * RD4HW()/WR4HW() read and write at91 hardware register space directly. They
+ * serve the same purpose as the RD4()/WR4() idiom you see in many drivers,
+ * except that those translate to bus_space calls, but in this code we need to
+ * access some devices before bus_space is ready to use. Of course for this to
+ * work the appropriate static device mappings need to be made in machdep.c.
+ */
+static inline uint32_t
+RD4HW(uint32_t devbase, uint32_t regoff)
+{
+
+ return *(volatile uint32_t *)(AT91_BASE + devbase + regoff);
+}
+
+
+static inline void
+WR4HW(uint32_t devbase, uint32_t regoff, uint32_t val)
+{
+
+ *(volatile uint32_t *)(AT91_BASE + devbase + regoff) = val;
+}
+
+
+void
+at91_smc_setup(int id, int cs, const struct at91_smc_init *smc)
+{
+ // Need a generic way to get this address for all SoCs... Assume 9260
for now...
+ uint32_t base = AT91SAM9260_SMC_BASE + SMC_CS_OFF(cs);
+
+ WR4HW(base, SMC_SETUP, SMC_SETUP_NCS_RD_SETUP(smc->ncs_rd_setup) |
+ SMC_SETUP_NRD_SETUP(smc->nrd_setup) |
+ SMC_SETUP_NCS_WR_SETUP(smc->ncs_wr_setup) |
+ SMC_SETUP_NWE_SETUP(smc->nwe_setup));
+ WR4HW(base, SMC_PULSE, SMC_PULSE_NCS_RD_PULSE(smc->ncs_rd_pulse) |
+ SMC_PULSE_NRD_PULSE(smc->nrd_pulse) |
+ SMC_PULSE_NCS_WR_PULSE(smc->ncs_wr_pulse) |
+ SMC_PULSE_NWE_PULSE(smc->nwe_pulse));
+ WR4HW(base, SMC_CYCLE, SMC_CYCLE_NRD_CYCLE(smc->nrd_cycle) |
+ SMC_CYCLE_NWE_CYCLE(smc->nwe_cycle));
+ WR4HW(base, SMC_MODE, smc->mode | SMC_MODE_TDF_CYCLES(smc->tdf_cycles));
+}
+
+void
+at91_ebi_enable(int bank)
+{
+
+ WR4HW(AT91SAM9260_MATRIX_BASE, AT91SAM9260_EBICSA, (1 << bank) |
+ RD4HW(AT91SAM9260_MATRIX_BASE, AT91SAM9260_EBICSA));
+}
+
+void
+at91_ebi_disable(int bank)
+{
+
+ WR4HW(AT91SAM9260_MATRIX_BASE, AT91SAM9260_EBICSA, ~(1 << bank) &
+ RD4HW(AT91SAM9260_MATRIX_BASE, AT91SAM9260_EBICSA));
+}
Added: head/sys/arm/at91/at91_smc.h
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm/at91/at91_smc.h Sun Jan 19 17:45:13 2014
(r260884)
@@ -0,0 +1,116 @@
+/*-
+ * Copyright (c) 2014 M. Warner Losh. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/* $FreeBSD$ */
+
+#ifndef ARM_AT91_AT91_SMC_H
+#define ARM_AT91_AT91_SMC_H
+
+/* Registers */
+#define SMC_SETUP 0x00
+#define SMC_PULSE 0x04
+#define SMC_CYCLE 0x08
+#define SMC_MODE 0x0C
+
+#define SMC_CS_OFF(cs) (0x10 * (cs))
+
+/* Setup */
+#define SMC_SETUP_NCS_RD_SETUP(x) ((x) << 24)
+#define SMC_SETUP_NRD_SETUP(x) ((x) << 16)
+#define SMC_SETUP_NCS_WR_SETUP(x) ((x) << 8)
+#define SMC_SETUP_NWE_SETUP(x) (x)
+
+/* Pulse */
+#define SMC_PULSE_NCS_RD_PULSE(x) ((x) << 24)
+#define SMC_PULSE_NRD_PULSE(x) ((x) << 16)
+#define SMC_PULSE_NCS_WR_PULSE(x) ((x) << 8)
+#define SMC_PULSE_NWE_PULSE(x) (x)
+
+/* Cycle */
+#define SMC_CYCLE_NRD_CYCLE(x) ((x) << 16)
+#define SMC_CYCLE_NWE_CYCLE(x) (x)
+
+/* Mode */
+#define SMC_MODE_READ (1 << 0)
+#define SMC_MODE_WRITE (1 << 1)
+#define SMC_MODE_EXNW_DISABLED (0 << 4)
+#define SMC_MODE_EXNW_FROZEN_MODE (2 << 4)
+#define SMC_MODE_EXNW_READY_MODE (3 << 4)
+#define SMC_MODE_BAT (1 << 8)
+#define SMC_MODE_DBW_8BIT (0 << 12)
+#define SMC_MODE_DBW_16BIT (1 << 12)
+#define SMC_MODE_DBW_32_BIT (2 << 12)
+#define SMC_MODE_TDF_CYCLES(x) ((x) << 16)
+#define SMC_MODE_TDF_MODE (1 << 20)
+#define SMC_MODE_PMEN (1 << 24)
+#define SMC_PS_4BYTE (0 << 28)
+#define SMC_PS_8BYTE (1 << 28)
+#define SMC_PS_16BYTE (2 << 28)
+#define SMC_PS_32BYTE (3 << 28)
+
+/*
+ * structure to ease init. See the SMC chapter in the datasheet for
+ * the appropriate SoC you are using for details.
+ */
+struct at91_smc_init
+{
+ /* Setup register */
+ uint8_t ncs_rd_setup;
+ uint8_t nrd_setup;
+ uint8_t ncs_wr_setup;
+ uint8_t nwe_setup;
+
+ /* Pulse register */
+ uint8_t ncs_rd_pulse;
+ uint8_t nrd_pulse;
+ uint8_t ncs_wr_pulse;
+ uint8_t nwe_pulse;
+
+ /* Cycle register */
+ uint16_t nrd_cycle;
+ uint16_t nwe_cycle;
+
+ /* Mode register */
+ uint8_t mode; /* Combo of READ/WRITE/EXNW fields */
+ uint8_t bat;
+ uint8_t dwb;
+ uint8_t tdf_cycles;
+ uint8_t tdf_mode;
+ uint8_t pmen;
+ uint8_t ps;
+};
+
+/*
+ * Convenience routine to fill in SMC registers for a given chip select.
+ */
+void at91_smc_setup(int id, int cs, const struct at91_smc_init *smc);
+
+/*
+ * Disable/Enable different External Bus Interfaces (EBI)
+ */
+void at91_ebi_enable(int cs);
+void at91_ebi_disable(int cs);
+
+#endif /* ARM_AT91_AT91_SMC_H */
Modified: head/sys/arm/at91/files.at91
==============================================================================
--- head/sys/arm/at91/files.at91 Sun Jan 19 16:37:57 2014
(r260883)
+++ head/sys/arm/at91/files.at91 Sun Jan 19 17:45:13 2014
(r260884)
@@ -12,6 +12,7 @@ arm/at91/at91_pit.c optional at91sam9
arm/at91/at91_reset.S optional at91sam9
arm/at91/at91_rst.c optional at91sam9
arm/at91/at91_rtc.c optional at91_rtc
+arm/at91/at91_smc.c standard
arm/at91/at91_spi.c optional at91_spi \
dependency "spibus_if.h"
arm/at91/at91_ssc.c optional at91_ssc
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