Author: nwhitehorn
Date: Mon Feb 9 19:21:54 2015
New Revision: 278471
URL: https://svnweb.freebsd.org/changeset/base/278471
Log:
Distribute interrupts across multiple CPUs in SMP configurations instead of
sending them
all to CPU 0.
Modified:
head/sys/powerpc/pseries/xics.c
Modified: head/sys/powerpc/pseries/xics.c
==============================================================================
--- head/sys/powerpc/pseries/xics.c Mon Feb 9 19:20:59 2015
(r278470)
+++ head/sys/powerpc/pseries/xics.c Mon Feb 9 19:21:54 2015
(r278471)
@@ -197,13 +197,25 @@ xicp_bind(device_t dev, u_int irq, cpuse
{
struct xicp_softc *sc = device_get_softc(dev);
cell_t status, cpu;
+ int ncpus, i;
/*
- * This doesn't appear to actually support affinity groups, so just
- * use the first CPU.
+ * This doesn't appear to actually support affinity groups, so pick a
+ * random CPU.
*/
CPU_FOREACH(cpu)
- if (CPU_ISSET(cpu, &cpumask)) break;
+ if (CPU_ISSET(cpu, &cpumask)) ncpus++;
+
+ i = mftb() % ncpus;
+ ncpus = 0;
+ CPU_FOREACH(cpu) {
+ if (!CPU_ISSET(cpu, &cpumask))
+ continue;
+ if (ncpus == i)
+ break;
+ ncpus++;
+ }
+
rtas_call_method(sc->ibm_set_xive, 3, 1, irq, cpu, XICP_PRIORITY,
&status);
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