Author: br
Date: Fri Oct 12 15:51:41 2018
New Revision: 339332
URL: https://svnweb.freebsd.org/changeset/base/339332
Log:
Initialize interrupt priority to 0 on all sources.
Without this hardware raises an interrupt regardless of any
pending bits set.
This fixes operation on RocketChip and derivatives (e.g. lowRISC).
Approved by: re (kib)
Sponsored by: DARPA, AFRL
Modified:
head/sys/riscv/riscv/plic.c
Modified: head/sys/riscv/riscv/plic.c
==============================================================================
--- head/sys/riscv/riscv/plic.c Fri Oct 12 15:30:15 2018 (r339331)
+++ head/sys/riscv/riscv/plic.c Fri Oct 12 15:51:41 2018 (r339332)
@@ -218,6 +218,7 @@ plic_attach(device_t dev)
if (error != 0)
return (error);
+ WR4(sc, PLIC_PRIORITY(irq), 0);
WR4(sc, PLIC_ENABLE(irq, cpu), 0);
}
WR4(sc, PLIC_THRESHOLD(cpu), 0);
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