Author: jchandra
Date: Mon Sep 13 13:11:50 2010
New Revision: 212553
URL: http://svn.freebsd.org/changeset/base/212553
Log:
sys/mips/rmi/msgring.h - fixes and clean up.
- Remove sync from msgrng_send, sync needs to be called just once before
sending.
- Fix retry logic - don't reload registers when retrying in message_send,
also fix check for send pending fail.
- remove unused message_send_block_fast()
- merge message_receive_fast() to message_receive
- style(9) fixes, and comments
- rge and nlge updated for the sys/mips/rmi/msgring.h changes
Modified:
head/sys/mips/rmi/dev/nlge/if_nlge.c
head/sys/mips/rmi/dev/xlr/rge.c
head/sys/mips/rmi/msgring.h
Modified: head/sys/mips/rmi/dev/nlge/if_nlge.c
==============================================================================
--- head/sys/mips/rmi/dev/nlge/if_nlge.c Mon Sep 13 11:58:42 2010
(r212552)
+++ head/sys/mips/rmi/dev/nlge/if_nlge.c Mon Sep 13 13:11:50 2010
(r212553)
@@ -1035,7 +1035,7 @@ nlna_submit_rx_free_desc(struct nlna_sof
n = 0;
do {
msgrng_flags = msgrng_access_enable();
- ret = message_send_retry(1, code, stid, &msg);
+ ret = message_send(1, code, stid, &msg);
msgrng_restore(msgrng_flags);
KASSERT(n++ < 100000, ("Too many credit fails\n"));
} while (ret != 0);
@@ -1960,7 +1960,7 @@ send_fmn_msg_tx(struct nlge_softc *sc, s
do {
msgrng_flags = msgrng_access_enable();
- ret = message_send_retry(n_entries, MSGRNG_CODE_MAC,
+ ret = message_send(n_entries, MSGRNG_CODE_MAC,
sc->tx_bucket_id, msg);
msgrng_restore(msgrng_flags);
KASSERT(i++ < 100000, ("Too many credit fails\n"));
Modified: head/sys/mips/rmi/dev/xlr/rge.c
==============================================================================
--- head/sys/mips/rmi/dev/xlr/rge.c Mon Sep 13 11:58:42 2010
(r212552)
+++ head/sys/mips/rmi/dev/xlr/rge.c Mon Sep 13 13:11:50 2010
(r212553)
@@ -731,7 +731,7 @@ xlr_mac_send_fr(struct driver_data *priv
do {
msgrng_flags = msgrng_access_enable();
- ret = message_send_retry(1, code, stid, &msg);
+ ret = message_send(1, code, stid, &msg);
msgrng_restore(msgrng_flags);
KASSERT(i++ < 100000, ("Too many credit fails\n"));
} while (ret != 0);
@@ -1468,7 +1468,7 @@ mac_xmit(struct mbuf *m, struct rge_soft
else {
mflags = msgrng_access_enable();
- if ((rv = message_send_retry(1, MSGRNG_CODE_MAC, stid, &msg))
!= 0) {
+ if ((rv = message_send(1, MSGRNG_CODE_MAC, stid, &msg)) != 0) {
msg_snd_failed++;
msgrng_restore(mflags);
release_tx_desc(&msg, 0);
Modified: head/sys/mips/rmi/msgring.h
==============================================================================
--- head/sys/mips/rmi/msgring.h Mon Sep 13 11:58:42 2010 (r212552)
+++ head/sys/mips/rmi/msgring.h Mon Sep 13 13:11:50 2010 (r212553)
@@ -46,16 +46,16 @@
#define MSGRNG_MSG_CONFIG_REG 3
#define MSGRNG_MSG_BUCKSIZE_REG 4
-#define MSGRNG_CC_0_REG 16
-#define MSGRNG_CC_1_REG 17
-#define MSGRNG_CC_2_REG 18
-#define MSGRNG_CC_3_REG 19
-#define MSGRNG_CC_4_REG 20
-#define MSGRNG_CC_5_REG 21
-#define MSGRNG_CC_6_REG 22
-#define MSGRNG_CC_7_REG 23
-#define MSGRNG_CC_8_REG 24
-#define MSGRNG_CC_9_REG 25
+#define MSGRNG_CC_0_REG 16
+#define MSGRNG_CC_1_REG 17
+#define MSGRNG_CC_2_REG 18
+#define MSGRNG_CC_3_REG 19
+#define MSGRNG_CC_4_REG 20
+#define MSGRNG_CC_5_REG 21
+#define MSGRNG_CC_6_REG 22
+#define MSGRNG_CC_7_REG 23
+#define MSGRNG_CC_8_REG 24
+#define MSGRNG_CC_9_REG 25
#define MSGRNG_CC_10_REG 26
#define MSGRNG_CC_11_REG 27
#define MSGRNG_CC_12_REG 28
@@ -64,173 +64,170 @@
#define MSGRNG_CC_15_REG 31
/* Station IDs */
-#define MSGRNG_STNID_CPU0 0x00
-#define MSGRNG_STNID_CPU1 0x08
-#define MSGRNG_STNID_CPU2 0x10
-#define MSGRNG_STNID_CPU3 0x18
-#define MSGRNG_STNID_CPU4 0x20
-#define MSGRNG_STNID_CPU5 0x28
-#define MSGRNG_STNID_CPU6 0x30
-#define MSGRNG_STNID_CPU7 0x38
-#define MSGRNG_STNID_XGS0_TX 64
-#define MSGRNG_STNID_XMAC0_00_TX 64
-#define MSGRNG_STNID_XMAC0_01_TX 65
-#define MSGRNG_STNID_XMAC0_02_TX 66
-#define MSGRNG_STNID_XMAC0_03_TX 67
-#define MSGRNG_STNID_XMAC0_04_TX 68
-#define MSGRNG_STNID_XMAC0_05_TX 69
-#define MSGRNG_STNID_XMAC0_06_TX 70
-#define MSGRNG_STNID_XMAC0_07_TX 71
-#define MSGRNG_STNID_XMAC0_08_TX 72
-#define MSGRNG_STNID_XMAC0_09_TX 73
-#define MSGRNG_STNID_XMAC0_10_TX 74
-#define MSGRNG_STNID_XMAC0_11_TX 75
-#define MSGRNG_STNID_XMAC0_12_TX 76
-#define MSGRNG_STNID_XMAC0_13_TX 77
-#define MSGRNG_STNID_XMAC0_14_TX 78
-#define MSGRNG_STNID_XMAC0_15_TX 79
-
-#define MSGRNG_STNID_XGS1_TX 80
-#define MSGRNG_STNID_XMAC1_00_TX 80
-#define MSGRNG_STNID_XMAC1_01_TX 81
-#define MSGRNG_STNID_XMAC1_02_TX 82
-#define MSGRNG_STNID_XMAC1_03_TX 83
-#define MSGRNG_STNID_XMAC1_04_TX 84
-#define MSGRNG_STNID_XMAC1_05_TX 85
-#define MSGRNG_STNID_XMAC1_06_TX 86
-#define MSGRNG_STNID_XMAC1_07_TX 87
-#define MSGRNG_STNID_XMAC1_08_TX 88
-#define MSGRNG_STNID_XMAC1_09_TX 89
-#define MSGRNG_STNID_XMAC1_10_TX 90
-#define MSGRNG_STNID_XMAC1_11_TX 91
-#define MSGRNG_STNID_XMAC1_12_TX 92
-#define MSGRNG_STNID_XMAC1_13_TX 93
-#define MSGRNG_STNID_XMAC1_14_TX 94
-#define MSGRNG_STNID_XMAC1_15_TX 95
-
-#define MSGRNG_STNID_GMAC 96
-#define MSGRNG_STNID_GMACJFR_0 96
-#define MSGRNG_STNID_GMACRFR_0 97
-#define MSGRNG_STNID_GMACTX0 98
-#define MSGRNG_STNID_GMACTX1 99
-#define MSGRNG_STNID_GMACTX2 100
-#define MSGRNG_STNID_GMACTX3 101
-#define MSGRNG_STNID_GMACJFR_1 102
-#define MSGRNG_STNID_GMACRFR_1 103
-
-#define MSGRNG_STNID_DMA 104
-#define MSGRNG_STNID_DMA_0 104
-#define MSGRNG_STNID_DMA_1 105
-#define MSGRNG_STNID_DMA_2 106
-#define MSGRNG_STNID_DMA_3 107
-
-#define MSGRNG_STNID_XGS0FR 112
-#define MSGRNG_STNID_XMAC0JFR 112
-#define MSGRNG_STNID_XMAC0RFR 113
-
-#define MSGRNG_STNID_XGS1FR 114
-#define MSGRNG_STNID_XMAC1JFR 114
-#define MSGRNG_STNID_XMAC1RFR 115
-#define MSGRNG_STNID_SEC 120
-#define MSGRNG_STNID_SEC0 120
-#define MSGRNG_STNID_SEC1 121
-#define MSGRNG_STNID_SEC2 122
-#define MSGRNG_STNID_SEC3 123
-#define MSGRNG_STNID_PK0 124
-#define MSGRNG_STNID_SEC_RSA 124
-#define MSGRNG_STNID_SEC_RSVD0 125
-#define MSGRNG_STNID_SEC_RSVD1 126
-#define MSGRNG_STNID_SEC_RSVD2 127
-
-#define MSGRNG_STNID_GMAC1 80
-#define MSGRNG_STNID_GMAC1_FR_0 81
-#define MSGRNG_STNID_GMAC1_TX0 82
-#define MSGRNG_STNID_GMAC1_TX1 83
-#define MSGRNG_STNID_GMAC1_TX2 84
-#define MSGRNG_STNID_GMAC1_TX3 85
-#define MSGRNG_STNID_GMAC1_FR_1 87
-#define MSGRNG_STNID_GMAC0 96
-#define MSGRNG_STNID_GMAC0_FR_0 97
-#define MSGRNG_STNID_GMAC0_TX0 98
-#define MSGRNG_STNID_GMAC0_TX1 99
-#define MSGRNG_STNID_GMAC0_TX2 100
-#define MSGRNG_STNID_GMAC0_TX3 101
-#define MSGRNG_STNID_GMAC0_FR_1 103
-#define MSGRNG_STNID_CMP_0 108
-#define MSGRNG_STNID_CMP_1 109
-#define MSGRNG_STNID_CMP_2 110
-#define MSGRNG_STNID_CMP_3 111
-#define MSGRNG_STNID_PCIE_0 116
-#define MSGRNG_STNID_PCIE_1 117
-#define MSGRNG_STNID_PCIE_2 118
-#define MSGRNG_STNID_PCIE_3 119
-#define MSGRNG_STNID_XLS_PK0 121
-
-#define MSGRNG_CODE_MAC 0
-#define MSGRNG_CODE_XGMAC 2
-#define MSGRNG_CODE_SEC 0
-#define MSGRNG_CODE_BOOT_WAKEUP 200
-#define MSGRNG_CODE_SPI4 3
-#define msgrng_read_status() read_c2_register32(MSGRNG_MSG_STATUS_REG, 0)
-
-#define msgrng_read_config() read_c2_register32(MSGRNG_MSG_CONFIG_REG, 0)
-#define msgrng_write_config(value) write_c2_register32(MSGRNG_MSG_CONFIG_REG,
0, value)
-
-#define msgrng_read_bucksize(bucket)
read_c2_register32(MSGRNG_MSG_BUCKSIZE_REG, bucket)
-#define msgrng_write_bucksize(bucket, value)
write_c2_register32(MSGRNG_MSG_BUCKSIZE_REG, bucket, value)
-
-#define msgrng_read_cc(reg, pri) read_c2_register32(reg, pri)
-#define msgrng_write_cc(reg, value, pri) write_c2_register32(reg, pri, value)
-
-#define msgrng_load_rx_msg0() read_c2_register64(MSGRNG_RX_BUF_REG, 0)
-#define msgrng_load_rx_msg1() read_c2_register64(MSGRNG_RX_BUF_REG, 1)
-#define msgrng_load_rx_msg2() read_c2_register64(MSGRNG_RX_BUF_REG, 2)
-#define msgrng_load_rx_msg3() read_c2_register64(MSGRNG_RX_BUF_REG, 3)
-
-#define msgrng_load_tx_msg0(value) write_c2_register64(MSGRNG_TX_BUF_REG, 0,
value)
-#define msgrng_load_tx_msg1(value) write_c2_register64(MSGRNG_TX_BUF_REG, 1,
value)
-#define msgrng_load_tx_msg2(value) write_c2_register64(MSGRNG_TX_BUF_REG, 2,
value)
-#define msgrng_load_tx_msg3(value) write_c2_register64(MSGRNG_TX_BUF_REG, 3,
value)
+#define MSGRNG_STNID_CPU0 0x00
+#define MSGRNG_STNID_CPU1 0x08
+#define MSGRNG_STNID_CPU2 0x10
+#define MSGRNG_STNID_CPU3 0x18
+#define MSGRNG_STNID_CPU4 0x20
+#define MSGRNG_STNID_CPU5 0x28
+#define MSGRNG_STNID_CPU6 0x30
+#define MSGRNG_STNID_CPU7 0x38
+#define MSGRNG_STNID_XGS0_TX 64
+#define MSGRNG_STNID_XMAC0_00_TX 64
+#define MSGRNG_STNID_XMAC0_01_TX 65
+#define MSGRNG_STNID_XMAC0_02_TX 66
+#define MSGRNG_STNID_XMAC0_03_TX 67
+#define MSGRNG_STNID_XMAC0_04_TX 68
+#define MSGRNG_STNID_XMAC0_05_TX 69
+#define MSGRNG_STNID_XMAC0_06_TX 70
+#define MSGRNG_STNID_XMAC0_07_TX 71
+#define MSGRNG_STNID_XMAC0_08_TX 72
+#define MSGRNG_STNID_XMAC0_09_TX 73
+#define MSGRNG_STNID_XMAC0_10_TX 74
+#define MSGRNG_STNID_XMAC0_11_TX 75
+#define MSGRNG_STNID_XMAC0_12_TX 76
+#define MSGRNG_STNID_XMAC0_13_TX 77
+#define MSGRNG_STNID_XMAC0_14_TX 78
+#define MSGRNG_STNID_XMAC0_15_TX 79
+
+#define MSGRNG_STNID_XGS1_TX 80
+#define MSGRNG_STNID_XMAC1_00_TX 80
+#define MSGRNG_STNID_XMAC1_01_TX 81
+#define MSGRNG_STNID_XMAC1_02_TX 82
+#define MSGRNG_STNID_XMAC1_03_TX 83
+#define MSGRNG_STNID_XMAC1_04_TX 84
+#define MSGRNG_STNID_XMAC1_05_TX 85
+#define MSGRNG_STNID_XMAC1_06_TX 86
+#define MSGRNG_STNID_XMAC1_07_TX 87
+#define MSGRNG_STNID_XMAC1_08_TX 88
+#define MSGRNG_STNID_XMAC1_09_TX 89
+#define MSGRNG_STNID_XMAC1_10_TX 90
+#define MSGRNG_STNID_XMAC1_11_TX 91
+#define MSGRNG_STNID_XMAC1_12_TX 92
+#define MSGRNG_STNID_XMAC1_13_TX 93
+#define MSGRNG_STNID_XMAC1_14_TX 94
+#define MSGRNG_STNID_XMAC1_15_TX 95
+
+#define MSGRNG_STNID_GMAC 96
+#define MSGRNG_STNID_GMACJFR_0 96
+#define MSGRNG_STNID_GMACRFR_0 97
+#define MSGRNG_STNID_GMACTX0 98
+#define MSGRNG_STNID_GMACTX1 99
+#define MSGRNG_STNID_GMACTX2 100
+#define MSGRNG_STNID_GMACTX3 101
+#define MSGRNG_STNID_GMACJFR_1 102
+#define MSGRNG_STNID_GMACRFR_1 103
+
+#define MSGRNG_STNID_DMA 104
+#define MSGRNG_STNID_DMA_0 104
+#define MSGRNG_STNID_DMA_1 105
+#define MSGRNG_STNID_DMA_2 106
+#define MSGRNG_STNID_DMA_3 107
+
+#define MSGRNG_STNID_XGS0FR 112
+#define MSGRNG_STNID_XMAC0JFR 112
+#define MSGRNG_STNID_XMAC0RFR 113
+
+#define MSGRNG_STNID_XGS1FR 114
+#define MSGRNG_STNID_XMAC1JFR 114
+#define MSGRNG_STNID_XMAC1RFR 115
+#define MSGRNG_STNID_SEC 120
+#define MSGRNG_STNID_SEC0 120
+#define MSGRNG_STNID_SEC1 121
+#define MSGRNG_STNID_SEC2 122
+#define MSGRNG_STNID_SEC3 123
+#define MSGRNG_STNID_PK0 124
+#define MSGRNG_STNID_SEC_RSA 124
+#define MSGRNG_STNID_SEC_RSVD0 125
+#define MSGRNG_STNID_SEC_RSVD1 126
+#define MSGRNG_STNID_SEC_RSVD2 127
+
+#define MSGRNG_STNID_GMAC1 80
+#define MSGRNG_STNID_GMAC1_FR_0 81
+#define MSGRNG_STNID_GMAC1_TX0 82
+#define MSGRNG_STNID_GMAC1_TX1 83
+#define MSGRNG_STNID_GMAC1_TX2 84
+#define MSGRNG_STNID_GMAC1_TX3 85
+#define MSGRNG_STNID_GMAC1_FR_1 87
+#define MSGRNG_STNID_GMAC0 96
+#define MSGRNG_STNID_GMAC0_FR_0 97
+#define MSGRNG_STNID_GMAC0_TX0 98
+#define MSGRNG_STNID_GMAC0_TX1 99
+#define MSGRNG_STNID_GMAC0_TX2 100
+#define MSGRNG_STNID_GMAC0_TX3 101
+#define MSGRNG_STNID_GMAC0_FR_1 103
+#define MSGRNG_STNID_CMP_0 108
+#define MSGRNG_STNID_CMP_1 109
+#define MSGRNG_STNID_CMP_2 110
+#define MSGRNG_STNID_CMP_3 111
+#define MSGRNG_STNID_PCIE_0 116
+#define MSGRNG_STNID_PCIE_1 117
+#define MSGRNG_STNID_PCIE_2 118
+#define MSGRNG_STNID_PCIE_3 119
+#define MSGRNG_STNID_XLS_PK0 121
+
+#define MSGRNG_CODE_MAC 0
+#define MSGRNG_CODE_XGMAC 2
+#define MSGRNG_CODE_SEC 0
+#define MSGRNG_CODE_BOOT_WAKEUP 200
+#define MSGRNG_CODE_SPI4 3
+#define msgrng_read_status()
read_c2_register32(MSGRNG_MSG_STATUS_REG, 0)
+
+#define msgrng_read_config()
read_c2_register32(MSGRNG_MSG_CONFIG_REG, 0)
+#define msgrng_write_config(v)
write_c2_register32(MSGRNG_MSG_CONFIG_REG, 0, v)
+
+#define msgrng_read_bucksize(b)
read_c2_register32(MSGRNG_MSG_BUCKSIZE_REG, b)
+#define msgrng_write_bucksize(b, v)
write_c2_register32(MSGRNG_MSG_BUCKSIZE_REG, b, v)
+
+#define msgrng_read_cc(r, s) read_c2_register32(r, s)
+#define msgrng_write_cc(r, v, s) write_c2_register32(r, s, v)
+
+#define msgrng_load_rx_msg0() read_c2_register64(MSGRNG_RX_BUF_REG, 0)
+#define msgrng_load_rx_msg1() read_c2_register64(MSGRNG_RX_BUF_REG, 1)
+#define msgrng_load_rx_msg2() read_c2_register64(MSGRNG_RX_BUF_REG, 2)
+#define msgrng_load_rx_msg3() read_c2_register64(MSGRNG_RX_BUF_REG, 3)
+
+#define msgrng_load_tx_msg0(v) write_c2_register64(MSGRNG_TX_BUF_REG,
0, v)
+#define msgrng_load_tx_msg1(v) write_c2_register64(MSGRNG_TX_BUF_REG,
1, v)
+#define msgrng_load_tx_msg2(v) write_c2_register64(MSGRNG_TX_BUF_REG,
2, v)
+#define msgrng_load_tx_msg3(v) write_c2_register64(MSGRNG_TX_BUF_REG,
3, v)
-static inline void
+static __inline void
msgrng_send(unsigned int stid)
{
__asm__ volatile (
- ".set push\n"
- ".set noreorder\n"
- "sync\n"
- // "msgsnd %0\n"
- "move $8, %0\n"
- "c2 0x80001\n"
- ".set pop\n"
- :: "r" (stid):"$8"
+ ".set push\n"
+ ".set noreorder\n"
+ "move $8, %0\n"
+ "c2 0x80001\n" /* msgsnd $8 */
+ ".set pop\n"
+ :: "r" (stid): "$8"
);
}
-static inline void
+static __inline void
msgrng_receive(unsigned int pri)
{
__asm__ volatile (
- ".set push\n"
- ".set noreorder\n"
- // "msgld %0\n"
- "move $8, %0\n"
- "c2 0x80002\n"
- ".set pop\n"
- :: "r" (pri):"$8"
+ ".set push\n"
+ ".set noreorder\n"
+ "move $8, %0\n"
+ "c2 0x80002\n" /* msgld $8 */
+ ".set pop\n"
+ :: "r" (pri): "$8"
);
}
-static inline void
+
+static __inline void
msgrng_wait(unsigned int mask)
{
__asm__ volatile (
- ".set push\n"
- ".set noreorder\n"
- // "msgwait %0\n"
- "move $8, %0\n"
- "c2 0x80003\n"
- ".set pop\n"
- :: "r" (mask):"$8"
+ ".set push\n"
+ ".set noreorder\n"
+ "move $8, %0\n"
+ "c2 0x80003\n" /* msgwait $8 */
+ ".set pop\n"
+ :: "r" (mask): "$8"
);
}
@@ -251,111 +248,77 @@ msgrng_restore(uint32_t sr)
}
struct msgrng_msg {
- __uint64_t msg0;
- __uint64_t msg1;
- __uint64_t msg2;
- __uint64_t msg3;
+ uint64_t msg0;
+ uint64_t msg1;
+ uint64_t msg2;
+ uint64_t msg3;
};
-static inline void
-message_send_block_fast(int size, unsigned int code, unsigned int stid,
- unsigned long long msg0, unsigned long long msg1,
- unsigned long long msg2, unsigned long long msg3)
-{
- __asm__ __volatile__(".set push\n"
- ".set noreorder\n"
- ".set mips64\n"
- "dmtc2 %1, $0, 0\n"
- "dmtc2 %2, $0, 1\n"
- "dmtc2 %3, $0, 2\n"
- "dmtc2 %4, $0, 3\n"
- "move $8, %0\n"
- "1: c2 0x80001\n"
- "mfc2 $8, $2\n"
- "andi $8, $8, 0x6\n"
- "bnez $8, 1b\n"
- "move $8, %0\n"
- ".set pop\n"
- :
- : "r"(((size - 1) << 16) | (code << 8) | stid), "r"(msg0),
"r"(msg1), "r"(msg2), "r"(msg3)
- : "$8"
- );
-}
-
-#define message_receive_fast(bucket, size, code, stid, msg0, msg1, msg2, msg3)
\
- ( { unsigned int _status=0, _tmp=0; \
- msgrng_receive(bucket); \
- while ( (_status=msgrng_read_status()) & 0x08) ; \
- _tmp = _status & 0x30; \
- if (__builtin_expect((!_tmp), 1)) { \
- (size)=((_status & 0xc0)>>6)+1; \
- (code)=(_status & 0xff00)>>8; \
- (stid)=(_status & 0x7f0000)>>16; \
- (msg0)=msgrng_load_rx_msg0(); \
- (msg1)=msgrng_load_rx_msg1(); \
- (msg2)=msgrng_load_rx_msg2(); \
- (msg3)=msgrng_load_rx_msg3(); \
- _tmp=0; \
- } \
- _tmp; \
- } )
-
-static __inline int
+static __inline int
message_send(unsigned int size, unsigned int code,
unsigned int stid, struct msgrng_msg *msg)
{
unsigned int dest = 0;
unsigned long long status = 0;
-#ifdef INVARIANTS
int i = 0;
-#endif
+ /*
+ * Make sure that all the writes pending at the cpu are flushed.
+ * Any writes pending on CPU will not be see by devices. L1/L2
+ * caches are coherent with IO, so no cache flush needed.
+ */
+ __asm __volatile ("sync");
+
+ /* Load TX message buffers */
msgrng_load_tx_msg0(msg->msg0);
msgrng_load_tx_msg1(msg->msg1);
msgrng_load_tx_msg2(msg->msg2);
msgrng_load_tx_msg3(msg->msg3);
-
- dest = ((size - 1) << 16) | (code << 8) | (stid);
- msgrng_send(dest);
-
- /* Wait for the thread pending to clear */
- do {
- status = msgrng_read_status();
- KASSERT(i++ < 10000, ("Too many fails\n"));
- } while ((status & 0x2) != 0);
-
- /* If there is a credit failure, return error */
- return status & 0x06;
-}
-
-static __inline int
-message_send_retry(unsigned int size, unsigned int code,
- unsigned int stid, struct msgrng_msg *msg)
-{
- int i, ret;
+ dest = ((size - 1) << 16) | (code << 8) | stid;
/*
- * we are in with interrupt disabled, retrying too many
- * times is not good
+ * Retry a few times on credit fail, this should be a
+ * transient condition, unless there is a configuration
+ * failure, or the receiver is stuck.
*/
- for (i = 0; i < 16; i++) {
- ret = message_send(size, code, stid, msg);
- if (ret == 0)
+ for (i = 0; i < 8; i++) {
+ msgrng_send(dest);
+ status = msgrng_read_status();
+ KASSERT((status & 0x2) == 0, ("Send pending fail!"));
+ if ((status & 0x4) == 0)
return (0);
}
- return (1);
+ /* If there is a credit failure, return error */
+ return (status & 0x06);
}
-static __inline__ int
-message_receive(int pri, int *size, int *code, int *src_id,
+static __inline int
+message_receive(int bucket, int *size, int *code, int *stid,
struct msgrng_msg *msg)
{
- int res;
+ uint32_t status = 0, tmp = 0;
- res = message_receive_fast(pri, *size, *code, *src_id,
- msg->msg0, msg->msg1, msg->msg2, msg->msg3);
- return res;
+ msgrng_receive(bucket);
+
+ /* wait for load pending to clear */
+ do {
+ status = msgrng_read_status();
+ } while ((status & 0x08) != 0);
+
+ /* receive error bits */
+ tmp = status & 0x30;
+ if (tmp != 0)
+ return (tmp);
+
+ *size = ((status & 0xc0) >> 6) + 1;
+ *code = (status & 0xff00) >> 8;
+ *stid = (status & 0x7f0000) >> 16;
+ msg->msg0 = msgrng_load_rx_msg0();
+ msg->msg1 = msgrng_load_rx_msg1();
+ msg->msg2 = msgrng_load_rx_msg2();
+ msg->msg3 = msgrng_load_rx_msg3();
+ return (0);
}
#define MSGRNG_STN_RX_QSIZE 256
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