Author: avg
Date: Fri May 6 13:51:54 2011
New Revision: 221527
URL: http://svn.freebsd.org/changeset/base/221527
Log:
prepare code that does topology detection for amd cpus for bulldozer
This also introduces a new detection path for family 10h and newer
pre-bulldozer cpus, pre-10h hardware should not be affected.
Tested by: Gary Jennejohn <gljennj...@googlemail.com>
(with pre-10h hardware)
MFC after: 2 weeks
Modified:
head/sys/amd64/amd64/mp_machdep.c
head/sys/amd64/include/specialreg.h
head/sys/i386/i386/mp_machdep.c
head/sys/i386/include/specialreg.h
Modified: head/sys/amd64/amd64/mp_machdep.c
==============================================================================
--- head/sys/amd64/amd64/mp_machdep.c Fri May 6 13:48:53 2011
(r221526)
+++ head/sys/amd64/amd64/mp_machdep.c Fri May 6 13:51:54 2011
(r221527)
@@ -176,11 +176,34 @@ mem_range_AP_init(void)
static void
topo_probe_amd(void)
{
+ int core_id_bits;
+ int id;
/* AMD processors do not support HTT. */
- cpu_cores = (amd_feature2 & AMDID2_CMP) != 0 ?
- (cpu_procinfo2 & AMDID_CMP_CORES) + 1 : 1;
cpu_logical = 1;
+
+ if ((amd_feature2 & AMDID2_CMP) == 0) {
+ cpu_cores = 1;
+ return;
+ }
+
+ core_id_bits = (cpu_procinfo2 & AMDID_COREID_SIZE) >>
+ AMDID_COREID_SIZE_SHIFT;
+ if (core_id_bits == 0) {
+ cpu_cores = (cpu_procinfo2 & AMDID_CMP_CORES) + 1;
+ return;
+ }
+
+ /* Fam 10h and newer should get here. */
+ for (id = 0; id <= MAX_APIC_ID; id++) {
+ /* Check logical CPU availability. */
+ if (!cpu_info[id].cpu_present || cpu_info[id].cpu_disabled)
+ continue;
+ /* Check if logical CPU has the same package ID. */
+ if ((id >> core_id_bits) != (boot_cpu_id >> core_id_bits))
+ continue;
+ cpu_cores++;
+ }
}
/*
Modified: head/sys/amd64/include/specialreg.h
==============================================================================
--- head/sys/amd64/include/specialreg.h Fri May 6 13:48:53 2011
(r221526)
+++ head/sys/amd64/include/specialreg.h Fri May 6 13:51:54 2011
(r221527)
@@ -228,6 +228,8 @@
* AMD extended function 8000_0008h ecx info
*/
#define AMDID_CMP_CORES 0x000000ff
+#define AMDID_COREID_SIZE 0x0000f000
+#define AMDID_COREID_SIZE_SHIFT 12
/*
* CPUID manufacturers identifiers
Modified: head/sys/i386/i386/mp_machdep.c
==============================================================================
--- head/sys/i386/i386/mp_machdep.c Fri May 6 13:48:53 2011
(r221526)
+++ head/sys/i386/i386/mp_machdep.c Fri May 6 13:51:54 2011
(r221527)
@@ -224,11 +224,34 @@ mem_range_AP_init(void)
static void
topo_probe_amd(void)
{
+ int core_id_bits;
+ int id;
/* AMD processors do not support HTT. */
- cpu_cores = (amd_feature2 & AMDID2_CMP) != 0 ?
- (cpu_procinfo2 & AMDID_CMP_CORES) + 1 : 1;
cpu_logical = 1;
+
+ if ((amd_feature2 & AMDID2_CMP) == 0) {
+ cpu_cores = 1;
+ return;
+ }
+
+ core_id_bits = (cpu_procinfo2 & AMDID_COREID_SIZE) >>
+ AMDID_COREID_SIZE_SHIFT;
+ if (core_id_bits == 0) {
+ cpu_cores = (cpu_procinfo2 & AMDID_CMP_CORES) + 1;
+ return;
+ }
+
+ /* Fam 10h and newer should get here. */
+ for (id = 0; id <= MAX_APIC_ID; id++) {
+ /* Check logical CPU availability. */
+ if (!cpu_info[id].cpu_present || cpu_info[id].cpu_disabled)
+ continue;
+ /* Check if logical CPU has the same package ID. */
+ if ((id >> core_id_bits) != (boot_cpu_id >> core_id_bits))
+ continue;
+ cpu_cores++;
+ }
}
/*
Modified: head/sys/i386/include/specialreg.h
==============================================================================
--- head/sys/i386/include/specialreg.h Fri May 6 13:48:53 2011
(r221526)
+++ head/sys/i386/include/specialreg.h Fri May 6 13:51:54 2011
(r221527)
@@ -227,6 +227,8 @@
* AMD extended function 8000_0008h ecx info
*/
#define AMDID_CMP_CORES 0x000000ff
+#define AMDID_COREID_SIZE 0x0000f000
+#define AMDID_COREID_SIZE_SHIFT 12
/*
* CPUID manufacturers identifiers
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