Author: adrian
Date: Tue Oct 18 03:01:41 2011
New Revision: 226488
URL: http://svn.freebsd.org/changeset/base/226488

Log:
  Implement the first part of the BB read workaround.
  
  The AR5008/AR9001 series NICs have a bug where BB register reads
  will occasionally be corrupted. This could cause issues with things
  such as ANI, which adjust operational parameters based on the
  BB radio register reads. This was introduced in the AR5008 chip
  and fixed with the first released AR9002 series NIC (AR9280v2.)
  
  A followup commit will implement the acutal WAR when reading
  BB registers. I'm still not sure how I'll implement it - whether
  it should be done in the osdep layer, or whether it should just
  live in the AR5416 HAL. Either way, they can use this capability
  bit to determine whether to implement the WAR or not.
  
  Thankyou to various sources inside Atheros who have helped me track
  down what this particular issue is.
  
  Obtained from:        Atheros

Modified:
  head/sys/dev/ath/ath_hal/ah.c
  head/sys/dev/ath/ath_hal/ah.h
  head/sys/dev/ath/ath_hal/ah_internal.h
  head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
  head/sys/dev/ath/ath_hal/ar9001/ar9130_attach.c
  head/sys/dev/ath/ath_hal/ar9001/ar9160_attach.c

Modified: head/sys/dev/ath/ath_hal/ah.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ah.c       Tue Oct 18 02:46:26 2011        
(r226487)
+++ head/sys/dev/ath/ath_hal/ah.c       Tue Oct 18 03:01:41 2011        
(r226488)
@@ -659,6 +659,8 @@ ath_hal_getcapability(struct ath_hal *ah
                return pCap->halHasRxSelfLinkedTail ? HAL_OK : HAL_ENOTSUPP;
        case HAL_CAP_LONG_RXDESC_TSF:           /* 32 bit TSF in RX descriptor? 
*/
                return pCap->halHasLongRxDescTsf ? HAL_OK : HAL_ENOTSUPP;
+       case HAL_CAP_BB_READ_WAR:               /* Baseband read WAR */
+               return pCap->halHasBBReadWar? HAL_OK : HAL_ENOTSUPP;
        default:
                return HAL_EINVAL;
        }

Modified: head/sys/dev/ath/ath_hal/ah.h
==============================================================================
--- head/sys/dev/ath/ath_hal/ah.h       Tue Oct 18 02:46:26 2011        
(r226487)
+++ head/sys/dev/ath/ath_hal/ah.h       Tue Oct 18 03:01:41 2011        
(r226488)
@@ -149,6 +149,7 @@ typedef enum {
        HAL_CAP_STREAMS         = 239,  /* how many 802.11n spatial streams are 
available */
        HAL_CAP_RXDESC_SELFLINK = 242,  /* support a self-linked tail RX 
descriptor */
        HAL_CAP_LONG_RXDESC_TSF = 243,  /* hardware supports 32bit TSF in RX 
descriptor */
+       HAL_CAP_BB_READ_WAR     = 244,  /* baseband read WAR */
 } HAL_CAPABILITY_TYPE;
 
 /* 

Modified: head/sys/dev/ath/ath_hal/ah_internal.h
==============================================================================
--- head/sys/dev/ath/ath_hal/ah_internal.h      Tue Oct 18 02:46:26 2011        
(r226487)
+++ head/sys/dev/ath/ath_hal/ah_internal.h      Tue Oct 18 03:01:41 2011        
(r226488)
@@ -209,7 +209,8 @@ typedef struct {
                        hal4kbSplitTransSupport         : 1,
                        halHasRxSelfLinkedTail          : 1,
                        halSupportsFastClock5GHz        : 1,    /* Hardware 
supports 5ghz fast clock; check eeprom/channel before using */
-                       halHasLongRxDescTsf             : 1;
+                       halHasLongRxDescTsf             : 1,
+                       halHasBBReadWar                 : 1;
        uint32_t        halWirelessModes;
        uint16_t        halTotalQueues;
        uint16_t        halKeyCacheSize;

Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c     Tue Oct 18 02:46:26 
2011        (r226487)
+++ head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c     Tue Oct 18 03:01:41 
2011        (r226488)
@@ -892,6 +892,12 @@ ar5416FillCapabilityInfo(struct ath_hal 
        pCap->halEnhancedDfsSupport = AH_FALSE;
        /* Hardware supports 32 bit TSF values in the RX descriptor */
        pCap->halHasLongRxDescTsf = AH_TRUE;
+       /*
+        * BB Read WAR: this is only for AR5008/AR9001 NICs
+        * It is also set individually in the AR91xx attach functions.
+        */
+       if (AR_SREV_OWL(ah))
+               pCap->halHasBBReadWar = AH_TRUE;
 
        if (ath_hal_eepromGetFlag(ah, AR_EEP_RFKILL) &&
            ath_hal_eepromGet(ah, AR_EEP_RFSILENT, &ahpriv->ah_rfsilent) == 
HAL_OK) {

Modified: head/sys/dev/ath/ath_hal/ar9001/ar9130_attach.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ar9001/ar9130_attach.c     Tue Oct 18 02:46:26 
2011        (r226487)
+++ head/sys/dev/ath/ath_hal/ar9001/ar9130_attach.c     Tue Oct 18 03:01:41 
2011        (r226488)
@@ -298,6 +298,8 @@ ar9130FillCapabilityInfo(struct ath_hal 
         */
        pCap->halMbssidAggrSupport = AH_FALSE;
        pCap->hal4AddrAggrSupport = AH_TRUE;
+       /* BB Read WAR */
+       pCap->halHasBBReadWar = AH_TRUE;
 
        return AH_TRUE;
 }

Modified: head/sys/dev/ath/ath_hal/ar9001/ar9160_attach.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ar9001/ar9160_attach.c     Tue Oct 18 02:46:26 
2011        (r226487)
+++ head/sys/dev/ath/ath_hal/ar9001/ar9160_attach.c     Tue Oct 18 03:01:41 
2011        (r226488)
@@ -320,6 +320,8 @@ ar9160FillCapabilityInfo(struct ath_hal 
        pCap->halAutoSleepSupport = AH_FALSE;   /* XXX? */
        pCap->halMbssidAggrSupport = AH_TRUE;
        pCap->hal4AddrAggrSupport = AH_TRUE;
+       /* BB Read WAR */
+       pCap->halHasBBReadWar = AH_TRUE;
 
        /* AR9160 is a 2x2 stream device */
        pCap->halTxStreams = 2;
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