Author: br
Date: Tue Nov 25 16:06:19 2014
New Revision: 275049
URL: https://svnweb.freebsd.org/changeset/base/275049
Log:
o Add PIO and vtblk mmio device info to the tree
o Add FPGA memory window to static dev mappings
o Fix whitespace
Modified:
head/sys/arm/altera/socfpga/socfpga_machdep.c
head/sys/boot/fdt/dts/arm/socfpga-sockit-beri.dts
head/sys/dev/beri/virtio/virtio.h
Modified: head/sys/arm/altera/socfpga/socfpga_machdep.c
==============================================================================
--- head/sys/arm/altera/socfpga/socfpga_machdep.c Tue Nov 25 15:58:59
2014 (r275048)
+++ head/sys/arm/altera/socfpga/socfpga_machdep.c Tue Nov 25 16:06:19
2014 (r275049)
@@ -95,6 +95,9 @@ platform_devmap_init(void)
/* scu */
arm_devmap_add_entry(0xfff00000, 0x100000);
+ /* FPGA memory window, 256MB */
+ arm_devmap_add_entry(0xd0000000, 0x10000000);
+
return (0);
}
Modified: head/sys/boot/fdt/dts/arm/socfpga-sockit-beri.dts
==============================================================================
--- head/sys/boot/fdt/dts/arm/socfpga-sockit-beri.dts Tue Nov 25 15:58:59
2014 (r275048)
+++ head/sys/boot/fdt/dts/arm/socfpga-sockit-beri.dts Tue Nov 25 16:06:19
2014 (r275049)
@@ -38,8 +38,8 @@
model = "Terasic SoCKit";
compatible = "altr,socfpga-cyclone5", "altr,socfpga";
- /* Reserve first page for secondary CPU trampoline code */
- memreserve = < 0x00000000 0x1000 >;
+ memreserve = < 0x00000000 0x1000 >, /* SMP trampoline */
+ < 0x00001000 0x1000 >; /* virtio block */
memory {
device_type = "memory";
@@ -69,6 +69,8 @@
};
mmc: dwmmc@ff704000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
num-slots = <1>;
supports-highspeed;
@@ -81,9 +83,34 @@
};
};
- beri_mem: mem@d0000000 {
+ beri_mem0: mem@d0000000 {
compatible = "sri-cambridge,beri-mem";
- reg = <0xd0000000 0x10000000>;
+ reg = <0xd0000000 0x10000000>; /* 256mb */
+ status = "okay";
+ };
+
+ pio0: pio@c0020000 {
+ compatible = "altr,pio";
+ reg = <0xc0020000 0x1000>; /* recv */
+ interrupts = < 76 >;
+ interrupt-parent = <&GIC>;
+ status = "okay";
+ };
+
+ pio1: pio@c0021000 {
+ compatible = "altr,pio";
+ reg = <0xc0021000 0x1000>; /* send */
+ interrupts = < 82 >; /* not in use on arm side */
+ interrupt-parent = <&GIC>;
+ status = "okay";
+ };
+
+ beri_vtblk: vtblk@00001000 {
+ compatible = "sri-cambridge,beri-vtblk";
+ reg = <0x00001000 0x1000>;
+ pio-recv = <&pio0>;
+ pio-send = <&pio1>;
+ beri-mem = <&beri_mem0>;
status = "okay";
};
Modified: head/sys/dev/beri/virtio/virtio.h
==============================================================================
--- head/sys/dev/beri/virtio/virtio.h Tue Nov 25 15:58:59 2014
(r275048)
+++ head/sys/dev/beri/virtio/virtio.h Tue Nov 25 16:06:19 2014
(r275049)
@@ -39,7 +39,7 @@
#define WRITE4(_sc, _reg, _val) \
bus_write_4((_sc)->res[0], _reg, _val)
-#define PAGE_SHIFT 12
+#define PAGE_SHIFT 12
#define VRING_ALIGN 4096
#define NUM_QUEUES 1
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