Author: dim
Date: Thu Nov 21 20:26:34 2019
New Revision: 354982
URL: https://svnweb.freebsd.org/changeset/base/354982

Log:
  Merge commit 3552d3e0f from llvm git (by Simon Atanasyan):
  
    [mips] Add `octeon+` to the list of CPUs accepted by the driver
  
  This is one of the upstream changes needed for adding support for the
  OCTEON+ CPU type, so that we can test Clang builds using the most
  commonly available FreeBSD/mips64 reference platform, the Edge Router
  Lite.
  
  Requested by: kevans
  MFC after:    1 month
  X-MFC-With:   r353358

Modified:
  head/contrib/llvm/tools/clang/lib/Basic/Targets/Mips.cpp
  head/contrib/llvm/tools/clang/lib/Basic/Targets/Mips.h
  head/contrib/llvm/tools/clang/lib/Driver/ToolChains/Gnu.cpp

Modified: head/contrib/llvm/tools/clang/lib/Basic/Targets/Mips.cpp
==============================================================================
--- head/contrib/llvm/tools/clang/lib/Basic/Targets/Mips.cpp    Thu Nov 21 
20:25:12 2019        (r354981)
+++ head/contrib/llvm/tools/clang/lib/Basic/Targets/Mips.cpp    Thu Nov 21 
20:26:34 2019        (r354982)
@@ -39,6 +39,7 @@ bool MipsTargetInfo::processorSupportsGPR64() const {
       .Case("mips64r5", true)
       .Case("mips64r6", true)
       .Case("octeon", true)
+      .Case("octeon+", true)
       .Default(false);
   return false;
 }
@@ -47,7 +48,7 @@ static constexpr llvm::StringLiteral ValidCPUNames[] =
     {"mips1"},  {"mips2"},    {"mips3"},    {"mips4"},    {"mips5"},
     {"mips32"}, {"mips32r2"}, {"mips32r3"}, {"mips32r5"}, {"mips32r6"},
     {"mips64"}, {"mips64r2"}, {"mips64r3"}, {"mips64r5"}, {"mips64r6"},
-    {"octeon"}, {"p5600"}};
+    {"octeon"}, {"octeon+"}, {"p5600"}};
 
 bool MipsTargetInfo::isValidCPUName(StringRef Name) const {
   return llvm::find(ValidCPUNames, Name) != std::end(ValidCPUNames);

Modified: head/contrib/llvm/tools/clang/lib/Basic/Targets/Mips.h
==============================================================================
--- head/contrib/llvm/tools/clang/lib/Basic/Targets/Mips.h      Thu Nov 21 
20:25:12 2019        (r354981)
+++ head/contrib/llvm/tools/clang/lib/Basic/Targets/Mips.h      Thu Nov 21 
20:26:34 2019        (r354982)
@@ -180,6 +180,8 @@ class LLVM_LIBRARY_VISIBILITY MipsTargetInfo : public 
       CPU = getCPU();
     if (CPU == "octeon")
       Features["mips64r2"] = Features["cnmips"] = true;
+    else if (CPU == "octeon+")
+      Features["mips64r2"] = Features["cnmips"] = Features["cnmipsp"] = true;
     else
       Features[CPU] = true;
     return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);

Modified: head/contrib/llvm/tools/clang/lib/Driver/ToolChains/Gnu.cpp
==============================================================================
--- head/contrib/llvm/tools/clang/lib/Driver/ToolChains/Gnu.cpp Thu Nov 21 
20:25:12 2019        (r354981)
+++ head/contrib/llvm/tools/clang/lib/Driver/ToolChains/Gnu.cpp Thu Nov 21 
20:26:34 2019        (r354982)
@@ -1392,7 +1392,8 @@ bool clang::driver::findMIPSMultilibs(const Driver &D,
   addMultilibFlag(CPUName == "mips32r6", "march=mips32r6", Flags);
   addMultilibFlag(CPUName == "mips64", "march=mips64", Flags);
   addMultilibFlag(CPUName == "mips64r2" || CPUName == "mips64r3" ||
-                      CPUName == "mips64r5" || CPUName == "octeon",
+                      CPUName == "mips64r5" || CPUName == "octeon" ||
+                      CPUName == "octeon+",
                   "march=mips64r2", Flags);
   addMultilibFlag(CPUName == "mips64r6", "march=mips64r6", Flags);
   addMultilibFlag(isMicroMips(Args), "mmicromips", Flags);
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