ok
Claudio Jeker(cje...@diehard.n-r-g.com) on 2017.12.28 14:21:27 +0100:
> Forwarding to tech, since people may have missed this.
> Hope to commit this soon.
>
> - Forwarded message from Claudio Jeker -
>
> Date: Sun, 24 Dec 2017 19:07:11 +0100
> From: Claudio Jeker
> To: Mischa Peters
Hi,
sxitwi got thru lazy review.
-Artturi
diff --git a/sys/dev/fdt/sxitwi.c b/sys/dev/fdt/sxitwi.c
index 099f394823f..9e19812e6bd 100644
--- a/sys/dev/fdt/sxitwi.c
+++ b/sys/dev/fdt/sxitwi.c
@@ -71,10 +71,6 @@
#include
#include
-#include
-#include
-#include
-
#define_I2C_PRIVA
Hi!
I'm resending my previous proposal.
Bump client<>relay, relay<>server bufferevent timeouts as long there is
some traffic flowing. Current code doesn't handle long unidirectional
flows correctly.
Simplest route would be to check presence of traffic every second, but
I choose to schedule the t
On Thu, Dec 28, 2017 at 11:39:09AM +0100, Frederic Cambus wrote:
> Hi tech@,
>
> VIA amd64 compatible CPUs support Enhanced SpeedStep, so reflect that
> in cpu.4.
>
> On my VIA Nano U3500:
>
> cpu0: VIA Nano U3500@1000MHz, 997.66 MHz
> cpu0: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,M
Hi cwm users,
I am not sure how many cwm users actually use the 'wm' (exec window
manager) menu, but I'd like to somewhat change it.
Right now it works just like the 'exec' menu where it populates any
executable in the path, then replaces the existing window manager with
that. For cwm development
On Fri, Dec 08, 2017 at 12:39:36PM +0100, Frederic Cambus wrote:
> This diff remove unnecessary includes in the i386 version of the
> VIA PadLock driver.
>
> Comments? OK?
Ping. Anyone?
This is the last step in syncing amd64 and i386 versions of the
VIA PadLock driver.
On Wed, 27 Dec 2017 07:02:50 -0700, "Todd C. Miller" wrote:
> Add WARNINGS=yes to ksh and fix the resulting sign compare warnings.
> Still passes regress. Note that gcc is pickier than clang in this
> respect as it requires a matching sign for ternary operations.
>
> I tried to limit the use of c
Forwarding to tech, since people may have missed this.
Hope to commit this soon.
- Forwarded message from Claudio Jeker -
Date: Sun, 24 Dec 2017 19:07:11 +0100
From: Claudio Jeker
To: Mischa Peters
Subject: Re: relayd stops processing traffic intermittently
On Sat, Dec 23, 2017 at 02:04
Hi tech@,
VIA amd64 compatible CPUs support Enhanced SpeedStep, so reflect that
in cpu.4.
On my VIA Nano U3500:
cpu0: VIA Nano U3500@1000MHz, 997.66 MHz
cpu0: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,
CFLUSH,ACPI,MMX,FXSR,SSE,SSE2,SS,TM,PBE,SSE3,MWAIT,VMX,EST,TM2,SSSE3,