In article <20131022205705.c0dc812...@ren.fdy2.co.uk>,
Robert Swindells wrote:
>
>Can somebody explain how the deferred processing code in subr_autoconf.c
>is supposed to work ?
>
>Looking at config_create_interruptthreads() it creates 8 threads all
>of which seem to walk the same list and delete
Can somebody explain how the deferred processing code in subr_autoconf.c
is supposed to work ?
Looking at config_create_interruptthreads() it creates 8 threads all
of which seem to walk the same list and delete elements from it.
I'm getting crashes in i386 at startup and am trying to track down
On Fri, 11 Oct 2013 10:31:39 -0400
Michael wrote:
> Something related - how difficult would it be to support something
> TRIM-ish on CompactFlash? Not that I have the faintest clue about ATA
> in general, let alone the CF-specific extensions...
The CF part should be easy to do. To be useful in p
Hi,
> well -- this doesn't help ddb or dropping to the prom directly
> does it?
Strangely, droppping to DDB or to the PROM from DDB works fine. It's just
halt and reboot that don't work.
Thanks,
J
PS. I didn't test a kernel witout DDB.
--
My other computer also runs NetBSD/Sa
> Not altering the BUS_CNTL register would seem easier. However, detach does
> work if that's not possible.
well -- this doesn't help ddb or dropping to the prom directly
does it?
i think a solution that leaves it working without any special
detach needed is the best idea here.
.mrg.
On Tue, 22 Oct 2013 11:50:43 +0100
Julian Coleman wrote:
> > Eww. IIRC that's supposed to turn off the register block that lives in
> > the upper 2KB of each half aperture, it didn't cause any problems with
> > other other Sun or Apple mach64 OFW that I have here. Should really
> > only be done w
> Eww. IIRC that's supposed to turn off the register block that lives in
> the upper 2KB of each half aperture, it didn't cause any problems with
> other other Sun or Apple mach64 OFW that I have here. Should really
> only be done when we have 8MB VRAM and the registers would overlap with
> it.
No
Hello,
On Mon, 21 Oct 2013 21:09:04 +0100
Julian Coleman wrote:
> I tracked down why my SPARCle (SPARC laptop) appears to lock up on halt.
> The cause is:
>
> http://mail-index.NetBSD.org/source-changes/2012/08/15/msg036624.html
>
> where we use the MMIO registers and alter the BUS_CNTL regi