On Sun, Dec 27, 2015 at 02:26:36AM +, Taylor R Campbell wrote:
[...]
> What does MSR_VIA_RNG_2NOISE actually do? Can you add a documentation
> citation?
As the comment just above noted:
/* C7 stepping 8 and subsequent CPUs have dual RNG */
For some reason, you have to turn the second
On 01/01/16 15:21, Frank Kardel wrote:
Hi !
Is there any progress on this? I see also PR/49065 being still
existent on an RPI2.
Also running named with 4 threads on an RPI2 together with vtund doing
"ifconfig tunX ..."
is a sure killer. Runinng named with only one thread gets you over it
(may
Hi !
Is there any progress on this? I see also PR/49065 being still existent
on an RPI2.
Also running named with 4 threads on an RPI2 together with vtund doing
"ifconfig tunX ..."
is a sure killer. Runinng named with only one thread gets you over it
(maybe just most of the time).
Softnet-loc
