pmap_enter(9) rework

2013-02-01 Thread Toru Nishimura
I feel boring that pmap_enter(9) can not avoid to have goto jumps for the logic simplity. This indicates pmap_enter(9) is mistakenly designed and used for mulitple purposes in parallel. Rework is seriously requested.. Toru Nishimura / ALKYL Technology / Sanctum Networks

Re: pmap_enter(9) rework

2013-02-01 Thread Toru Nishimura
. It invovles complicated case analysis., but in essense the case analysis is common across processors. Toru Nishimura / ALKYL Technology / Sanctum Networks

Re: SPARC64 from Fujitsu

2013-01-31 Thread Toru Nishimura
rather trandinal many-core processor; 64K+64K L1 caches 22MB L2 cache 16 core in 1 processor 2 HW threads per core The inter-connect technology for multiple chasis configuration is a Fujitsu proprietary. Toru Nishimura / ALKYL Technology

SPARC64 from Fujitsu

2013-01-30 Thread Toru Nishimura
Does anyone out there start considering to port SMP NetBSD for the SPARC64 X products from Fujitsu ? http://pr.fujitsu.com/jp/news/2013/01/18.html (English PR will follow soon, I expect) It's the least sister of Kei Super computer technology. Toru Nishimura / ALKYL Technology

Re: ChewieFS

2011-11-11 Thread Toru Nishimura
support there. Toru Nishimura / ALKYL Technology

Re: ChewieFS

2011-11-10 Thread Toru Nishimura
There are increasing number of NAND only (NOR less) embeded devices on market. How difficult to have chewieFS LIBSA support to allow kernel image loading from the filesys on NAND? Toru Nishimura / ALKYL Technology

Re: modules_enabled in kernel ELF note section

2011-01-12 Thread Toru Nishimura
possiblity is to have DDB symbol table as a module. This would wape out the awesome burdern of SYMTAB_SPACE maintaintance when LIBSA bootloader is made smart enough to do that. Toru Nishimura / ALKYL Technology

Re: modules_enabled in kernel ELF note section

2011-01-12 Thread Toru Nishimura
or not) The code segment does in-kernel socket creation and send/recv dialogue. Toru Nishimura / ALKYL Technology

Re: modules_enabled in kernel ELF note section

2011-01-12 Thread Toru Nishimura
Izumi Tsutui points; It checks a file system type where the kernel is (to be) loaded It's a norm case that a target kernel is stored in rootfs, I think. Toru Nishimura / ALKYL Technology

Re: modules_enabled in kernel ELF note section

2011-01-12 Thread Toru Nishimura
This eliminates the necessity to build a separate INSTALL kernel which holds mdimage inside. That's what i386 did and miniroot.kmod was loaded via boot.cfg(5) like distrib/i386/cdroms/installcd/boot.cfg.in in netbsd-5. (-current doesn't use miniroot.kmod and use cd9660 root fs) It's my

Re: modules_enabled in kernel ELF note section

2011-01-12 Thread Toru Nishimura
since it's somehow grub'ing way to pursue imaginary (and not-existing) universal loaders and would limit creative imagination to florish. Scripting and even command line editing for debug would be possible and all heavily depend on targets to port and how to use it in field. Toru Nishimura / ALKYL

modules_enabled in kernel ELF note section

2011-01-11 Thread Toru Nishimura
Folks, It would be nice if ELF kernel image holds modules_enabled value in note section which allows LIBSA to tell whether the target kernel is MODULAR or not. Toru Nishimura / ALKYL Technology

Re: TLB tiredown by ASID bump

2011-01-06 Thread Toru Nishimura
matter since live PTEs are likely in cache. TLBrefill operation is very cheap in that case as refill-target PTEs are already fetched and stored somewhere in primary Dcache or at worst in multi-MB L2 cache given modestly loaded system runtime. Toru Nishimura / ALKYL Technology

Re: TLB tiredown by ASID bump

2011-01-06 Thread Toru Nishimura
different sets of bits at * same time but these sets never overlap. * ... */ Thanks for your intriguing feedfeek, matt. Do you use tlbivax insn new to e500 for any purpose? My impression is it might not be so useful contradicting to the intent. Toru Nishimura / ALKYL Technology

Re: TLB tiredown by ASID bump

2011-01-06 Thread Toru Nishimura
manipuating primitives since cache design varies radically among CPU implementations and it would make little sense to define universal cache primitives good enough across varying cache designs. ASID management falls into the same category.and pmap(9) should stay away. Toru Nishimura / ALKYL Technology

TLB tiredown by ASID bump

2011-01-05 Thread Toru Nishimura
to invalidate instruction cache to continue. Toru Nishimura / ALKYL Technology

Re: TLB tiredown by ASID bump

2011-01-05 Thread Toru Nishimura
tradeoff, I believe. BTW, how do you approach to implement a remote TLB shootdown? Toru Nishimura / ALKYL Technology

Re: automatic vnd'ing on kernel boot

2010-03-02 Thread Toru Nishimura
Eric Haszlakiewicz said; I doubt that would do anything useful. ...[SNIP]... At that point you're not using the FAT FS as a filesystem, but just as a complicated disklabel. No better than FAT, yes, right. PLS look at plus side. Toru Nishimura / ALKYL Technology

automatic vnd'ing on kernel boot

2010-03-01 Thread Toru Nishimura
here someone steps forward to implement this. Comments and challening sprites are welcome. Toru Nishimura / ALKYL Technology