On Sun, Aug 09, 2015 at 02:46:44PM -0400, Thor Lancelot Simon wrote:
Just for the archive, this effectively means Pentium+. There are
actually 486-class SMP systems.
Heh. There are 386-class SMP systems (including some massively parallel
ones, some of which even ran open-source
On Sun, Aug 09, 2015 at 02:25:08PM +0200, Joerg Sonnenberger wrote:
On Thu, Jul 30, 2015 at 06:23:33PM +, Taylor R Campbell wrote:
I don't think you can have a portable function like that.
Not that hard:
- On i386, use cmpxchg8b.
Just for the archive, this effectively means
On Sun, Aug 09, 2015 at 02:46:44PM -0400, Thor Lancelot Simon wrote:
On Sun, Aug 09, 2015 at 02:25:08PM +0200, Joerg Sonnenberger wrote:
On Thu, Jul 30, 2015 at 06:23:33PM +, Taylor R Campbell wrote:
I don't think you can have a portable function like that.
Not that hard:
On Sun, Aug 09, 2015 at 07:09:04PM +, David Holland wrote:
On Sun, Aug 09, 2015 at 02:46:44PM -0400, Thor Lancelot Simon wrote:
Just for the archive, this effectively means Pentium+. There are
actually 486-class SMP systems.
Heh. There are 386-class SMP systems (including some
Thanks for your answers.
I guess I'll add the per-CPU queue idea to my TODO list.
Date: Thu, 30 Jul 2015 10:53:01 +0200
From: Maxime Villard m...@m00nbsd.net
Do we have a magic function that can perform two atomic_swap_ptr()
atomically?
Nope.
I don't want to use a global lock; it may slow down the system..
Atomics are expensive enough -- each one requires
Date: Thu, 30 Jul 2015 12:11:06 -0700
From: Dennis Ferguson dennis.c.fergu...@gmail.com
On 30 Jul, 2015, at 11:23 , Taylor R Campbell
campbell+netbsd-tech-k...@mumble.net wrote:
- On amd64, use cmpxchg16b.
Using this would preclude running on some older machines including,
On Jul 30, 2015, at 12:11 PM, Dennis Ferguson dennis.c.fergu...@gmail.com
wrote:
I know arm does double word ll/sc, but what else does?
I don't know of a way to use single register ll/sc to do an
atomic swap of two pointers.
Not many. running 32-bit on 64-bit CPUs.
You can do an atomic
Date: Thu, 30 Jul 2015 11:03:43 -0700
From: Dennis Ferguson dennis.c.fergu...@gmail.com
On 30 Jul, 2015, at 01:53 , Maxime Villard m...@m00nbsd.net wrote:
Do we have a magic function that can perform two atomic_swap_ptr()
atomically?
I don't think you can have a portable
On 30 Jul, 2015, at 01:53 , Maxime Villard m...@m00nbsd.net wrote:
Do we have a magic function that can perform two atomic_swap_ptr()
atomically?
I don't think you can have a portable function like that. x86 and
IBM mainframes now have instructions for 2-pointer CAS which could
be used for
On 30 Jul, 2015, at 11:23 , Taylor R Campbell
campbell+netbsd-tech-k...@mumble.net wrote:
- On amd64, use cmpxchg16b.
Using this would preclude running on some older machines including,
apparently, some Core 2 motherboards. Is that okay?
Do we have a magic function that can perform two atomic_swap_ptr()
atomically?
In kern/subr_kmem.c::kmem_guard_free(), the code used to be
rotor = atomic_inc_uint_nv(kg-kg_rotor) % kg-kg_depth;
va = (vaddr_t)atomic_swap_ptr(kg-kg_fifo[rotor], (void *)va);
if (va != 0) {
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