Cheaper RAS algorithm for CAS on VAX?

2010-11-12 Thread Matt Thomas
I was thinking of how AVR32 implements LL/SC sematics and wondering if I apply the same ideas to the VAX. Basically, everytime AVR32 takes an exception it clears a flag which was set by the load-locked instruction. Store-conditional sees the flag was cleared and fails the store. Instead of a

Re: Cheaper RAS algorithm for CAS on VAX?

2010-11-12 Thread Johnny Billquist
On 2010-11-12 18:11, Matt Thomas wrote: I was thinking of how AVR32 implements LL/SC sematics and wondering if I apply the same ideas to the VAX. Basically, everytime AVR32 takes an exception it clears a flag which was set by the load-locked instruction. Store-conditional sees the flag was