Folks, thanks for your input and sanity checking.  To recap...

Having never worked with crystals before (only 2 and 10 GHz stuff in GaAs power amp RFIC design for cell phone and the like using lab RF generators or Vitesse / AMCC asics with clock recovery already done by someone/something else back in the 1990s), I am revamping this design moving away from an OCXO and seeing what the design holds for TCXOs and the like.

A 4 layer board is going to be several hundred dollars due to the size of the board and I would like to get as close to ideal on the first shot (yes indeed there will probably be another spin)... Since I only have experience in the 2+ GHZ region I was originally concerned about via stubs with reflection induced effects, having no "feel" for this low frequency region.

I am having issues trying to get the simulator programme for the LMK04000 to synch to 44.1kHz and generate 11 / 12 MHz. One idea I suppose: I am looking at preceding the LMK04000 with the Si5326 which is a narrow band part compared to the wideband Si5319 to get 44kHz up to 10MHz... Then the LMK04000 can take 10MHz from this or 10MHz from an external source outside the box and get it to the final 11 / 12 MHz for distribution internal to the box to the converters. The Si5326 can also provide an "internally derived" 10MHz from its reference port, so that all design criteria for clocking is satisfied (internal clocking mode and external synch to 44.1kHz or 10M external). I can use a 3rd overtone crystal to provide the reference port frequency on the Si5326....

Regarding spurs in the near carrier region... Yes. these datasheets are a bit of a black box, and every time I look at them they give up another layer of the onion... I wonder about the tiny spurs on the LMK04000 near 100 Hz on their data (granted different carrier frequency, 250MHz). Does anyone have any experience with these chips or have a better suggestion; is there even an issue with these small spurs?

Cheers,
-chris



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