Rex wrote:
> Thanks. Great! Commonly available part.. I agree one part for both is good.
>
>
>
Rex
One caveat is the dc current flowing in the output transformer may cause
too much distortion (actual specification on the data sheet is somewhat
unclear/ambiguous), in which case capacitively coup
Thanks. Great! Commonly available part.. I agree one part for both is good.
Bruce Griffiths wrote:
> Rex wrote:
>
>> Thanks, Bruce, for the circuit. I don't recognize the transformer
>> numbers in your schematic. Can you tell us more about the nature of the
>> transformers you have specified
Rex wrote:
> Thanks, Bruce, for the circuit. I don't recognize the transformer
> numbers in your schematic. Can you tell us more about the nature of the
> transformers you have specified?
>
>
>
Rex
These are standard Minicircuits through hole mount RF transformers that
have (with an appropria
Thanks, Bruce, for the circuit. I don't recognize the transformer
numbers in your schematic. Can you tell us more about the nature of the
transformers you have specified?
Bruce Griffiths wrote:
> George
>
> The circuit schematic for a BJT version of the JFET frequency is attached.
> The biasing
George
The schematic for a more versatile EFC translator circuit is attached.
Any EFC range in the -10V to +10V range can be accomodated.
Even greater EFC ranges are possible by using a suitable opamp for U103
with appropriate power supplies.
The messy details of power supply bypassing etc are le
George
The circuit schematic for a BJT version of the JFET frequency is attached.
The biasing is a little more complex as it is necessary set each
frequency doubler BJT collector current at about 1mA or so to maximise
conversion gain.
The input impedance is also around 50 ohms.
Have also minimise
xaos wrote:
> Bruce Griffiths wrote:
>
>> George
>>
>> In the JFET frequency doubler:
>> 1) Surely the 50 ohms should be is series with the the voltage source V3
>> for the simulation?
>>
>>
> Correct. I did a cut and paste "without rotate" there.
>
>> 2) Usually a 1:4 impedance ratio
In a message dated 12/11/2007 03:11:24 Pacific Standard Time,
[EMAIL PROTECTED] writes:
>To check correct operation vary the Fury EFC output from 0 to 5V with
>the desired offset at U3 +ve input.
>Bruce
Hi gents,
this can be done manually with the command serv:coarsedac [0,255]
bye,
Bruce Griffiths wrote:
> George
>
> In the JFET frequency doubler:
> 1) Surely the 50 ohms should be is series with the the voltage source V3
> for the simulation?
>
Correct. I did a cut and paste "without rotate" there.
> 2) Usually a 1:4 impedance ratio step up transformer on the input is
> ab
xaos wrote:
> Hello Everyone,
>
> I have been running simulations of different parts of the Fury Interface
> board.
>
> Here are the results so far.
>
> http://www.darksmile.net/ee/index.html
>
> Your feedback is most welcome.
>
> -George
>
>
George
A more versatile EFC circuit that allows ind
xaos wrote:
> Hello Everyone,
>
> I have been running simulations of different parts of the Fury Interface
> board.
>
> Here are the results so far.
>
> http://www.darksmile.net/ee/index.html
>
> Your feedback is most welcome.
>
> -George
>
>
George
The Fury EFC output range is [0, +5V]
The 10
Bruce Griffiths wrote:
> xaos wrote:
>
>> Hello Everyone,
>>
>> I have been running simulations of different parts of the Fury Interface
>> board.
>>
>> Here are the results so far.
>>
>> http://www.darksmile.net/ee/index.html
>>
>> Your feedback is most welcome.
>>
>> -George
>>
>> ___
xaos wrote:
> Hello Everyone,
>
> I have been running simulations of different parts of the Fury Interface
> board.
>
> Here are the results so far.
>
> http://www.darksmile.net/ee/index.html
>
> Your feedback is most welcome.
>
> -George
>
> ___
> time-
Hello Everyone,
I have been running simulations of different parts of the Fury Interface
board.
Here are the results so far.
http://www.darksmile.net/ee/index.html
Your feedback is most welcome.
-George
___
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