Hej Anders,
On 2019-02-01 19:11, Anders Wallin wrote:
Hi all, is there are rule-of-thumb or simple paper/presentation of how to
choose PLL-gains?
I have a phase-detector that gives out a slope of roughly 1 V/rad, followed
by an op-amp circuit with proportional, integral, and double-integral gai
Hi
I’m sure there is a closed form solution somewhere out there that includes
noise. It is
more common to do it with simulation by one method or another. You normally
have a
lot going on in a PLL.
Simple answer is - less gain = less bandwidth. If what you have is too wide,
cut it down.
If
Hi Anders
look that
https://www.analog.com/media/ru/training-seminars/tutorials/MT-086.pdf
73
KJ6UHN Alex
On 2/1/2019 10:11 AM, Anders Wallin wrote:
Hi all, is there are rule-of-thumb or simple paper/presentation of how to
choose PLL-gains?
I have a phase-detector that gives out a slope of
On 2/1/19 10:11 AM, Anders Wallin wrote:
Hi all, is there are rule-of-thumb or simple paper/presentation of how to
choose PLL-gains?
I have a phase-detector that gives out a slope of roughly 1 V/rad, followed
by an op-amp circuit with proportional, integral, and double-integral gains
summed into
Hi all, is there are rule-of-thumb or simple paper/presentation of how to
choose PLL-gains?
I have a phase-detector that gives out a slope of roughly 1 V/rad, followed
by an op-amp circuit with proportional, integral, and double-integral gains
summed into one voltage [0, 3.3V] on the tune-pine of
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https://www.sv1afn.com/gps-antenna-splitter.html
Nigel GM8PZR
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