- It is possible to miss flush/invalidate the last
cache line, we fix it at here.
- add the volatile and memory clobber.
They are pointed by Scott Wood.
Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
---
lib_ppc/cache.c | 36 +---
1 files changed, 17 insertions(+
Hi Peter,
Peter Tyser wrote:
> When CONFIG_SYS_HUSH_PARSER is defined network download
> commands with 1 argument in the format 'tftp "/path/file"'
> do not work as expected. The hush command parser strips
> the quotes from "/path/file" which causes the network
> commands to interpret "/path/file"
Hi Anatolij & Andy,
Andy Fleming wrote:
> On Tue, Dec 2, 2008 at 3:31 AM, Anatolij Gustschin <[EMAIL PROTECTED]> wrote:
>
>> This patch tries to ensure that phy interrupt pin
>> won't be asserted after booting. We experienced
>> following issues with current 88E1121R phy init:
>>
>> Marvell 88E
Hi Peter,
Peter Tyser wrote:
> The TftpStart() function modifies the 'BootFile'
> string when 'BootFile' contains both an IP address
> and filename (eg 1.2.3.4:/path/file). This causes
> subsequent calls to TftpStart to incorrectly parse
> the TFTP filename and server IP address to use.
> For exam
Hi Peter,
Peter Tyser wrote:
> v2: Forgot SOBs...
>
> It looks like U-Boot ignores fragmented IP packets with
> non-zero "fragment offset" fields, but doesn't ignore the
> initial fragmented IP packet which has a "fragment offset"
> field value of 0.
>
> An additional check was added to catch the
Wolfgang,
The following changes since commit 90665e3d97948000f98846ded37c921c7ae67dd7:
Wolfgang Denk (1):
Merge branch 'master' of git://git.denx.de/u-boot-at91
are available in the git repository at:
git://git.denx.de/u-boot-net.git master
Anatolij Gustschin (1):
net: tsec: F
Hi Daniel,
Daniel Mack wrote:
> the net/net.c implementation of timeouts assumes that get_timer() returns
> values in milliseconds. As this is true for most platforms, it does not
> apply to PXA3x where the OSCR register increments with more than 3MHz.
>
> The following patch fixes the problem by
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <[EMAIL PROTECTED]>
---
board/renesas/r2dplus/lowlevel_init.S |2 +-
drivers/pci/pci_sh7751.c |4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/renesas/r2dplus/lowlevel_init.S
b/board/renesas/r2dplus/
Hi Wolfgang ,
I am unable to download a linux kernel for ARM from the site under
git.denx.de . Where am I going wrong ? I can see the tree but no zip file
which has the source . Suppose if I downloaded uC Linux from some other
source say uCLinux , would it be possible to compile it with the EL
hank peng 写道:
> 2008/12/3 Wolfgang Denk <[EMAIL PROTECTED]>:
>> Dear hank.peng <[EMAIL PROTECTED]>,
>>
>> repl: bad addresses:
>>hank.peng <[EMAIL PROTECTED]> -- no at-sign after local-part (<)
>>
>> Please fix the mail address you provide in your headers as return
>> address. Either get ri
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message <[EMAIL PROTECTED]> you wrote:
> Hi Wolfgang,
> please pull The following changes since commit
> 2077e348c2a84901022ad95311b47b70361e6daa:
> Scott Wood (1):
> NAND: Fix misplaced return statement in nand_{read,write}_skip_bad().
>
> are
Dear Remy Bohmer,
In message <[EMAIL PROTECTED]> you wrote:
> The following changes since commit
> 2077e348c2a84901022ad95311b47b70361e6daa:
> Scott Wood (1):
> NAND: Fix misplaced return statement in
> nand_{read,write}_skip_bad().
>
> are available in the git repository at:
>
> git
Dear Andy Fleming,
In message <[EMAIL PROTECTED]> you wrote:
> are available in the git repository at:
>
> git://www.denx.de/git/u-boot-mpc85xx.git master
>
> Anatolij Gustschin (1):
> 85xx: socrates: fix DDR SDRAM tlb entry configuration
>
> Becky Bruce (1):
> drivers/fsl_pci_ini
Dear Scott Wood,
In message <[EMAIL PROTECTED]> you wrote:
> The following changes since commit 2077e348c2a84901022ad95311b47b70361e6daa:
> Scott Wood (1):
> NAND: Fix misplaced return statement in nand_{read,write}_skip_bad().
>
> are available in the git repository at:
>
> git://gi
Dear Jon Loeliger,
In message <[EMAIL PROTECTED]> you wrote:
>
> The following changes since commit 2077e348c2a84901022ad95311b47b70361e6daa:
> Scott Wood (1):
> NAND: Fix misplaced return statement in nand_{read,write}_skip_bad().
>
> are available in the git repository at:
>
> git
This patch updates e500 freqProcessor to array based on CONFIG_NUM_CPUS,
and prints each CPU's frequency separately. It also fixes up each CPU's
frequency in "clock-frequency" of fdt blob.
Signed-off-by: James Yang <[EMAIL PROTECTED]>
Signed-off-by: Haiying Wang <[EMAIL PROTECTED]>
---
This patch
On 22:25 Thu 04 Dec , Remy Bohmer wrote:
> This patch fixes the hello_world example to be able to run it
> on a AT91SAM9261-EK board.
>
> Signed-off-by: Remy Bohmer <[EMAIL PROTECTED]>
> ---
> README|4 +++-
> examples/Makefile |4
> 2 files changed, 7 insertions(+),
If the error "Wrong Image Format for bootm command" is displayed, it helps
debugging
if the address is printed where it assumed the image to be.
Signed-off-by: Remy Bohmer <[EMAIL PROTECTED]>
---
common/cmd_bootm.c |6 --
1 file changed, 4 insertions(+), 2 deletions(-)
Index: u-boot-usb
Currently the arm926ejs tree has the armv4 option set during compilation.
This flag does not belong here because a arm926 CPU is always a armv5 CPU.
Signed-off-by: Remy Bohmer <[EMAIL PROTECTED]>
---
cpu/arm926ejs/at91/config.mk |1 -
cpu/arm926ejs/config.mk |2 +-
2 files changed, 1
This patch fixes the hello_world example to be able to run it
on a AT91SAM9261-EK board.
Signed-off-by: Remy Bohmer <[EMAIL PROTECTED]>
---
README|4 +++-
examples/Makefile |4
2 files changed, 7 insertions(+), 1 deletion(-)
Index: u-boot-usb.new/examples/Makefile
==
The progress bar that is displayed during booting from USB stick runs out out
the screen
This change limits the 'dots' to 60 characters at most on a line.
Signed-off-by: Remy Bohmer <[EMAIL PROTECTED]>
---
common/usb_storage.c |7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
Index
[PATCH] IXP425: Add new IXP425 board emPC-A400
This patch adds support for the emPC-A400 CPU board from
Janz Automationssysteme. It will also apply to some
of the Janz emVIEW displays which are based on this CPU
board.
Besides of the board support, the patch includes
two features which are (up to
[PATCH] IXP425: Add new IXP425 board emPC-A400
This patch adds support for the emPC-A400 CPU board from
Janz Automationssysteme. It will also apply to some
of the Janz emVIEW displays which are based on this CPU
board.
Besides of the board support, the patch includes
two features which are (up to
[PATCH] video: Add new driver for Silicon Motion SM501/SM502
This patch adds a new driver for SM501/SM502. Compared to the
existing driver it allows dynamic selection of resolution
(environment: videomode).
The drive is based on Vincent Sanders and Ben Dooks' linux
kernel driver.
Use CONFIG_VIDE
[PATCH] video: Add new driver for Silicon Motion SM501/SM502
This patch adds a new driver for SM501/SM502. Compared to the
existing driver it allows dynamic selection of resolution
(environment: videomode).
The drive is based on Vincent Sanders and Ben Dooks' linux
kernel driver.
Use CONFIG_VIDE
[PATCH] IXP425: Fixing timer code
The non-interrupted timer code is inaccurate.
I found that the timing error of udelay() is caused by
to much looping overhead. The actual timing routine
was called repeatedly for each microsecond. When
I used bigger slices it became more accurate.
Some IXP425 po
[PATCH] IXP425: Changing serial port initialization sequence
On my IXP425 board (Janz emPC-A400), the first few characters of
the u-boot startup message were missing.
I fixed it by enabling the UART before all other initialization.
I also enabled (and flushed) the FIFO of the UART.
The patch i
[PATCH] IXP425: Fixing PCI access
This patch fixes the PCI handling routines of the IXP port.
It seems that this hasn't been touch for quite a while and
u-boot PCI handling has changed since then (but nobody
update IXP). Not even access to configuration space
did work.
It was tested with Janz emP
[PATCH] IXP425: Improving print_cpuinfo code
The existing version of print_cpuinfo did read the
processor ID and detects clock speed from this.
This is not correct, as the IXP425 has the ability
to "downgrade" clock speed by using strapping resistors.
The improved code reads strapping informatio
[PATCH] IXP425: make cmd_go handle caches correctly
This patch adds icache_invalidate() and dcache_flush() to
cpu/ixp/cpu.c.
Also it adds do_go_exec() which is called from do_go().
This private implementation performs cache handling
before jumping into the code.
Without this cache handling, you
[PATCH] IDE: Improving speed on reading data
This patch improves the speed when reading blocks from
IDE devices by reading more than one block at a time. Up to
128 blocks are requested in one read command.
On my testplatform (Janz emPC-A400 with CompactFLASH card)
this nearly doubled speed.
Also
The patch is against "latest" u-boot git-repository
Please (still) be patient if style of submission or patches are
offending.
Signed-off-by: Stefan Althoefer <[EMAIL PROTECTED]>
___
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[PATCH] ARM: add IDE init to lib_arm/board.c
This patch adds ide_init() to the arm boot process.
The patch is against "latest" u-boot git-repository
Please (still) be patient if style of submission or patches are
offending.
Signed-off-by: Stefan Althoefer <[EMAIL PROTECTED]>
diff -uprN u
[PATCH] ARM: Allow cross endian linux boot
This patch adds the capability to boot a little endian linux
kernel on a big endian u-boot. This is usefull on IXP425 platform
which is always big-endian in u-boot.
To enable crossboot, define the environment variable "crossboot". This was
done as I foun
Dear Stefan,
Stefan Althöfer wrote:
> Then maybe we should have
>
> #define CONFIG_ENV_PROTECTED_ITEM "ethaddr1,ethaddr2,"
>
> in board configuration to have the greatest flexibility?
>
>
It might be useful to have a general protection mechanism, but probably
not right now. Please impleme
On Fri, Nov 21, 2008 at 7:24 PM, <[EMAIL PROTECTED]> wrote:
> From: Becky Bruce <[EMAIL PROTECTED]>
>
> The current code will cause the creation of a 4GB window
> starting at 0 if we have more than 4GB of RAM installed,
> which overlaps with PCI_MEM space and causes pci_bus_to_phys()
> to return e
On Fri, Nov 21, 2008 at 2:31 AM, Dave Liu <[EMAIL PROTECTED]> wrote:
> Some 85xx processors have the advanced power management feature,
> such as wake up ARP, that needs enable the automatic self refresh.
>
> If the DDR controller pass the SR_IT (self refresh idle threshold)
> idle cycles, it will
On Fri, Nov 21, 2008 at 2:31 AM, Dave Liu <[EMAIL PROTECTED]> wrote:
> According to the latest 8572 UM, the DDR3 controller
> is expanding the bit mask, and we use the extend ACTTOPRE
> mode when tRAS more than 19 MCLK.
>
> Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
Applied to 85xx-next, thanks
_
On Fri, Nov 21, 2008 at 2:31 AM, Dave Liu <[EMAIL PROTECTED]> wrote:
> - The DDR3 controller is expanding the bits for timing config
> - Add the DDR3 32-bit bus mode support
>
> Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
Applied to 85xx-next, thanks
___
On Fri, Nov 21, 2008 at 2:31 AM, Dave Liu <[EMAIL PROTECTED]> wrote:
> The wake up ARP feature need use the memory to process
> wake up packet, we enable auto self refresh to support it.
>
> Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
Applied to 85xx-next, thanks
__
On Fri, Nov 21, 2008 at 2:31 AM, Dave Liu <[EMAIL PROTECTED]> wrote:
> For light loaded system, we use the 1T timing to gain better
> memory performance, but for some heavily loaded system,
> you have to add the 2T timing options to board files.
>
> Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
Appl
On Mon, Dec 1, 2008 at 1:47 PM, Peter Tyser <[EMAIL PROTECTED]> wrote:
> Add define used to determine if PCI1 interface is in PCI or PCIX mode.
>
> Signed-off-by: Peter Tyser <[EMAIL PROTECTED]>
I thought this already had a constant defined, and I was right. It
was PORDEVSR_PCI. However, it wasn
On Tue, Nov 11, 2008 at 10:17 AM, Peter Tyser <[EMAIL PROTECTED]> wrote:
> All mpc8548-based boards should implement the suggested workaround
> to CPU 2 errata. Without the workaround, its possible for the
> 8548's core to hang while executing a msync or mbar 0 instruction
> and a snoopable transac
On Tue, Nov 11, 2008 at 7:52 AM, Haiying Wang
<[EMAIL PROTECTED]> wrote:
>
> Signed-off-by: Haiying Wang <[EMAIL PROTECTED]>
Applied to 85xx-next, thanks
Andy
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> This patch makes the presence of the DDR SDRAM tlb entry in
> the tlb_table dependent on CONFIG_SPD_EEPROM to avoid this
> inconsistency.
>
> Signed-off-by: Anatolij Gustschin <[EMAIL PROTECTED]>
Applied, thanks
Andy
___
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U-Boot@lis
On Wed, Oct 29, 2008 at 8:21 AM, Ed Swarthout
<[EMAIL PROTECTED]> wrote:
> Removed while(1) hang if memctl_intlv_ctl is set wrong.
> Remove embedded tabs from strings.
>
> Signed-off-by: Ed Swarthout <[EMAIL PROTECTED]>
Applied, thanks
Andy
___
U-Boot m
On Thu, Nov 20, 2008 at 3:36 PM, Jon Loeliger <[EMAIL PROTECTED]> wrote:
> Prevent further viral propogation of the unused
> symbol CONFIG_L1_INIT_RAM by just removing it.
>
> Signed-off-by: Jon Loeliger <[EMAIL PROTECTED]>
Applied, thanks
Andy
___
U-Bo
On Fri, Nov 21, 2008 at 2:31 AM, Dave Liu <[EMAIL PROTECTED]> wrote:
> According to the latest 8572 UM, the DDR3 controller
> is expanding the bit mask, and we use the extend ACTTOPRE
> mode when tRAS more than 19 MCLK.
>
> Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
Applied to 85xx-next, thanks
The following changes since commit
2077e348c2a84901022ad95311b47b70361e6daa:
Scott Wood (1):
NAND: Fix misplaced return statement in
nand_{read,write}_skip_bad().
are available in the git repository at:
git://git.denx.de/u-boot-usb.git master
Jean-Christophe PLAGNIOL-VILLARD (1):
(Resent in response to complex, non scalable suggestions: IMHO
strncmp (name, "ethaddr", 7)
is a simple and good solution that covers all known and several unknown
cases.)
[EMAIL PROTECTED] wrote:
> [PATCH] common: nvedit to protect additional ethernet addresses
>
> This patch adds "ethaddr1"
Then maybe we should have
#define CONFIG_ENV_PROTECTED_ITEM "ethaddr1,ethaddr2,"
in board configuration to have the greatest flexibility?
> [EMAIL PROTECTED] wrote:
> > [PATCH] common: nvedit to protect additional ethernet addresses
> >
> > This patch adds "ethaddr1" and "ethaddr2" to the pr
are available in the git repository at:
git://www.denx.de/git/u-boot-mpc85xx.git master
Anatolij Gustschin (1):
85xx: socrates: fix DDR SDRAM tlb entry configuration
Becky Bruce (1):
drivers/fsl_pci_init: Fix inbound window mapping bug
Dave Liu (3):
85xx: remove the unused d
[EMAIL PROTECTED] wrote:
> [PATCH] common: nvedit to protect additional ethernet addresses
>
> This patch adds "ethaddr1" and "ethaddr2" to the protected
> environment variables that can only be written once.
>
>
> The patch is against "latest" u-boot git-repository
>
> Please be patient if st
We have an issue with inbound windows overlapping outbound windows.
This is fine, but it does mean that pci_hose_{bus_to_phys,phys_to_bus}
can return the wrong thing.
I was wondering if there was any issue if PCI_REGION_MEMORY was set
for a region if we skipped that region in the lookup fun
On Nov 24, 2008, at 6:33 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> FDT support is used for both FIT style images and architectures
> (ppc, m68k, sparc)
> that can pass a fdt blob to an OS..
>
> For other arch and board which do not pass a fdt blob to an OS but
> want to use
> the new uIma
On Thu, 2008-12-04 at 03:14 -0600, Andy Fleming wrote:
> + }
> +#else
> + gur->devdisr |= MPC85xx_DEVDISR_PCIE1; /* disable */
> +#endif /* CONFIG_PCIE2 */
>
>
> MPC85xx_DEVDISR_PCIE1 isn't defined anywhere. Did you miss some
> changes you made to header files?
Thanks for catching t
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Coverage in many different areas of medicine such as Endocrinology, Pathology,
Urology, Neurology, Plastic Surgery, Psychiatry, Cardiology and much more
Can easily be sorted by 16 different fields
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=== We will give you the lists below
On Thu, 2008-12-04 at 13:35 +0100, Jean-Christophe PLAGNIOL-VILLARD
wrote:
> introduce 3 new weak functions board_bdinfo, cpu_bdinfo and soc_bdinfo to
> allow
> board, cpu and soc to print more information
>
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <[EMAIL PROTECTED]>
> ---
> diff with V
[EMAIL PROTECTED] wrote:
> [PATCH] common: nvedit to protect additional ethernet addresses
>
> This patch adds "ethaddr1" and "ethaddr2" to the protected
> environment variables that can only be written once.
>
>
> The patch is against "latest" u-boot git-repository
>
> Please be patient if
introduce 3 new weak functions board_bdinfo, cpu_bdinfo and soc_bdinfo to allow
board, cpu and soc to print more information
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <[EMAIL PROTECTED]>
---
diff with V3
rename cpu_bdinfo to soc_bdinfo for soc
Best Regards,
J.
common/cmd_bdinfo.c | 51
introduce 3 new weak functions board_bdinfo, cpu_bdinfo and soc_bdinfo to allow
board, cpu and soc to print more information
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <[EMAIL PROTECTED]>
---
apply after my precedent fix for cmd_bdinfo
Best Regards,
J.
common/cmd_bdinfo.c | 515 ++-
[PATCH] common: nvedit to protect additional ethernet addresses
This patch adds "ethaddr1" and "ethaddr2" to the protected
environment variables that can only be written once.
The patch is against "latest" u-boot git-repository
Please be patient if style of submission or patches are
offendi
I think u can check the docs folder for a readme.
Based on the board info/parts and hardware strapping done u need to
build a memory map and use the same.
Thanks & Regards,
Vignesh Kumar B
-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]
On Behalf Of Diptopal Basu
Se
According to coldfire manual data timeout > address time out
also use correct macro to program XARB_CFG
Signed-off-by: Arun C <[EMAIL PROTECTED]>
---
cpu/mcf547x_8x/cpu_init.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/cpu/mcf547x_8x/cpu_init.c b/cpu/mcf547x_8x/
Lance Zhang wrote:
>> Have a look at u-boot.map - This file is generated by the linker and it
> will >tell you exactly where it put everything
>> Also, .text section (the one that holds all the code) looks to be very
> big:
>> 0x06011b85 - 0x05fe = 0x31b85 (~200kB)
>
> Graeme, Thank you very m
Thank you for the lead . Yeah I saw the board layout . What if I wanted the
RAM to be at say 4000 where would I have to make , for the image to
boot ?
Thank you
Regards
Diptopal Basu
On Thu, Dec 4, 2008 at 2:57 PM, Pink Boy <[EMAIL PROTECTED]> wrote:
>
> Basu,
>
> > Also in the boards fold
>Have a look at u-boot.map - This file is generated by the linker and it
will >tell you exactly where it put everything
>Also, .text section (the one that holds all the code) looks to be very
big:
>0x06011b85 - 0x05fe = 0x31b85 (~200kB)
Graeme, Thank you very much.
I know the root cause, the
+ }
+#else
+ gur->devdisr |= MPC85xx_DEVDISR_PCIE1; /* disable */
+#endif /* CONFIG_PCIE2 */
MPC85xx_DEVDISR_PCIE1 isn't defined anywhere. Did you miss some
changes you made to header files?
Andy
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Hi Lance,
I've been working on the i386 build for a while now and have some knowledge
of the linker script for this particular port so hopefully I can give some
meaningful advice
Lance Zhang wrote:
> Vignesh, Thank you very much.
>
>> Try to change the boundary limits for the sections to pr
Hi ,
I am new to u boot , I compiled a u boot image ( version -
u-boot-2008.10 ) with ELDK for at91rm9200dk . I need to know what the memory
map is for the board . I am actually working on skyeye simulator and want to
configure the skyeye.conf filw with the memory map .
Also in the boards
Vignesh, Thank you very much.
>Try to change the boundary limits for the sections to prevent
conflicts,
>this is due to the new addition of the driver code.
I am not familiar with the liker script.
Can I simplely modify the following codes in u-boot.lds
. = 0xff00;
.start16 : AT (0
Timur Tabi wrote:
> Is there any documentation for this global variable? I'm trying to fix a bug
> in
> NetStartAgain(), and I'm trying to understand the purpose of this variable.
>
>
Isn't the code self-documenting? :) This global lets any of the
protocol processing routines force a restar
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