Ben Gardiner bengardiner at nanometrics.ca writes:
[...] snip
+
+void dram_init_banksize (void)
+{
+ gd-bd-bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ gd-bd-bi_dram[0].size = gd-ram_size;
+}
+#endif
dram_init() gets called from arch/arm/lib/board.c and initializes gd-ram_size
On Aug 18, 2010, at 5:46 PM, Kim Phillips wrote:
On Wed, 18 Aug 2010 23:50:26 +0200
Wolfgang Denk w...@denx.de wrote:
your commit a37c36f4: powerpc/8xxx: query feature reporting register
for num cores on unknown cpus breaks a number of boards with error
messages like here:
Please fix.
On 2010/08/19 7:35 AM, Wolfgang Denk wrote:
Dear Rogan Dawes,
In message 4c6cc059.4080...@dawes.za.net you wrote:
The patch was simply to allow people to see my non-working config, in
the hope of getting suggestions on how to improve it.
Then please mark it as such in the subject -
Dear Kumar Gala,
In message d3138911-c4e1-46fc-a380-6e1b557e1...@kernel.crashing.org you wrote:
Sorry, I had a few other fixes I was queuing up for a pull request.
Please do, as I want to get a -rc1 out asap (tonight?)
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH,
Dear Rogan Dawes,
In message 4c6cd111.4070...@dawes.za.net you wrote:
Then please mark it as such in the subject - adding a [RFC] or
similar tag would help.
Sorry, git-send-email newbie here.
Will figure it out for the next time around.
You can manually edit the patch before handing
On Aug 17, 2010, at 11:21 PM, Kumar Gala wrote:
Official docs call it the Job Ring not Job Queue for the p4080 security
block. Match the docs to reduce confusion.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
On Aug 17, 2010, at 11:33 PM, Kumar Gala wrote:
From: york york...@freescale.com
The board specific parameters associated with quad rank dimms where
missing. This fixes it so the board will function if quad rank dimms
are placed in it.
Signed-off-by: York Sun york...@freescale.com
On Aug 18, 2010, at 3:12 PM, Matthew McClintock wrote:
We currently do not add a cpu-release-addr for core 0, this is needed
when we want to reset core 0 and later restart it from Linux
---
arch/powerpc/cpu/mpc85xx/fdt.c | 21 -
1 files changed, 8 insertions(+), 13
On Aug 18, 2010, at 9:21 AM, Wolfgang Denk wrote:
Dear Kumar Gala,
In message 1282139990-17758-1-git-send-email-ga...@kernel.crashing.org you
wrote:
From: Lian Minghuan b31...@freescale.com
In funciton board_early_init_r(), serdes does not initialize yet.
variable serdes_prtcl_map in
From: Scott Wood scottw...@freescale.com
fdt_parent_offset() is an expensive operation, so we'd like to reduce
unnecessary calls to it.
Further, the practice of iterating up to the root if address/size cells
aren't found was apparently done for Linux for compatibility with certain
buggy Open
On Aug 19, 2010, at 1:50 AM, Kumar Gala wrote:
We get two build errors:
fsl_elbc_nand.c: In function 'fsl_elbc_run_command':
fsl_elbc_nand.c:231: error: 'fsl_lbc_t' has no member named 'lsor'
make[1]: *** [/work/wd/tmp-ppc/drivers/mtd/nand/fsl_elbc_nand.o] Error 1
and
ve8313.c: In
On Aug 18, 2010, at 5:15 PM, Wolfgang Denk wrote:
Dear Andy Kumar,
all QorIQ NAND-Boot configurations are apeareantly failing to build.
I get
ld: NAND bootstrap too big
error messages for these board configurations: P1011RDB_NAND,
P1020RDB_NAND, P2010RDB_NAND, and
The following changes since commit bd2313078114c4b44c4a5ce149af43bcb7fc8854:
Wolfgang Denk (1):
Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master
are available in the git repository at:
git://git.denx.de/u-boot-mpc85xx master
Kim Phillips (1):
powerpc/8xxx: share
On Aug 8, 2010, at 2:57 PM, Wolfgang Denk wrote:
Dear Kumar Gala,
In message 57cdb146-383a-4629-b7e4-c2729200a...@kernel.crashing.org you
wrote:
On Jun 23, 2010, at 8:56 AM, Poonam Aggrwal wrote:
This patch enables the eSPI configuration to use
the Spansion Flash on P1 and P2 RDB
The correct definition is in drivers/qe/uec.h so just
remove this one.
Signed-off-by: Joakim Tjernlund joakim.tjernl...@transmode.se
---
include/netdev.h |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/include/netdev.h b/include/netdev.h
index 882642a..65833e2 100644
---
Dear Kumar Gala,
In message aa5c74a5-8b4f-4ed8-a9e9-dfea41481...@kernel.crashing.org you wrote:
This will take a bit longer since it seems to be compiler version
dependent. Not seeing it with gcc 4.3.2. What gcc are you using?
gcc 4.2.2 as comes with ELDK 4.2
Best regards,
Wolfgang Denk
Sekhar Nori wrote:
The TI DA850/OMAP-L138/AM18x EVM can be populated with devices
having different maximum allowed CPU clock rating.
The maximum clock the chip can support can only be determined from
the label on the package (not software readable).
Introduce a method to pass the maximum
Some boards need their board-specific PHY quirks to be called
to PHY to work normally. As mpc5xxx_fec driver uses on demand
PHY initialization and can even reinit PHY during normal operation
we can't count on reset_phy() call from arch/arch/lib/board.c
(it is most likely called _before_ we init
Hi Stefano,
On Thu, Aug 19, 2010 at 13:51:46, Stefano Babic wrote:
Sekhar Nori wrote:
The TI DA850/OMAP-L138/AM18x EVM can be populated with devices
having different maximum allowed CPU clock rating.
The maximum clock the chip can support can only be determined from
the label on the
As linebuf is accessed with 32-bit pointers, its address
must be 32 bit aligned to avoid misaligned access.
Signed-off-by: Stefano Babic sba...@denx.de
---
lib/display_options.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/lib/display_options.c
Signed-off-by: David Jander da...@protonic.nl
---
arch/arm/cpu/armv7/mx51/iomux.c |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx51/iomux.c b/arch/arm/cpu/armv7/mx51/iomux.c
index 62b2954..fb48f1c 100644
--- a/arch/arm/cpu/armv7/mx51/iomux.c
Signed-off-by: David Jander da...@protonic.nl
---
arch/arm/include/asm/arch-mx51/mx51_pins.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx51/mx51_pins.h
b/arch/arm/include/asm/arch-mx51/mx51_pins.h
index ca26f41..c443f13 100644
---
Signed-off-by: David Jander da...@protonic.nl
---
include/fsl_pmic.h |2 +-
include/mc13892.h | 41 +
2 files changed, 34 insertions(+), 9 deletions(-)
diff --git a/include/fsl_pmic.h b/include/fsl_pmic.h
index e3abde6..2f2aa7d 100644
---
Signed-off-by: David Jander da...@protonic.nl
---
board/Protonic/prtlvt2/Makefile | 48
board/Protonic/prtlvt2/config.mk| 25 ++
board/Protonic/prtlvt2/imximage.cfg | 171
board/Protonic/prtlvt2/prtlvt2.c| 513 +++
Hi Sudhakar,
Thank you for reviewing this patch.
On Thu, Aug 19, 2010 at 2:25 AM, Sudhakar Rajashekhara
sudhakar@ti.com wrote:
Ben Gardiner bengardiner at nanometrics.ca writes:
[...] snip
+
+void dram_init_banksize (void)
+{
+ gd-bd-bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+
I am running U-boot 2009.08 on a sequoia based custom board. The board
has a Micron 29F2G16AAD nand chip. This chip is a large page device
with a 16 bit buswidth. I have an issue in nand_base.c in the
nand_get_flash_type function where the check for buswidth fails, causing
the print out -
Dear Wolfgang,
On Thursday 19 August 2010 03:03:54 pm Wolfgang Denk wrote:
[...]
create mode 100644 board/Protonic/prtlvt2/Makefile
create mode 100644 board/Protonic/prtlvt2/config.mk
create mode 100644 board/Protonic/prtlvt2/imximage.cfg
create mode 100644
Mike Frysinger wrote:
On Thursday, August 19, 2010 07:01:58 Stefano Babic wrote:
-uint8_t linebuf[MAX_LINE_LENGTH_BYTES + 1];
+uint8_t linebuf[MAX_LINE_LENGTH_BYTES + 1]
__attribute__((__aligned__(4)));
i'd rather we go with Albert Aribaud's change (posted 14 Aug 2010)
-mike
Ok, I
On Thu, 19 Aug 2010 01:50:40 -0500
Kumar Gala ga...@kernel.crashing.org wrote:
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c
b/drivers/mtd/nand/fsl_elbc_nand.c
index acdb431..ca61daf 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -1,6 +1,6 @@
/*
On Thu, Aug 19, 2010 at 1:05 PM, Mike Frysinger vap...@gentoo.org wrote:
Merge the other significant source of board name duplication with the new
boards.cfg file. I cleaned up most targets, but the ARM and MIPS trees
are such a mess than I didn't bother. If those maintainers care, they can
Ok, here is a summary of what I have found out so, with the help of
Wolfgang. Many thanks.
1) Wolfgang refers to the manual for system setup:
http://www.denx.de/wiki/view/DULG/SystemSetup
He recommends Linux programs cu and Kermit.
2) When using the loads command to upload an S-record file, only
Provide a proper reset for the Ethernet PHY (LAN8700) on the MX51EVK.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
board/freescale/mx51evk/mx51evk.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/board/freescale/mx51evk/mx51evk.c
Lieber Freund,
Ich bin Barrister Talaki Gilbert, einem Rechtsanwalt und ich würde gerne mit
Ihnen teilen, ein sehr wichtiges Geschäft Satz, daß der gegenseitige Nutzen für
beide von uns werden.
Ein verstorbener Klient von mir, dass die Aktien den gleichen Nachnamen wie
Sie, der hier nach, wird
On Aug 19, 2010, at 11:49 AM, Scott Wood wrote:
On Thu, 19 Aug 2010 01:50:40 -0500
Kumar Gala ga...@kernel.crashing.org wrote:
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c
b/drivers/mtd/nand/fsl_elbc_nand.c
index acdb431..ca61daf 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++
We get two build errors:
fsl_elbc_nand.c: In function 'fsl_elbc_run_command':
fsl_elbc_nand.c:231: error: 'fsl_lbc_t' has no member named 'lsor'
make[1]: *** [/work/wd/tmp-ppc/drivers/mtd/nand/fsl_elbc_nand.o] Error 1
and
ve8313.c: In function 'initdram':
ve8313.c:104: error: expected '=', ',',
We currently do not add a cpu-release-addr for core 0, this is needed
when we want to reset core 0 and later restart it from Linux
Signed-off-by: Matthew McClintock m...@freescale.com
---
v2: Mark boot cpu status as okay
arch/powerpc/cpu/mpc85xx/fdt.c | 15 ---
1 files changed, 8
On Thu, 19 Aug 2010 09:07:48 -0400
Pete Murray pmur...@dawning.com wrote:
I am running U-boot 2009.08 on a sequoia based custom board. The board
has a Micron 29F2G16AAD nand chip. This chip is a large page device
with a 16 bit buswidth. I have an issue in nand_base.c in the
On 2010/08/19 7:28 PM, Jef Mangelschots wrote:
Ok, here is a summary of what I have found out so, with the help of
Wolfgang. Many thanks.
4) I can not get this to work on our system (our U-boot is configured
for 115200 baud). The following explanation is based on my
observation. I might be
Dear Jef Mangelschots,
In message aanlkti=7zupgn3es_zqe6qrwc+akb4s=jnklnvsss...@mail.gmail.com you
wrote:
4) I can not get this to work on our system (our U-boot is configured
for 115200 baud). The following explanation is based on my
observation. I might be wrong and please correct me if I
The controller driver being used is ndfc.c, it doesn't set the
options though. From what I can tell, nand.c calls nand_scan without
actually setting the nand options. I have been setting chip-options to
include NAND_BUSWIDTH_16, but want to move all my changes back to board
specific code
On Thu, 19 Aug 2010 16:22:40 -0400
Pete Murray pmur...@dawning.com wrote:
The controller driver being used is ndfc.c, it doesn't set the
options though. From what I can tell, nand.c calls nand_scan without
actually setting the nand options. I have been setting chip-options to
It is not exactly _parsing_ the record, but storing the decoded data
to it's final destination, which usually includes flash programming
cycles.
Whenever some code takes a ASCII string (in my case an S-record),
extracts fields from it, converts these to numeric values, then I call
that
Dear Jef Mangelschots,
In message aanlktinlu+njp-s1bwj+zocasdptwfeqr020jw2wt...@mail.gmail.com you
wrote:
It is not exactly _parsing_ the record, but storing the decoded data
to it's final destination, which usually includes flash programming
cycles.
Whenever some code takes a ASCII
Dear Jef Mangelschots,
In message aanlktinlu+njp-s1bwj+zocasdptwfeqr020jw2wt...@mail.gmail.com you
wrote:
...
I am aware that you have suggested in many places AGAINST the use of
S-record, but there is a genuine use for it.
BTW - there are UUCP versions for Windows out there, too. You might
On 08/20/2010 01:05 AM, Mike Frysinger wrote:
Merge the other significant source of board name duplication with the new
boards.cfg file. I cleaned up most targets, but the ARM and MIPS trees
are such a mess than I didn't bother. If those maintainers care, they can
take are of it.
While
[ Updated ve8313 patch and adding Matt's fix to cpu release dts nodes ]
The following changes since commit bd2313078114c4b44c4a5ce149af43bcb7fc8854:
Wolfgang Denk (1):
Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master
are available in the git repository at:
Thomas,
Applied to: git://git.denx.de/u-boot-nios.git next
Thanks,
--Scott
Thomas Chou wrote:
There is a limitation (or bug?) of nios2 toolchain. The nios2 gcc
didn't generate correct code when the reset vector is passed as a
constant. It just generated a direct call, which was wrong when
On Aug 19, 2010, at 1:57 PM, Matthew McClintock wrote:
We currently do not add a cpu-release-addr for core 0, this is needed
when we want to reset core 0 and later restart it from Linux
Signed-off-by: Matthew McClintock m...@freescale.com
---
v2: Mark boot cpu status as okay
This patch adds basic support for s5pc210.
s5p-common will be used by all of s5p SoCs.
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
v2: no change
Makefile |7 +
Because of these are common files around s5p Socs, rename from s5pc1xx to s5p.
And getting cpu_id is SoC specific, so move to SoC's header file.
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
v2: moves read funcion also to
50 matches
Mail list logo
