Hi,
I try compiling u-boot for Iomega iConnect using these files:
http://patchwork.openwrt.org/patch/299/
But I got this error:
board.c: In function â__dram_init_banksizeâ:
board.c:233: error: âCONFIG_SYS_SDRAM_BASEâ undeclared (first use in this
function)
board.c:233: error: (Each
On P1022/P1013 second USB controller is muxed with second
Ethernet controller. The current code to enable second USB
fails to properly clear pinmux bits used by ethernet. As a
result, Linux freezes when this controller is used. This
patch fixes the problem.
Signed-off-by: Felix Radensky
On 06/27/11 08:06, Premi, Sanjeev wrote:
-Original Message-
From: Premi, Sanjeev
Sent: Thursday, June 23, 2011 4:48 PM
To: Premi, Sanjeev; Igor Grinberg
Cc: Govindarajan, Sriramakrishnan; u-boot@lists.denx.de
Subject: RE: [U-Boot] [PATCH 2/3] omap3evm: Update ethernet
reset
From: Helmut Raiger helmut.rai...@hale.at
The driver already had the MII functions, but they have not been
registered using miiphy_register().
---
drivers/net/smc911x.c | 24
1 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/drivers/net/smc911x.c
Hi Aneesh,
On 27.06.2011 08:29, Aneesh V wrote:
I wonder why do we need this whole spl thing in the first place (well,
surely I know what they are used for but why do we need a separate entity
for this)? Isn't it just the same U-Boot in, well, very special
configuration
(minimal set of
Adds support for ORIGEN board with MMC Booting.
Chander Kashyap (2):
ARMV7: Add support for Samsung ORIGEN board
ORIGEN: Add MMC SPL support
MAINTAINERS |1 +
board/samsung/origen/Makefile | 46 ++
Origen board is based upon S5PV310 SoC which is similiar to
S5PC210 SoC.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
MAINTAINERS |1 +
board/samsung/origen/Makefile| 46
board/samsung/origen/lowlevel_init.S | 468
Adds mmc boot support.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
mmc_spl/board/samsung/origen/Makefile | 105
mmc_spl/board/samsung/origen/mmc_boot.c | 75 +++
mmc_spl/board/samsung/origen/tools/mkv310_image.c | 139
Hi,
You mentioned that /spl can not be used for source files. Isn't there a
way to workaround this problem?
Why should we have source files in a SPL directory? I would prefer to
have spl specific sources right where the rest ist - maybe marked with
something like _spl or excluded by some
Hi Ilya,
On Monday 27 June 2011 01:54 PM, Ilya Yanok wrote:
Hi Aneesh,
On 27.06.2011 08:29, Aneesh V wrote:
I wonder why do we need this whole spl thing in the first place (well,
surely I know what they are used for but why do we need a separate entity
for this)? Isn't it just the same
Dear Aneesh,
In message 4e0804dc.8090...@ti.com you wrote:
+spl: $(TIMESTAMP_FILE) $(VERSION_FILE) depend
+ $(MAKE) -C spl/ all
+
$(obj)mmc_spl/u-boot-mmc-spl.bin: mmc_spl
The mmc_spl/ is suppoed to be moved into spl/, isn't it?
This patch was intended only as a
Dear Ilya,
In message loom.20110627t010402-...@post.gmane.org you wrote:
I wonder why do we need this whole spl thing in the first place (well,
surely I know what they are used for but why do we need a separate entity
for this)? Isn't it just the same U-Boot in, well, very special
Dear Aneesh,
In message 4e080733.2030...@ti.com you wrote:
I wonder why do we need this whole spl thing in the first place (well,
surely I know what they are used for but why do we need a separate entity
for this)? Isn't it just the same U-Boot in, well, very special
configuration
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-Original Message-
From: Igor Grinberg [mailto:grinb...@compulab.co.il]
Sent: Monday, June 27, 2011 12:17 PM
To: Premi, Sanjeev
Cc: Govindarajan, Sriramakrishnan; u-boot@lists.denx.de
Subject: Re: [U-Boot] [PATCH 2/3] omap3evm: Update ethernet
reset sequence for Rev.G board
On
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Hi,
On Mon, Jun 27, 2011 at 11:27 AM, Wolfgang Denk w...@denx.de wrote:
Dear Ilya,
In message loom.20110627t010402-...@post.gmane.org you wrote:
I wonder why do we need this whole spl thing in the first place (well,
surely I know what they are used for but why do we need a separate entity
Dear Wolfgang,
On Monday 27 June 2011 02:57 PM, Wolfgang Denk wrote:
Dear Aneesh,
In message4e0804dc.8090...@ti.com you wrote:
+spl: $(TIMESTAMP_FILE) $(VERSION_FILE) depend
+ $(MAKE) -C spl/ all
+
$(obj)mmc_spl/u-boot-mmc-spl.bin: mmc_spl
The mmc_spl/ is suppoed to be
From: Sriramakrishnan s...@ti.com
The GPIO pin used for resetting the external LAN chip has
changed for Rev.G board.
The patch uses generic gpio API instead of direct access
to corresponding registers.
Signed-off-by: Sriramakrishnan s...@ti.com
Signed-off-by: Sanjeev Premi pr...@ti.com
---
On Mon, 27 Jun 2011 11:27:31 +0200
Wolfgang Denk w...@denx.de wrote:
Dear Ilya,
In message loom.20110627t010402-...@post.gmane.org you wrote:
I wonder why do we need this whole spl thing in the first place (well,
surely I know what they are used for but why do we need a separate entity
On Mon, 27 Jun 2011 11:36:33 +0200
Wolfgang Denk w...@denx.de wrote:
Dear Aneesh,
In message 4e080733.2030...@ti.com you wrote:
I wonder why do we need this whole spl thing in the first place (well,
surely I know what they are used for but why do we need a separate entity
for
On Monday, June 27, 2011 03:22:03 helmut.rai...@hale.at wrote:
From: Helmut Raiger helmut.rai...@hale.at
The driver already had the MII functions, but they have not been
registered using miiphy_register().
missing signed-off-by tag
+static int mii_phy_read(char *devname, u8 phy, u8 reg,
If DDR initialziation uses a speed table and the speed is not matched, print
a warning message instead of silently ignoring.
Signed-off-by: York Sun york...@freescale.com
---
board/freescale/corenet_ds/ddr.c |6 ++
board/freescale/mpc8572ds/ddr.c |8
Checking width before setting DDR controller. SPD for DDR1 and DDR2 has data
width and primary sdram width. The latter one has different meaning for DDR3.
Signed-off-by: York Sun york...@freescale.com
---
arch/powerpc/cpu/mpc8xxx/ddr/options.c | 35 ---
1 files
Allow overriding RCW for all RDIMM, not only quad-rank ones.
Signed-off-by: York Sun york...@freescale.com
---
board/freescale/corenet_ds/ddr.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/board/freescale/corenet_ds/ddr.c b/board/freescale/corenet_ds/ddr.c
index
Dear Daniel,
In message BANLkTin-s=wznptu8ej7s_gz9hrrv-p...@mail.gmail.com you wrote:
Good point. Eventually we can just add additional build rules for
new object files (say, .splo instead of .o) ?
I agree this approach seems to be the best one.
But then we have to create
Dear Aneesh V,
In message 4e089a25.4050...@ti.com you wrote:
Instead of doing this, we could as well just maintain a list of
objects and then link all these together directly, without creating
libraries first.
Is this like a make variable that keeps accumulating objects
from
Dear Scott Wood,
In message 20110627133435.31cd3...@schlenkerla.am.freescale.net you wrote:
Good point. Eventually we can just add additional build rules for
new object files (say, .splo instead of .o) ?
No need for new extensions -- we should be able to use the target
directory to
Dear Scott Wood,
In message 20110627134205.021af...@schlenkerla.am.freescale.net you wrote:
This statement does not make much sense to me. If we can do it in the
spl/ directory, we should be able to do it in any other directory as
well. The worst to happen is that we have to keep two
On Mon, 27 Jun 2011 22:50:46 +0200
Wolfgang Denk w...@denx.de wrote:
Dear Scott Wood,
In message 20110627133435.31cd3...@schlenkerla.am.freescale.net you wrote:
Good point. Eventually we can just add additional build rules for
new object files (say, .splo instead of .o) ?
No
Dear Scott Wood,
In message 20110627155535.4217b...@schlenkerla.am.freescale.net you wrote:
But if we do not create a new hierarchy of target directories we will
have the normal and the spl objects in parallel (and I don't want
to delete one when building the other).
What's wrong with
On Mon, 27 Jun 2011 23:10:33 +0200
Wolfgang Denk w...@denx.de wrote:
Dear Scott Wood,
In message 20110627155535.4217b...@schlenkerla.am.freescale.net you wrote:
But if we do not create a new hierarchy of target directories we will
have the normal and the spl objects in parallel (and I
Dear Scott Wood,
In message 20110627161803.16783...@schlenkerla.am.freescale.net you wrote:
But if we do not create a new hierarchy of target directories we will
have the normal and the spl objects in parallel (and I don't want
to delete one when building the other).
What's
Hi All,
Just thought I'd throw in a left-field idea...
Could we make the loading of U-Boot into a generic multi-stage framework
with each stage bootstrapping the next stage? OK, I know this is how IPL,
SPL etc work already, but I'm thinking something more formal and arch
independent.
I can
On 24 June 2011 04:24, Paulraj, Sandeep s-paul...@ti.com wrote:
Hi All,
Le 17/06/2011 11:30, Aneesh V a écrit :
With D-cache and MMU enabled for ARM in u-boot it becomes imperative to
support a minimal set of cache maintenance operations and necessary
initializations before enabling
Dear Graeme Russ,
In message banlktinapvrprepfnsoypjertu6hzga...@mail.gmail.com you wrote:
I can think of three disctinct phases which are relatively commong across
most arch's (especially NAND Flash arches)
1) An intial page (say 256 bytes for example) which loads a second stage
into
Hi Wolfgang,
The following changes since commit 9623c158f6a5150a21c25026bfba79e7ff7912f5:
Merge branch 'master' of git://git.denx.de/u-boot-arm (2011-06-23
15:37:33 +0200)
are available in the git repository at:
git://git.denx.de/u-boot-arm.git master
Aneesh V (9):
arm: make
Le 17/06/2011 11:30, Aneesh V a écrit :
With D-cache and MMU enabled for ARM in u-boot it becomes imperative to
support a minimal set of cache maintenance operations and necessary
initializations before enabling MMU.
This series of patches attempt to do the following for armv7:
* Necessary
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