Joe Hershberger schrieb:
>Hi Prafulla,
>
>On Tue, Jun 5, 2012 at 4:36 PM, Michael Walle wrote:
>>
>> Hi Prafulla,
>>
>> Am Dienstag 05 Juni 2012, 23:33:13 schrieb Michael Walle:
>>> Changes:
>>> v9:
>>> - rebase to marvell custodian tree, merged with wolfgangs master
>> [..snip..]
>>
>>
>> I
Hi Tom,
On Tue, Jun 05, 2012 at 03:58:03, Rini, Tom wrote:
> On Fri, Jun 01, 2012 at 08:00:43PM +0530, Prabhakar Lad wrote:
>
> > From: Lad, Prabhakar
> >
> > This patch adds support for MMC/SD on DA850/OMAP-L138.
> [snip]
> > +/* SD/MMC */
> > +#define CONFIG_MMC
> > +#define CONFIG_DAVINCI_MM
Hi Tom,
On Tue, Jun 05, 2012 at 03:59:08, Rini, Tom wrote:
> On Fri, Jun 01, 2012 at 07:04:37PM +0530, Prabhakar Lad wrote:
> > From: Rajashekhara, Sudhakar
> >
> > On DA850/OMAP-L138 it was observed that in RMII mode, auto negotiation
> > was not performed. This patch enables auto negotiation i
Hi Tom,
On Tue, Jun 05, 2012 at 04:02:01, Rini, Tom wrote:
> On Fri, Jun 01, 2012 at 08:00:49PM +0530, Prabhakar Lad wrote:
> > From: Lad, Prabhakar
> >
> > This patch adds support for direct NOR boot mode on da850/omap-l138.
> >
> > Define the CONFIG_DIRECT_NOR_BOOT macro along with CONFIG_USE_
Hi Christian,
On Tue, Jun 05, 2012 at 15:33:07, Christian Riesch wrote:
> Hi,
>
> On Fri, Jun 1, 2012 at 4:30 PM, Prabhakar Lad wrote:
> > From: Lad, Prabhakar
> >
> > This patch adds support for MMC/SD on DA850/OMAP-L138.
> >
> > Signed-off-by: Lad, Prabhakar
> > Signed-off-by: Rajashekhara,
Hi Christian,
On Tue, Jun 05, 2012 at 15:38:53, Christian Riesch wrote:
> Hi,
>
> On Fri, Jun 1, 2012 at 3:48 PM, Prabhakar Lad wrote:
> > From: Rajashekhara, Sudhakar
> >
> > According to DA850/OMAP-L138 schematics, GP2[6] line has to be driven
> > high for RMII mode to work. In RMII mode, SP
Hi Christian,
On Tue, Jun 05, 2012 at 16:56:01, Christian Riesch wrote:
> Hi,
>
> On Fri, Jun 1, 2012 at 4:30 PM, Prabhakar Lad wrote:
> > From: Lad, Prabhakar
> >
> > This patch adds support for NAND SPL on DA850/OMAP-L138.
> >
> > Signed-off-by: Lad, Prabhakar
> > Signed-off-by: Rajashekhar
Hello scott,
The issue is solved by making baud rate correction.
thank you
manukumar
signal-networks
On Fri, 2012-06-01 at 12:15 -0500, Scott Wood wrote:
> On 06/01/2012 05:10 AM, Manukumar wrote:
> > Hello scott.
> >
> > I can able make the kernel up but it hangs after probing
> > serial driv
Hi Christian,
On Tue, Jun 05, 2012 at 17:04:13, Christian Riesch wrote:
> Hi,
>
> On Fri, Jun 1, 2012 at 3:34 PM, Prabhakar Lad wrote:
> > From: Rajashekhara, Sudhakar
> >
> > On DA850/OMAP-L138 it was observed that in RMII mode,
> > auto negotiation was not performed. This patch enables
> > a
Dear "Jayachandran C",
In message <1338961566-13389-1-git-send-email-jayachandr...@netlogicmicro.com>
you wrote:
> The block argument for store_block can be -1 when the tftp sequence
> number rolls over (i.e TftpBlock == 0), so the first argument to
> store_block has to be of type 'int' instead o
Provides a tool to build boot Image for PBL(Pre boot loader) which is
used on Freescale CoreNet SoCs, PBL can be used to load some instructions
and/or data for pre-initialization. The default output image is u-boot.pbl,
for more details please refer to doc/README.pblimage.
Signed-off-by: Shaohui X
> -Original Message-
> From: Michael Walle [mailto:mich...@walle.cc]
> Sent: 06 June 2012 12:39
> To: Joe Hershberger
> Cc: Prafulla Wadaskar; u-boot@lists.denx.de
> Subject: Re: [U-Boot] [PATCH v9 0/4] Kirkwood: add lschlv2 and lsxhl
> board support
>
>
>
> Joe Hershberger schrieb:
>
On 06/05/2012 03:20 PM, Allen Martin wrote:
> This is make naming consistent with the kernel and devicetree and in
> preparation of pulling out the common tegra20 code.
> diff --git a/boards.cfg b/boards.cfg
This misses a couple of recently added boards - whistler and trimslice.
_
On 06/05/2012 03:20 PM, Allen Martin wrote:
> In preparation for splitting out the armv4t code from tegra20, move
> the tegra20 SoC code to arch/arm/cpu/tegra20-common. This code will
> be compiled armv4t for the arm7tdmi and armv7 for the cortex A9.
> diff --git a/arch/arm/cpu/armv7/tegra20/Make
On 06/05/2012 03:20 PM, Allen Martin wrote:
> Add support for specifying a differnt CPU for main u-boot and SPL
typo^^
> u-boot builds. This is done by adding an optional SPL CPU after the
> main CPU in boards.cfg as follows:
>
> normal_cpu:spl_cpu
>
> This
On 06/05/2012 03:20 PM, Allen Martin wrote:
> Add support for tegra20 arm7 boot processor. This processor is used
> to power on the Cortex A9 and transfer control to it.
> diff --git a/arch/arm/cpu/arm720t/cpu.c b/arch/arm/cpu/arm720t/cpu.c
> #elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_A
On 06/05/2012 03:20 PM, Allen Martin wrote:
> Add SPL options to tegra20 config files and enable SPL build for
> seaboard in boards.cfg
> diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h
> +/* include overrides for SPL build */
> +#ifdef CONFIG_SPL_BUILD
> +#include "tegra2-sp
On 06/05/2012 03:20 PM, Allen Martin wrote:
> Add target for tegra20 u-boot image. This is a concatenation of tegra
> spl and normal u-boot binaries.
> diff --git a/board/nvidia/seaboard/config.mk b/board/nvidia/seaboard/config.mk
> +PAD_TO=0x00108000
Oh crap, does this mean that we have to sta
On 06/05/2012 03:20 PM, Allen Martin wrote:
> This code is now included in the tegra20 SPL
> @@ -323,34 +91,10 @@ void init_pmc_scratch(void)
>
> /* ODMDATA is for kernel use to determine RAM size, LP config, etc. */
> writel(CONFIG_SYS_BOARD_ODMDATA, &pmc->pmc_scratch20);
> -
> -#if
On 06/05/2012 03:20 PM, Allen Martin wrote:
> These flags were necessary when building tegra20 as a single binary
> that supported ARM7TDMI and Cortex A9. Now that the ARM7TDMI support
> is split into a separate SPL, this is no longer necessary.
Can we also (probably in a separate patch) remove U
Hi Prabhakar,
Le Fri, 1 Jun 2012 19:04:37 +0530,
Prabhakar Lad a écrit :
> From: Rajashekhara, Sudhakar
>
> On DA850/OMAP-L138 it was observed that in RMII mode,
> auto negotiation was not performed. This patch enables
> auto negotiation in RMII mode. Without this patch, EMAC
> initialization
On Wed, Jun 06, 2012 at 09:11:01AM -0700, Stephen Warren wrote:
> On 06/05/2012 03:20 PM, Allen Martin wrote:
> > This is make naming consistent with the kernel and devicetree and in
> > preparation of pulling out the common tegra20 code.
>
> > diff --git a/boards.cfg b/boards.cfg
>
> This misses
On Wed, Jun 06, 2012 at 09:16:46AM -0700, Stephen Warren wrote:
> On 06/05/2012 03:20 PM, Allen Martin wrote:
> > In preparation for splitting out the armv4t code from tegra20, move
> > the tegra20 SoC code to arch/arm/cpu/tegra20-common. This code will
> > be compiled armv4t for the arm7tdmi and
On Wed, Jun 06, 2012 at 09:20:22AM -0700, Stephen Warren wrote:
> On 06/05/2012 03:20 PM, Allen Martin wrote:
> > Add support for specifying a differnt CPU for main u-boot and SPL
>
> typo^^
Got it, thanks.
> > u-boot builds. This is done by adding an optional SP
On 06/05/2012 09:45 PM, Xie Shaohui-B21989 wrote:
>> -Original Message-
>> From: Wood Scott-B07421
>> Sent: Wednesday, June 06, 2012 2:14 AM
>> To: Xie Shaohui-B21989
>> Cc: Wood Scott-B07421; u-boot@lists.denx.de; Tabi Timur-B04825
>> Subject: Re: [U-Boot] [PATCH] powerpc/CoreNet: add tool
On Wed, Jun 06, 2012 at 09:39:57AM -0700, Stephen Warren wrote:
> On 06/05/2012 03:20 PM, Allen Martin wrote:
> > Add support for tegra20 arm7 boot processor. This processor is used
> > to power on the Cortex A9 and transfer control to it.
>
> > diff --git a/arch/arm/cpu/arm720t/cpu.c b/arch/arm/
On Wed, Jun 06, 2012 at 09:44:59AM -0700, Stephen Warren wrote:
> On 06/05/2012 03:20 PM, Allen Martin wrote:
> > Add SPL options to tegra20 config files and enable SPL build for
> > seaboard in boards.cfg
>
> > diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h
>
> > +/* includ
On 06/06/2012 12:25 PM, Allen Martin wrote:
> On Wed, Jun 06, 2012 at 09:39:57AM -0700, Stephen Warren wrote:
>> On 06/05/2012 03:20 PM, Allen Martin wrote:
>>> Add support for tegra20 arm7 boot processor. This processor is used
>>> to power on the Cortex A9 and transfer control to it.
>>
>>> diff
On Wed, Jun 06, 2012 at 09:48:23AM -0700, Stephen Warren wrote:
> On 06/05/2012 03:20 PM, Allen Martin wrote:
> > Add target for tegra20 u-boot image. This is a concatenation of tegra
> > spl and normal u-boot binaries.
>
> > diff --git a/board/nvidia/seaboard/config.mk
> > b/board/nvidia/seaboa
On Wed, Jun 06, 2012 at 09:51:09AM -0700, Stephen Warren wrote:
> On 06/05/2012 03:20 PM, Allen Martin wrote:
> > This code is now included in the tegra20 SPL
>
> > @@ -323,34 +91,10 @@ void init_pmc_scratch(void)
> >
> > /* ODMDATA is for kernel use to determine RAM size, LP config, etc. */
Allen,
> -Original Message-
> From: Allen Martin [mailto:amar...@nvidia.com]
> Sent: Wednesday, June 06, 2012 12:37 PM
> To: Stephen Warren
> Cc: Tom Warren; s...@chromium.org; u-boot@lists.denx.de
> Subject: Re: [PATCH v2 08/10] tegra20: add u-boot.t2 target
>
> On Wed, Jun 06, 2012 at 0
On 06/06/2012 01:53 PM, Tom Warren wrote:
> Allen,
>
>> -Original Message-
>> From: Allen Martin [mailto:amar...@nvidia.com]
>> Sent: Wednesday, June 06, 2012 12:37 PM
>> To: Stephen Warren
>> Cc: Tom Warren; s...@chromium.org; u-boot@lists.denx.de
>> Subject: Re: [PATCH v2 08/10] tegra20:
Dear Shaohui Xie,
In message <1338979010-950-1-git-send-email-shaohui@freescale.com> you
wrote:
> Provides a tool to build boot Image for PBL(Pre boot loader) which is
> used on Freescale CoreNet SoCs, PBL can be used to load some instructions
> and/or data for pre-initialization. The default
Dear Shaohui Xie,
In message <1338979010-950-1-git-send-email-shaohui@freescale.com> you
wrote:
> Provides a tool to build boot Image for PBL(Pre boot loader) which is
> used on Freescale CoreNet SoCs, PBL can be used to load some instructions
> and/or data for pre-initialization. The default
On 06/06/2012 04:09 PM, Wolfgang Denk wrote:
> Dear Shaohui Xie,
>
> In message <1338979010-950-1-git-send-email-shaohui@freescale.com> you
> wrote:
>> + For eSPI boot:
>> +To build the eSPI boot image for P4080DS:
>> +make P4080DS_SPIFLASH
>> +
>> +To build the eSPI boot image
On Wed, Jun 06, 2012 at 12:57:05PM -0700, Stephen Warren wrote:
> On 06/06/2012 01:53 PM, Tom Warren wrote:
> >>
> >> I'll move the SPL to 0x108000 and the normal u-boot to 0x208000 if that
> >> sounds more acceptable.
> > The current flash tools everyone is using expect to flash U-Boot to
> > 0x0
On Wed, Jun 06, 2012 at 12:17:53PM -0700, Stephen Warren wrote:
> Oh, I see. MACH_TEGRA_GENERIC means "some Tegra SoC", and CONFIG_TEGRA*
> indicate which one. Coming from my kernel background, MACH_* is a define
> for a particular board, and we do have a GENERIC Tegra board, so I got
> the wrong e
On 06/06/2012 04:18 PM, Allen Martin wrote:
> On Wed, Jun 06, 2012 at 12:17:53PM -0700, Stephen Warren wrote:
>> Oh, I see. MACH_TEGRA_GENERIC means "some Tegra SoC", and CONFIG_TEGRA*
>> indicate which one. Coming from my kernel background, MACH_* is a define
>> for a particular board, and we do h
On 06/06/2012 04:00 PM, Allen Martin wrote:
> On Wed, Jun 06, 2012 at 12:57:05PM -0700, Stephen Warren wrote:
>> On 06/06/2012 01:53 PM, Tom Warren wrote:
I'll move the SPL to 0x108000 and the normal u-boot to 0x208000 if that
sounds more acceptable.
>>> The current flash tools every
>-Original Message-
>From: Wood Scott-B07421
>Sent: Thursday, June 07, 2012 2:19 AM
>To: Xie Shaohui-B21989
>Cc: Wood Scott-B07421; u-boot@lists.denx.de; Tabi Timur-B04825
>Subject: Re: [U-Boot] [PATCH] powerpc/CoreNet: add tool to support pbl
>image build.
>
>On 06/05/2012 09:45 PM, Xie Sh
Hi,
On Mon, Jun 4, 2012 at 10:52 PM, Rajeshwari Shinde wrote:
> This patch performs the pinmux configuration in a common file.
> As of now only EXYNOS5 pinmux for SDMMC, UART and Ethernet is
> supported.
>
> Signed-off-by: Abhilash Kesavan
> Signed-off-by: Che-Liang Chiou
> Signed-off-by: Raje
On Mon, Jun 4, 2012 at 10:52 PM, Rajeshwari Shinde wrote:
> Use the pinmux configuration function for SMDK5250.
>
> Signed-off-by: Abhilash Kesavan
> Signed-off-by: Rajeshwari Shinde
> Acked-by: Chander Kashyap
> Acked-by: Simon Glass
>
Looks good
Acked-by: Simon Glass
> ---
> Changes in
Hi Marek Vasut,
>> Ping..
>
> +1
Thanks..
Thanks,
Sricharan
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
This SoC is used in the Raspberry Pi, for example.
Initial support is enough to boot to a serial console, and execute a
minimal set of U-Boot commands. No drivers are implemented. For more
details, see http://www.broadcom.com/products/BCM2835 or
http://www.raspberrypi.org/wp-content/uploads/2012/0
The Raspberry Pi model B uses the BCM2835 SoC, has 256MB of RAM, contains
an SMSC 9512 USB LAN/Hub chip, and various IO connectors. For more details,
see http://www.raspberrypi.org/.
Signed-off-by: Stephen Warren
---
MAINTAINERS |4 ++
board/raspberrypi/rpi_b/Makefile |
Use the pinmux configuration function for SMDK5250.
Signed-off-by: Abhilash Kesavan
Signed-off-by: Rajeshwari Shinde
Acked-by: Chander Kashyap
Acked-by: Simon Glass
---
Changes in V2:
- Removed exynos5_gpio_part1 *gpio1 global variable as initialised in
pinmux.c.
Changes in V3:
This patch performs the pinmux configuration in a common file.
As of now only EXYNOS5 pinmux for SDMMC, UART and Ethernet is
supported.
Signed-off-by: Abhilash Kesavan
Signed-off-by: Che-Liang Chiou
Signed-off-by: Rajeshwari Shinde
Acked-by: Chander Kashyap
Acked-by: Simon Glass
---
Changes i
This patch set enables I2C support for EXYNOS5.
This patchset modifies the s3c24x0 I2C driver to use same for EXYNOS5.
Multichannel support has been added to the s3c24x0 I2C driver.
s3c24x0_i2c struct has been moved to a common place as it can used
by different SOC's.
Changes in V2:
- Inco
This adds i2c clock information for EXYNOS5.
Signed-off-by: Alim Akhtar
Signed-off-by: Doug Anderson
Signed-off-by: Rajeshwari Shinde
Acked-by: Simon Glass
---
changes in V2:
- Incorporated comments from Simon Glass which are removed extra
braces around (readl(&clk->div_top1))
This patch adds the base address for I2C.
Signed-off-by: Alim Akhtar
Signed-off-by: Rajeshwari Shinde
Acked-by: Simon Glass
---
arch/arm/include/asm/arch-exynos/cpu.h |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/i
This patch adds pinmux code for I2C.
Signed-off-by: Rajeshwari Shinde
Acked-by: Simon Glass
---
Changes in V2:
- Aligned the pinmux functionality as per the latest comments.
This patch depends on the following patch:
"[U-Boot] [PATCH 1/2 V6] EXYNOS5: PINMUX: Added default pinumx settings
This adds multiple i2c channel support for I2C.
Signed-off-by: Alim Akhtar
Signed-off-by: Rajeshwari Shinde
Acked-by: Simon Glass
---
drivers/i2c/s3c24x0_i2c.c | 27 +++
1 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/drivers/i2c/s3c24x0_i2c.c b/driver
This patch modifies the S3C I2C driver to suppport EXYNOS5.
The cahnges made to driver are as follows:
- I2C base address is passed as a parameter to many
functions to avoid multiple #ifdef
- I2C init for Exynos5 is made as different function.
- Channel initialisatio
This enables I2C support on smdk5250.
Signed-off-by: Alim Akhtar
Signed-off-by: Doug Anderson
Signed-off-by: Rajeshwari Shinde
Acked-by: Simon Glass
---
include/configs/smdk5250.h |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/include/configs/smdk5250.h b/incl
struct s3c24x0_i2c is being moved to common local header file so that
the same can be used by s3c series and exynos series SoCs.
Signed-off-by: Alim Akhtar
Signed-off-by: Doug Anderson
Signed-off-by: Rajeshwari Shinde
Acked-by: Simon Glass
---
arch/arm/include/asm/arch-s3c24x0/s3c24x0.h | 1
As exynos has more than one i2c channels. This patch adds offset padding
for struct s3c24x0_i2c, in order to get the new base address of next i2c
channel.
Signed-off-by: Alim Akhtar
Signed-off-by: Rajeshwari Shinde
Acked-by: Simon Glass
---
drivers/i2c/s3c24x0_i2c.h |3 +++
1 files change
When compile the slave image for boot from SRIO, no longer need to
specify which SRIO port it will boot from. The code will get this
information from RCW and then finishes corresponding configurations.
This has the following advantages:
1. No longer need to rebuild an image when change the
Get rid of the SRIOBOOT_MASTER build target, and to support for serving as
a SRIO boot master via environment variable. Set the environment variable
"bootmaster" to "SRIO1" or "SRIO2" using the following command:
setenv bootmaster SRIO1
saveenv
The "bootmaster" wil
Update some descriptions due to the implementation changes:
For master:
Get rid of the SRIOBOOT_MASTER build target, and to support
for serving as a SRIO boot master via environment variable.
For slave:
1. When compile the slave image for boot from SRIO, no longer
Added descriptions about boot from PCIE in the files README and
doc/README.srio-pcie-boot-corenet, and changed the name of the
doc/README.srio-boot-corenet to doc/README.srio-pcie-boot-corenet.
Signed-off-by: Liu Gang
---
README| 12 ++--
doc/README.srio-boot-corene
When boot from PCIE, slave's core should be in holdoff after powered on for
some specific requirements. Master will release the slave's core at the
right time by PCIE interface.
Slave's ucode and ENV can be stored in master's memory space, then slave
can fetch them through PCIE interface. For the
For the powerpc processors with PCIE interface, boot location can be
configured from one PCIE interface by RCW. The processor booting from PCIE
can do without flash for u-boot image. The image can be fetched from another
processor's memory space by PCIE link connected between them.
The processor b
62 matches
Mail list logo
