From: Tetsuyuki Kobayashi
Signed-off-by: Tetsuyuki Kobayashi
---
Changes for v2:
- New
Changes for v3:
- No change
Changes for v4:
- No change
MAINTAINERS |1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 45446f4..55a6c1b 100644
--- a/MAINTAINERS
+++ b/
From: Tetsuyuki Kobayashi
Do soft power on reset in U-Boot reset command.
Signed-off-by: Tetsuyuki Kobayashi
---
Changes for v4:
- New
arch/arm/include/asm/arch-rmobile/sh73a0.h |4
board/kmc/kzm9g/kzm9g.c|2 ++
2 files changed, 6 insertions(+)
diff --git a/
From: Tetsuyuki Kobayashi
Problem:
Linux kernel hangs up when it write a file to NFS mounted directory.
Solution:
Modify bus controller setting for CS4, which connected smsc9221 ethernet
controller.
Detail:
Modify CS4BCR bit[29:28] (IWW[1:0]) from 00 to 01.
Modify CS4BCR bit[20:19] (IWRRD[1:0])
From: Tetsuyuki Kobayashi
Change U-Boot prompt to board specific one.
Signed-off-by: Tetsuyuki Kobayashi
Signed-off-by: Nobuhiro Iwamatsu
---
Changes for v2:
- No change. Just rebased.
Changes for v3:
- No change.
Changes for v4:
- No change.
include/configs/kzm9g.h |2 +-
1 file chan
From: Tetsuyuki Kobayashi
Add dummy member to struct sh73a0_rwdt in sh73a0.h.
Without this, initializing watch dog timer goes wrong.
Signed-off-by: Tetsuyuki Kobayashi
---
Changes for v2:
- New
Changes for v3:
- No change
Changes for v4:
- No change
arch/arm/include/asm/arch-rmobile/sh73a0
From: Tetsuyuki Kobayashi
Adjust low level hardware setting in s_init.
Signed-off-by: Tetsuyuki Kobayashi
Signed-off-by: Nobuhiro Iwamatsu
---
Changes for v2:
- No change. Just rebased.
Changes for v3:
- No change.
Changes for v4:
- No change.
arch/arm/include/asm/arch-rmobile/sh73a0.h |
From: Tetsuyuki Kobayashi
Reserve first 16MB for RT-CPU (as same as kernel config).
Signed-off-by: Tetsuyuki Kobayashi
Signed-off-by: Nobuhiro Iwamatsu
---
Changes for v2:
- No change. Just rebased.
Changes for v3:
- No change.
Changes for v4:
- No change.
include/configs/kzm9g.h |5 +
From: Tetsuyuki Kobayashi
Hi, Iwamatsu-san
This is v4 patch set for kzm9g.
I modified bus controller setting for CS4.
And enabled reset command.
Tetsuyuki Kobayashi (7):
arm: rmobile: kzm9g: Modify sdram area
arm: rmobile: kzm9g: Adjust low level hardware setting
arm: rmobile: kzm9g: ch
Dear Donghwa,
On 2 July 2012 11:22, Donghwa Lee wrote:
> This patch supports exynos fimd driver for various exynos series different
> from
> existing it supports only exynos4 chip.
>
> Signed-off-by: Donghwa Lee
> Signed-off-by: Kyungmin Park
> ---
> arch/arm/include/asm/arch-exynos/fb.h |
On 04/24/2012 09:38 AM, thomas wrote:
The following changes since commit 61ddce07f8b96c5df7d00466b4da9edaecb0eff1:
sandbox: Use the new run_command() (2012-04-23 22:53:54 +0200)
are available in the git repository at:
git://git.denx.de/u-boot-nios.git master
Thomas Chou (1):
nios2
This patch adds SPL support for IGEP-based boards.
Tested on an IGEPv2 Rev.C board with Micron NAND Flash memory.
Signed-off-by: Javier Martinez Canillas
---
Changes since v1:
- CONFIG_SPL_MAX_SIZE should be 54 * 1024 instead of 45 * 1024 as
suggested by Tom Rini
board/isee/igep0020/config.
On 07/16/2012 04:41 PM, Javier Martinez Canillas wrote:
[snip]
> Runtime detection is possible reading the sysboot as you said (in fact
> this is how we do it in the kernel) but as Tom said I didn't find a
> common way to do this. I guess you can manually detect the NAND type
> and configure the G
On Mon, Jul 16, 2012 at 7:58 PM, Tom Rini wrote:
> On 07/16/2012 12:43 AM, Enric Balletbò i Serra wrote:
>
> [snip]
>> I would like to investigateif we can do this using runtime detection
>> instead of a separate config option. Give me some days. The runtime
>> detection can be done reading the sy
On Mon, Jul 16, 2012 at 8:01 PM, Tom Rini wrote:
> On 07/13/2012 12:41 PM, Javier Martinez Canillas wrote:
>
>> This patch adds SPL support for IGEP-based boards.
>>
>> Tested on an IGEPv2 Rev.C board with Micron NAND Flash memory.
> [snip]
>> +#define CONFIG_SPL_MAX_SIZE (45 * 1024)
>
>
Hi Detlev,
On Tue, Jul 17, 2012 at 7:30 AM, Detlev Zundel wrote:
>
> * Conflict resolution: setting up a moderator procedure for
> unhappy submitters
>
> A recent occurence on the mailing list where contributers were sent
> through multiple rounds of patch submissions for non-obvious reasons w
Add SPL options to tegra20 config files and enable SPL build for
tegra20 boards. Also remove redundant code from u-boot that is not
contained in SPL.
Signed-off-by: Allen Martin
Acked-by: Stephen Warren
Tested-by: Thierry Reding
---
Makefile |9 ++
arch/arm/cp
Rename CONFIG_MACH_TEGRA_GENERIC to the less confusing CONFIG_TEGRA.
The meaning of the config options is now:
CONFIG_TEGRA - Any tegra chip
CONFIG_TEGRA20 - A tegra20 family chip
CONFIG_TEGRA30 - A tegra30 family chip (not added yet)
Signed-off-by: Allen Martin
Acked-by: Stephen Warren
Tested-
Add support for tegra20 arm7 boot processor. This processor is used
to power on the Cortex A9 and transfer control to it. In tegra this
processor is an ARM7TDMI not an ARM720T, but since we don't use cache
it was easier to just reuse the ARM720T code as the processors are
otherwise identical exce
Add target for tegra20 u-boot image. This is a concatenation of tegra
spl and normal u-boot binaries. For non-devicetree builds this is
named "u-boot-nodtb-tegra.bin" for devicetree builds is named
"u-boot-dtb-tegra.bin".
Signed-off-by: Allen Martin
Acked-by: Stephen Warren
Tested-by: Thierry
Change the mkdir commands for the object directories to be
unconditional. This fixes an issue when building for SPL where
SRCTREE and OBJTREE are the same, but $(obj) is under SPLTREE.
Signed-off-by: Allen Martin
Acked-by: Stephen Warren
Tested-by: Thierry Reding
---
board/avionic-design/medc
Don't use timer_init from tegra board.c. This comes out of arm720t
for the SPL build.
Signed-off-by: Allen Martin
Acked-by: Stephen Warren
Tested-by: Thierry Reding
---
board/nvidia/common/board.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/board/nvidia/common/board.c b/board/nvi
In preparation for splitting out the armv4t code from tegra20, move
the tegra20 SoC code to arch/arm/cpu/tegra20-common. This code will
be compiled armv4t for the arm7tdmi and armv7 for the cortex A9.
Signed-off-by: Allen Martin
Acked-by: Stephen Warren
Tested-by: Thierry Reding
---
Makefile
This fixes the SPL build to link with the SPL version of libgcc if
USE_PRIVATE_LIBGCC is set to "yes". Previously it was linking with
the libgcc from the normal u-boot build because it gets set in
PLATFORM_LIBS and passed down the to the SPL build.
Signed-off-by: Allen Martin
Acked-by: Stephen W
Take a few SPL fixes from armv7 and apply them to arm720t:
-Use dummy exception handlers for SPL build
-Initialize relocation register r9 to 0 for the case of no relocation
-ifdef out interrupt handler code
Signed-off-by: Allen Martin
Acked-by: Stephen Warren
Tested-by: Thierry Reding
---
arch
Move warmboot_save_sdram_params() to later in the boot sequence. This
code relies on devicetree to get the address of the memory controller
and with upcoming changes for SPL boot it gets called early in the
boot process when devicetree is not initialized yet.
Signed-off-by: Allen Martin
Acked-by
These flags were necessary when building tegra20 as a single binary
that supported ARM7TDMI and Cortex A9. Now that the ARM7TDMI support
is split into a separate SPL, this is no longer necessary.
Signed-off-by: Allen Martin
Acked-by: Stephen Warren
Tested-by: Thierry Reding
---
arch/arm/cpu/a
Enable the building of private libgcc for SPL
Signed-off-by: Allen Martin
Acked-by: Stephen Warren
Tested-by: Thierry Reding
---
arch/arm/lib/Makefile |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 39a9550..bd3b77f 100
This patch series fixes a long standing problem with the tegra20
u-boot build. Tegra20 contains an ARM7TDMI boot processor and a
Cortex A9 main processor. Prior to this patch series this was
accomplished by #ifdefing out any armv7 code from the early boot
sequence and creating a single binary tha
Add support for specifying a different CPU for main u-boot and SPL
u-boot builds. This is done by adding an optional SPL CPU after the
main CPU in boards.cfg as follows:
normal_cpu:spl_cpu
This this case CPU will be set to "normal_cpu" during the main u-boot
build and "spl_cpu" during the S
Add tegra20-common-post.h to be consistent with other tegra20 boards.
Signed-off-by: Allen Martin
Acked-by: Thierry Reding
Acked-by: Stephen Warren
Tested-by: Thierry Reding
---
include/configs/tec.h |2 ++
1 file changed, 2 insertions(+)
diff --git a/include/configs/tec.h b/include/conf
On 07/16/2012 02:57 PM, Wolfgang Denk wrote:
> Dear Scott,
>
> In message <5000ab43.6090...@freescale.com> you wrote:
>>
>>> You are interpreting something which can be random data.
>>>
if (e.version == 0)
crc_offset = 0x72;
So here we're reading the 'version' field before w
Dear Dirk Behme,
> On 15.07.2012 00:08, Benoît Thébaudeau wrote:
> > On Sat, Jul 14, 2012 at 11:28:03PM +0200, Benoît Thébaudeau wrote:
> >> Shouldn't the MMC/eSDHC drivers flush/invalidate the dcache ranges
> >> that they use
> >> for DMA operations? Not doing so would explain why stack-allocated
On Mon, Jul 16, 2012 at 6:46 PM, Marek Vasut wrote:
...
>> early_delay(1000);
>> - if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) {
>> + if (mx28_valid_vbus() &&
>
> This is still likely to break any device that doesn't source it's 5V power
> supply from USB
I migh
Dear Otavio Salvador,
> Signed-off-by: Otavio Salvador
> ---
> Changes in v2:
> - add comments
> - fix when we have vbus OR vdd5v
> - improve patch short description
>
> arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 26
> +++--- 1 file changed, 19 insertions(+), 7
> deleti
On Mon, Jul 16, 2012 at 5:42 PM, Marek Vasut wrote:
> Dear Otavio Salvador,
>
> [...]
>>
>> - if (tmp & POWER_STS_VDD5V_GT_VDDIO) {
>> + if (mx28_valid_vbus() && (tmp & POWER_STS_VDD5V_GT_VDDIO)) {
>
>
> So if the board isn't supplied by USB VBUS, this will fail now?
I sen
Signed-off-by: Otavio Salvador
---
Changes in v2:
- add comments
- fix when we have vbus OR vdd5v
- improve patch short description
arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 26 +++---
1 file changed, 19 insertions(+), 7 deletions(-)
diff --git a/arch/arm/cpu/arm926ej
Hi,
as promised, here are my expanded notes from the BoF meeting at LSM2012
last week. It was a pleasure to get some core developers into one room
at the same time and discuss controversial topics without the health of
any one attendant being in jeopardy at any time, so thanks again to
everybody
Dear Otavio Salvador,
> The mx28 prefix has been added to the initialization data and function
> so it is clear by which SoC it is used as i.MX233 will have a specific
> one.
>
> Signed-off-by: Otavio Salvador
Acked-by: Marek Vasut
[...]
Best regards,
Marek Vasut
Dear Otavio Salvador,
[...]
>
> - if (tmp & POWER_STS_VDD5V_GT_VDDIO) {
> + if (mx28_valid_vbus() && (tmp & POWER_STS_VDD5V_GT_VDDIO)) {
So if the board isn't supplied by USB VBUS, this will fail now?
[...]
Best regards,
Marek Vasut
On Mon, Jul 16, 2012 at 5:19 PM, Marek Vasut wrote:
>> The information now is gathered from HW_DIGCTL_CHIPID register and
>> includes the chip modem and revision on the output.
>>
>> Signed-off-by: Otavio Salvador
>
> This one is OK with me, queue for next maybe?
Fine with me. This is not urgent
The mx28 prefix has been added to the initialization data and function
so it is clear by which SoC it is used as i.MX233 will have a specific
one.
Signed-off-by: Otavio Salvador
---
arch/arm/cpu/arm926ejs/mx28/spl_mem_init.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
d
Signed-off-by: Otavio Salvador
---
arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 21 ++---
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
index 4b09b0c..c8a35af 100644
-
Those patches are waiting in my tree for some time and are part of my
work i.MX233 support. Am trying to send small parts that are ready for
merging and that do not depends on i.MX233 SoC to work.
Otavio Salvador (2):
i.MX28: Check if we are using a valid VBUS when initializing power
i.MX28: u
Dear Tom Rini,
> On 07/16/2012 11:58 AM, Marek Vasut wrote:
> > Dear Tom Rini,
> >
> >> On 07/16/2012 12:33 AM, Heiko Schocher wrote:
> >>> Hello Marek,
> >>>
> >>> added Tom Rini to cc, as he is the ti maintainer ...
> >>>
> >>> On 15.07.2012 15:42, Marek Vasut wrote:
> Hi guys,
>
>
Dear Otavio Salvador,
> The information now is gathered from HW_DIGCTL_CHIPID register and
> includes the chip modem and revision on the output.
>
> Signed-off-by: Otavio Salvador
This one is OK with me, queue for next maybe?
Acked-by: Marek Vasut
> ---
> Changes in v2:
> - use ?? for uniden
Dear Scott,
In message <5000ab43.6090...@freescale.com> you wrote:
>
> > You are interpreting something which can be random data.
> >
> >> if (e.version == 0)
> >>crc_offset = 0x72;
> >>
> >> So here we're reading the 'version' field before we validate the data,
> >> because we need to check
On 07/16/2012 11:58 AM, Marek Vasut wrote:
> Dear Tom Rini,
>
>> On 07/16/2012 12:33 AM, Heiko Schocher wrote:
>>> Hello Marek,
>>>
>>> added Tom Rini to cc, as he is the ti maintainer ...
>>>
>>> On 15.07.2012 15:42, Marek Vasut wrote:
Hi guys,
is there any hope the ad-hoc implemen
The information now is gathered from HW_DIGCTL_CHIPID register and
includes the chip modem and revision on the output.
Signed-off-by: Otavio Salvador
---
Changes in v2:
- use ?? for unidentified revision and cpu type
- use numeric revisions
Changes in v3:
- drop mx23 data as it will be posted in
This patch adds support for the 8D Technologies ECO5-PK board which is
based on the TI AM3505 ARM SOC.
Signed-off-by: Raphael Assenat
diff --git a/board/8dtech/eco5pk/Makefile b/board/8dtech/eco5pk/Makefile
new file mode 100644
index 000..befe60a
--- /dev/null
+++ b/board/8dtech/eco5pk/Makef
Dear Tom Rini,
> On 07/16/2012 12:33 AM, Heiko Schocher wrote:
> > Hello Marek,
> >
> > added Tom Rini to cc, as he is the ti maintainer ...
> >
> > On 15.07.2012 15:42, Marek Vasut wrote:
> >> Hi guys,
> >>
> >> is there any hope the ad-hoc implementation of davinci emac PHYs will
> >> ever be
On 07/13/2012 12:41 PM, Javier Martinez Canillas wrote:
> This patch adds SPL support for IGEP-based boards.
>
> Tested on an IGEPv2 Rev.C board with Micron NAND Flash memory.
[snip]
> +#define CONFIG_SPL_MAX_SIZE (45 * 1024)
This should be 54 * 1024. Thanks!
--
Tom
_
On 07/16/2012 12:43 AM, Enric Balletbò i Serra wrote:
[snip]
> I would like to investigateif we can do this using runtime detection
> instead of a separate config option. Give me some days. The runtime
> detection can be done reading the sysboot configuration for example. I
> think it's possible,
Hi,
>> How about amending the U-Boot design principles with
>
> Go for it - it's a wiki.
Thinking about it, I turned it not into a rule, but into a Lemma from
the 10 rules:
Lemmas from the golden rules
1. Generic Code is Good Code
New code shall be as generic as possible and added t
On 09/07/2012 12:48, Marek Vasut wrote:
> Pull out all the PIO transfer logic into separate function,
> so DMA can be added.
>
> Signed-off-by: Marek Vasut
> Cc: Fabio Estevam
> Cc: Otavio Salvador
> Cc: Stefano Babic
> Cc: Wolfgang Denk
> ---
Applied to u-boot-imx, next branch, thanks.
Bes
On 09/07/2012 12:48, Marek Vasut wrote:
> This makes it easier to adapt for addition of DMA support.
>
> Signed-off-by: Marek Vasut
> Cc: Fabio Estevam
> Cc: Otavio Salvador
> Cc: Stefano Babic
> Cc: Wolfgang Denk
> ---
Applied to u-boot-imx, next branch, thanks.
Best regards,
Stefano Babic
On 09/07/2012 12:48, Marek Vasut wrote:
> The DMA transfers happen only if the transfered data are larger
> than 512 bytes. Otherwise PIO is used. This is a small speed
> optimization.
>
> The DMA transfer doesn't work if unaligned transfer is requested
> due to the limitation of the DMA controlle
On 07/16/2012 12:33 AM, Heiko Schocher wrote:
> Hello Marek,
>
> added Tom Rini to cc, as he is the ti maintainer ...
>
> On 15.07.2012 15:42, Marek Vasut wrote:
>> Hi guys,
>>
>> is there any hope the ad-hoc implementation of davinci emac PHYs will
>> ever be
>> flipped to phylib ?
>
> I curren
On Mon, Jul 16, 2012 at 8:04 AM, Stefano Babic wrote:
> On 30/06/2012 17:07, Otavio Salvador wrote:
>> The information now is gathered from HW_DIGCTL_CHIPID register and
>> includes the revision of the chip on the output.
>
> could you take a look and rebase it ? It does not apply anymore - thanks
On Wed, Jun 06, 2012 at 01:16:49AM +0200, Simon Guinot wrote:
> Changes for v2:
> - Move board support and feature into a separate patch set.
> - Move mach-types update into a separate patch.
>
> Simon Guinot (4):
> lacie_kw: add support for EFI partitions
> ARM: add netspace_mini_v2 to mach
Dear Ilya Yanok,
> Dear Marek,
>
> ok, I finally managed to fix it. Will post the patches in a few seconds.
So the link I sent you was true afterall ? :)
What was the problem? I'll pick the patches for -next though, unless we're 100%
definitelly sure they won't break anything else.
> Regards,
On 30/06/2012 17:07, Otavio Salvador wrote:
> The information now is gathered from HW_DIGCTL_CHIPID register and
> includes the revision of the chip on the output.
>
> Signed-off-by: Otavio Salvador
> Cc: Marek Vasut
> Cc: Stefano Babic
> Cc: Fabio Estevam
>
> ---
Hi Otavio,
could you take
On 30/06/2012 17:07, Otavio Salvador wrote:
> In case an unidentified CPU type is detected it now returns
> i.MX??, in a const char.
>
> Signed-off-by: Otavio Salvador
> Cc: Marek Vasut
> Cc: Stefano Babic
> Cc: Fabio Estevam
>
> ---
Applied to u-boot-imx, next branch, thanks.
Best regards,
Add support for new board iConnect from Iomega.
More information about the device can be found here:
http://go.iomega.com/en/products/network-storage-desktop/wireless-data-station/network-hard-drive-iconnect/?partner=4735
Signed-off-by: Luka Perkov
Tested-by: Wojciech Dubowik
Tested-by: Tim Fl
On 13/07/2012 12:38, Marek Vasut wrote:
> Dear Dirk Behme,
>
> [...]
>
>>> Ok, everything was already clear, and I can also add my:
>>>
>>> Acked-by: Stefano Babic
>>
>> Same for this one: Is this applied anywhere? It doesn't seem to be part
>> of v2012.07-rc1?
>>
>> Best regards
>
> Stefano, o
Dear Andy,
On 9 July 2012 11:45, Jaehoon Chung wrote:
> Hi Andy,
>
> Could you merge these series?
> If you don't mind, could we merge this at u-boot-samsung?
> To use the exynos5, must enable the DesignWare Controller for eMMC.
>
> Best Regards,
> Jaehoon Chung
>
> On 07/03/2012 04:57 PM, Jaehoo
Hi,
I'm struggling with the topic for long two days and I want to ask for help.
I have a DNS-320 system with u-boot. I compiled kernel and it works
well, but I need initramfs. I prepared contents on this system (ARM) (no
need to cross-compile), then did:
find . -print0 | cpio --null -ov --fo
From: Tom Rini
The USB spec says that 32 bytes is the minimum required alignment.
However on some platforms we have a larger minimum requirement for cache
coherency. In those cases, use that value rather than the USB spec
minimum. We add a cpp check to to define USB_DMA_MINALIGN and
make use o
Move or_asynclistaddr programming to ehci_submit_async()
function to make sure queue head is properly programmed
before every transfer. This solves the problem with changing
qh address.
Also remove unneeded qh_list->qh_link reprogramming at the
end of transfer.
Signed-off-by: Ilya Yanok
---
dri
Dear Marek,
ok, I finally managed to fix it. Will post the patches in a few seconds.
Regards, Ilya.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Hello Marek,
added Tom Rini to cc, as he is the ti maintainer ...
On 15.07.2012 15:42, Marek Vasut wrote:
Hi guys,
is there any hope the ad-hoc implementation of davinci emac PHYs will ever be
flipped to phylib ?
I currently have no such job in sight ...
bye,
Heiko
--
DENX Software Engineer
On 16/07/2012 08:26, Andreas Salvisberg wrote:
> Dear Mr. Babic
>
>
Hi,
please use the U-Boot ML for U-Boot related questions. You will find
much more help than asking to a single person and your questions can
interest many other people.
>
> I try to run a USB Host on a i.MX53 Board. Unfortu
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