Re: [U-Boot] [U-boot]: MMC: add sdhci generic framework

2013-05-20 Thread Jagan Teki
Hi Rommel, Thanks for your information. On Tue, May 21, 2013 at 4:20 AM, Rommel Custodio wrote: > > Jagannadha Sutradharudu Teki xilinx.com> > writes: > >> >> Hi, >> >> On.. drivers/mmc/sdhci.c >> + if (caps & SDHCI_CAN_DO_8BIT) >> + mmc->host_caps |= MMC_MODE_8BIT; >> >> H

Re: [U-Boot] [PATCH] common/Makefile: Add new symbol CONFIG_SPL_ENV_SUPPORT for environment in SPL

2013-05-20 Thread Zhang Ying-B40530
-Original Message- From: Wood Scott-B07421 Sent: Tuesday, May 21, 2013 2:56 AM To: Zhang Ying-B40530 Cc: Wood Scott-B07421; u-boot@lists.denx.de; aflem...@gmail.com; Xie Xiaobo-R63061; Tom Rini Subject: Re: [PATCH] common/Makefile: Add new symbol CONFIG_SPL_ENV_SUPPORT for environment

Re: [U-Boot] [U-boot]: MMC: add sdhci generic framework

2013-05-20 Thread Rommel Custodio
Jagannadha Sutradharudu Teki xilinx.com> writes: > > Hi, > > On.. drivers/mmc/sdhci.c > + if (caps & SDHCI_CAN_DO_8BIT) > + mmc->host_caps |= MMC_MODE_8BIT; > > Here we are setting 8BIT bus width, if the sdhci capabilities register 18 bit is set. > Does 18-bit is really

[U-Boot] [PATCH] arm: pxa: PXA270 D-Cache as ram

2013-05-20 Thread Sergey Yanovich
2.2.5.2 of Marvell PXA27x Processor Family Developers Manual says: "The PXA27x processor cache configuration is identical to that of the PXA255 processor." As a result, it is perfectly legitimate to use PXA25X 'lock_cache_for_stack' on PXA27X as well. Signed-off-by: Sergey Yanovich --- arch/arm

[U-Boot] [PATCH] arm: pxa: config option for PXA270 turbo mode

2013-05-20 Thread Sergey Yanovich
PXA270 CPU has turbo mode. The mode is 2.5 times faster than the default run mode. Activating the mode early significantly speeds up boot process. Signed-off-by: Sergey Yanovich --- arch/arm/cpu/pxa/pxa2xx.c |7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/arm/cp

[U-Boot] [PATCH v2] arm: pxa: Add support for ICP DAS LP-8x4x

2013-05-20 Thread Sergey Yanovich
LP-8x4x is a programmable automation controller by ICP DAS. It is shipped with outdated U-Boot v1.3.0 This patch adds enough supports to boot the board: - 128M of 128M SDRAM - 32M of 48M NOR Flash memory - 1 of 4 Serial consoles (PXA FFUART) - 2 of 2 Ethernet controllers (DM9000) Signed-off-b

[U-Boot] [PATCH] tools/fw_env: use fsync to ensure that data is physically stored

2013-05-20 Thread Michael Heimpold
Closing a file descriptor does not guarantee that the data has been successfully saved to disk, as the kernel might defer the write. Signed-off-by: Michael Heimpold --- tools/env/fw_env.c | 12 1 file changed, 12 insertions(+) diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c

Re: [U-Boot] [PATCH] common/Makefile: Add new symbol CONFIG_SPL_ENV_SUPPORT for environment in SPL

2013-05-20 Thread Scott Wood
On 05/17/2013 07:58:15 PM, Zhang Ying-B40530 wrote: From: Wood Scott-B07421 Sent: Friday, May 17, 2013 10:41 PM To: Zhang Ying-B40530 Cc: u-boot@lists.denx.de; aflem...@gmail.com; Xie Xiaobo-R63061; Zhang Ying-B40530 Subject: Re: [PATCH] common/Makefile

Re: [U-Boot] [PATCH 2/2] common: Use separate dirs for each board for ccache

2013-05-20 Thread Marek Vasut
Dear Marek Vasut, > When using ccache in MAKEALL, use separate directory for the cache > for each board. This way we can avoid rewriting the same files by > building other boards. > > Signed-off-by: Marek Vasut > Cc: Tom Rini This one will need more work, sorry. Best regards, Marek Vasut

[U-Boot] [PATCH 0/2] Add ccache support

2013-05-20 Thread Marek Vasut
These two patches make it easy to use ccache with U-Boot to speed up iterative builds. The results of building SoC MXS without ccache: real1m29.286s user7m1.972s sys 0m46.668s The results of building SoC MXS with ccache for the first time: real1m37.551s user7m23.632s sys 0

[U-Boot] [PATCH 2/2] common: Use separate dirs for each board for ccache

2013-05-20 Thread Marek Vasut
When using ccache in MAKEALL, use separate directory for the cache for each board. This way we can avoid rewriting the same files by building other boards. Signed-off-by: Marek Vasut Cc: Tom Rini --- MAKEALL |7 +++ 1 file changed, 7 insertions(+) diff --git a/MAKEALL b/MAKEALL index 2

[U-Boot] [PATCH 1/2] common: Add CCACHE variable to allow use of ccache

2013-05-20 Thread Marek Vasut
Prefix HOSTCC and CC with CCACHE variable to allow easy use of ccache. In case the user wants to use ccache, exporting CCACHE=ccache will do the trick. It is of course possible to either make the cross-compiler name into a shellscript which invokes the ccache and the compiler, but setting this vari

Re: [U-Boot] [PATCH v4 0/4] Factorize ARM relocate_code instances

2013-05-20 Thread Benoît Thébaudeau
Hi Fabio, Stefano, On Monday, May 20, 2013 11:26:10 AM, Albert ARIBAUD wrote: > Hi Benoît, > > On Sun, 19 May 2013 17:57:59 +0200 (CEST), Benoît Thébaudeau > wrote: > > > Hi Albert, > > > > On Sunday, May 19, 2013 1:48:11 PM, Albert ARIBAUD wrote: > > > This series replaces all instances of re

Re: [U-Boot] [PATCH v02 1/2] OMAP3+: introduce generic ABB support

2013-05-20 Thread Nishanth Menon
On Mon, May 20, 2013 at 6:06 AM, Andrii Tseglytskyi wrote: > On 05/17/2013 04:11 PM, Nishanth Menon wrote: > > [snip] >> >> On 19:49-20130513, Andrii Tseglytskyi wrote: >> [...] >>> >>> + if (fuse && ldovbb) { >>> + if (abb_setup_ldovbb(fuse, ldovbb)) >>> +

[U-Boot] [U-boot]: MMC: add sdhci generic framework

2013-05-20 Thread Jagannadha Sutradharudu Teki
Hi, On.. drivers/mmc/sdhci.c + if (caps & SDHCI_CAN_DO_8BIT) + mmc->host_caps |= MMC_MODE_8BIT; Here we are setting 8BIT bus width, if the sdhci capabilities register 18 bit is set. Does 18-bit is really denoted for 8-bit bus width, I cound't find it on spec, https://www.s

Re: [U-Boot] [PATCH v02 1/2] OMAP3+: introduce generic ABB support

2013-05-20 Thread Andrii Tseglytskyi
Hi, Thank you for review. On 05/17/2013 04:11 PM, Nishanth Menon wrote: [snip] On 19:49-20130513, Andrii Tseglytskyi wrote: [...] + if (fuse && ldovbb) { + if (abb_setup_ldovbb(fuse, ldovbb)) + return; + } + + /* configure timings, based o

Re: [U-Boot] [PATCH 0/2 V2] EXYNOS5: Enable Gigabyte device GD25LQ and GD25Q64B

2013-05-20 Thread Minkyu Kang
Dear Rajeshwari, On 28/03/13 01:42, Simon Glass wrote: > Hi Minkyu, > > > On Tue, Mar 26, 2013 at 11:38 PM, Minkyu Kang > wrote: > > Dear Rajeshwari and Simon, > > On 12/03/13 15:13, Rajeshwari Birje wrote: > > Hi Minkyu, > > > > Yes it is base

Re: [U-Boot] [PATCH V2 OMAP-ULPI]: This patch fix the omap access to the transceiver configuration registers using the ulpi bus.

2013-05-20 Thread Michael Trimarchi
Hi On 20/05/13 12:05, Igor Grinberg wrote: > Hi Michael, > > Sorry for missing the subject last time... > For the subject: > In the square brackets, it should be stated just [PATCH vX] > Afterwards, should come the subsystem/platform > and then short yet meaningful patch description. For example:

Re: [U-Boot] [PATCH V2 OMAP-ULPI]: This patch fix the omap access to the transceiver configuration registers using the ulpi bus.

2013-05-20 Thread Igor Grinberg
Hi Michael, Sorry for missing the subject last time... For the subject: In the square brackets, it should be stated just [PATCH vX] Afterwards, should come the subsystem/platform and then short yet meaningful patch description. For example: [PATCH v2] usb: omap: ulpi: fix ulpi transceiver access

Re: [U-Boot] [PATCH v4 0/4] Factorize ARM relocate_code instances

2013-05-20 Thread Albert ARIBAUD
Hi Benoît, On Sun, 19 May 2013 17:57:59 +0200 (CEST), Benoît Thébaudeau wrote: > Hi Albert, > > On Sunday, May 19, 2013 1:48:11 PM, Albert ARIBAUD wrote: > > This series replaces all instances of relocate_code in > > various start.S files from the ARM architecture with a > > single instance in

[U-Boot] [PATCH V2 OMAP-ULPI]: This patch fix the omap access to the transceiver configuration registers using the ulpi bus.

2013-05-20 Thread Michael Trimarchi
This patch fix the omap access to the transceiver configuration registers using the ulpi bus. As reported by the documentation the bit31 is used only to check if the transaction is done or still running and the reading and writing operation have different offset and have different values. What we n