Am 03.07.2013 03:16, schrieb Fabio Estevam:
On Tue, Jul 2, 2013 at 12:26 PM, Matthias Weißer weiss...@arcor.de wrote:
Hi
I try to boot a current 3.11 kernel on a custom iMX25 board using DT. u-boot
starts the kernel but it stops working just after the first eralyprintk
lines are out. The
On Tue, 02 Jul 2013 16:40:08 -0400, Tom Rini wrote:
Hi Tom,
On Tue, Jul 02, 2013 at 11:58:51AM -0600, Stephen Warren wrote:
On 07/02/2013 10:28 AM, Tom Rini wrote:
Hey guys,
I'm wondering about something and looking for input. As has come
up a few times now, we have the ability
---
Makefile|2 +-
arch/arm/cpu/armv7/Makefile |2 +-
arch/arm/cpu/armv7/omap-common/Makefile |2 +-
arch/arm/include/asm/arch-am33xx/cpu.h |2 +-
arch/arm/include/asm/arch-am33xx/omap.h |2 +-
drivers/serial/ns16550.c
Hi, experts:
I am studying u-boot latest code now.
I have a question about monitor length.
1. in board_init_f() function in arch\arm\lib\board.c
Gd-mon_len = _bss_end_ofs;
2. in board_init_r() function in arch\arm\lib\board.c
Monitor_flash_len = _end_ofs;
Because _end_ofs _bss_end_ofs, so
Hi,
hopefully ;) a short question: We found that the commit
http://git.denx.de/?p=u-boot.git;a=commitdiff;h=3c945542dad99b1ec4a324ad6b69b8de8829827b
contains two files
board/qi/qi_lb60/qi_lb60.c
include/configs/qi_lb60.h
which seem to be GPL v3 *only*.
Is this ok for U-Boot?
Many thanks
Hi Dirk,
No as there is still GPLv2 only code U-Boot.
Regards
Graeme
On Wed, Jul 3, 2013 at 7:22 PM, Dirk Behme dirk.be...@de.bosch.com wrote:
Hi,
hopefully ;) a short question: We found that the commit
http://git.denx.de/?p=u-boot.**git;a=commitdiff;h=**
Dear Dirk Behme,
In message 51d3ed44.8080...@de.bosch.com you wrote:
hopefully ;) a short question: We found that the commit
http://git.denx.de/?p=u-boot.git;a=commitdiff;h=3c945542dad99b1ec4a324ad6b69b8de8829827b
contains two files
board/qi/qi_lb60/qi_lb60.c
Dear Xiangfu Liu,
In message 4e95a3ba.8000...@pobox.com you wrote:
Add support for the qi_lb60 (a.k.a QI Ben NanoNote) clamshell device
from Qi hardware:
http://en.qi-hardware.com/wiki/Ben_NanoNote
http://en.qi-hardware.com/wiki/Main_Page
http://en.wikipedia.org/wiki/Qi_hardware
This
From: Mingkai Hu mingkai...@freescale.com
C29XPCIE board is a series of Freescale PCIe add-in cards to perform
as public key crypto accelerator or secure key management module. It
includes C293PCIE board, C293PCIE board and C291PCIE board.
- 512KB platform SRAM in addition to 512K L2 Cache/SRAM
TFTP booting is slow when a USB keyboard is installed and
CONFIG_USB_KEYBOARD is defined.
The fix is to change Ctrl-C polling to every second when NET transfer
is running.
Signed-off-by: Jim Lin ji...@nvidia.com
---
Changes in v2:
1. Change configuration name from CONFIG_CTRLC_POLL_MS to
1. Add CONFIG_SYS_DPAA_RMAN macro to t4240 and b4860.
2. Decrease RMan liodn offset number.
SET_RMAN_LIODN() is used to set liodn offset of RMan blocks 0-3.
For t4240 and b4860, RMan liodn base is assigned to 922, the original
offset number is too large that the liodn (base+offset 922+678 = 1600)
Dear Po Liu,
In message 1372840694-17354-1-git-send-email-po@freescale.com you wrote:
From: Mingkai Hu mingkai...@freescale.com
C29XPCIE board is a series of Freescale PCIe add-in cards to perform
as public key crypto accelerator or secure key management module. It
includes C293PCIE
Hi Marek,
On Wed, Jul 3, 2013 at 2:57 AM, Marek Vasut ma...@denx.de wrote:
Dear Dan Murphy,
Vivek
On 07/02/2013 07:59 AM, Vivek Gautam wrote:
This change adds necessary xHCI host controller stack layer.
This stack will eventually interact with SoC specific USB 3.0
controller drivers
Dear Jim Lin,
In message 1372847667-31928-1-git-send-email-ji...@nvidia.com you wrote:
TFTP booting is slow when a USB keyboard is installed and
CONFIG_USB_KEYBOARD is defined.
The fix is to change Ctrl-C polling to every second when NET transfer
is running.
I'm not sure if we can accept
Hi Matthias,
On Wed, Jul 3, 2013 at 3:20 AM, Matthias Weißer weiss...@arcor.de wrote:
Isn't that supossed to be the right output for a DT kernel?
We usually get something like (for a mx6qsabrelite board - I do not
have my mx25pdk handy):
Machine: Freescale i.MX6 Quad/DualLite (Device Tree),
On 02/07/13 22:12, Rajeshwari Shinde wrote:
This patch performs the following:
1) Convert the assembly code for memory and clock initialization to C code.
2) Move the memory and clock init codes from board/samsung to arch/arm
3) Creat a common lowlevel_init file across Exynos4 and Exynos5.
On Wed, Jul 03, 2013 at 10:23:02AM +0200, TENART Antoine wrote:
---
Makefile|2 +-
arch/arm/cpu/armv7/Makefile |2 +-
arch/arm/cpu/armv7/omap-common/Makefile |2 +-
arch/arm/include/asm/arch-am33xx/cpu.h |2 +-
On Tue, Jul 02, 2013 at 11:45:46PM +0200, Wolfgang Denk wrote:
Dear Tom Rini,
In message 20130702162829.GG16630@bill-the-cat you wrote:
That said, when others have suggested something like this before,
Wolfgang has pointed out and NAK'd the idea of adding N different
configuration as
On Tue, Jul 02, 2013 at 03:05:22PM +0200, Andreas Bie?mann wrote:
On 07/01/2013 03:09 PM, Tom Rini wrote:
With the do_bootm_states re-organization, we have the call to any
potential sub-commands in a single spot. If one fails, we can then stop
right there and return to the caller. Prior
On Tue, Jul 02, 2013 at 09:19:31AM -0400, Tom Rini wrote:
On Tue, Jul 02, 2013 at 09:17:04AM -0400, Tom Rini wrote:
From: Andreas Bie??mann andreas.de...@googlemail.com
OK, forgot to update the topline commit message to:
avr32/m68k/microblaze/nds32/nios2/openrisc/sh/sparc: fix
Hi Minkyu Kang,
Thank you for comments. Please find the clarificatio below.
On Wed, Jul 3, 2013 at 5:40 PM, Minkyu Kang mk7.k...@samsung.com wrote:
On 02/07/13 22:12, Rajeshwari Shinde wrote:
This patch performs the following:
1) Convert the assembly code for memory and clock initialization
On Thu, Jun 27, 2013 at 08:20:01AM +0200, Wolfgang Denk wrote:
Dear Tom,
The following changes since commit ca85eb8c4271509aaac1ccb26ae3eb1a7827b4e6:
Merge branch 'master' of git://git.denx.de/u-boot-net (2013-06-24 22:27:44
-0400)
are available in the git repository at:
Dear Albert ARIBAUD,
Hi Marek,
On Thu, 27 Jun 2013 15:23:33 +0200, Marek Vasut ma...@denx.de wrote:
Hello Albert,
Hi Marek,
On Thu, 27 Jun 2013 13:26:39 +0200, Marek Vasut ma...@denx.de wrote:
Dear Heiko Schocher,
while playing with dfu, I tapped in an unaligned
On Mon, Jul 01, 2013 at 01:54:45PM +1000, Graeme Russ wrote:
Hi Guys,
Due to personal circumstances I left the U-Boot community back in late
October 2012.
Now I find my circumstances have been completely flipped upside down (long
story) and I will soon have much more time on my hands.
Excellent - I'm familiar with Henrik's work and it is top-notch.
I'm thinking of focusing on the SPL component - Adding a file system so the
DRAM parameters and U-Boot can be read from a standard file system rather
than fixed blocks
I'll purchase an A10 and A31 device soon
Regards,
Graeme
On
Hi Robert.
On Tue, Jul 2, 2013 at 11:15 PM, Simon Glass s...@chromium.org wrote:
Hi Robert,
On Jul 2, 2013 8:41 PM, Robert Nelson robertcnel...@gmail.com wrote:
On Tue, Jul 2, 2013 at 2:39 AM, Simon Glass s...@chromium.org wrote:
Hi Robert,
On Tue, Jul 2, 2013 at 5:44 AM, Robert
On Wed, Jul 03, 2013 at 10:52:18PM +0900, Simon Glass wrote:
Hi Robert.
On Tue, Jul 2, 2013 at 11:15 PM, Simon Glass s...@chromium.org wrote:
Hi Robert,
On Jul 2, 2013 8:41 PM, Robert Nelson robertcnel...@gmail.com wrote:
On Tue, Jul 2, 2013 at 2:39 AM, Simon Glass
On Wed, Jul 3, 2013 at 8:52 AM, Simon Glass s...@chromium.org wrote:
Hi Robert.
On Tue, Jul 2, 2013 at 11:15 PM, Simon Glass s...@chromium.org wrote:
Hi Robert,
On Jul 2, 2013 8:41 PM, Robert Nelson robertcnel...@gmail.com wrote:
On Tue, Jul 2, 2013 at 2:39 AM, Simon Glass
The block device expects to see lbaint_t for the blknr parameter. Change
the SCSI read/write functions to suit.
This fixes the following build warnings for coreboot:
cmd_scsi.c: In function ‘scsi_scan’:
cmd_scsi.c:119:30: error: assignment from incompatible pointer type [-Werror]
A recent bootm fix left the error path incomplete. Reinstate this so that
failures in bootm stages are handled properly.
Signed-off-by: Simon Glass s...@chromium.org
---
common/cmd_bootm.c | 4
1 file changed, 4 deletions(-)
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index
On Sun, Jun 30, 2013 at 8:15 PM, Andreas Bießmann
andreas.de...@googlemail.com wrote:
Interfaces exposed by error.h seems not to be used in rsa-sig.c, remove it.
This also fixes an compile error on OS X:
---8---
u-boot/lib/rsa/rsa-sign.c:23:19: error: error.h: No such file or directory
In the recent bootm refactor, the PREP stage was missing in the bootz
command. This causes unpredictable behaviour on platforms which need
this stage to operate correctly (e.g. ARM).
Signed-off-by: Simon Glass s...@chromium.org
---
common/cmd_bootm.c | 3 ++-
1 file changed, 2 insertions(+), 1
With the move of the interrupt code to earlier in the sequence, we
exposed a problem where the interrupts are disabled at each bootm
stage. This is not correct - it should be done only once. Let's disable
interrupts in the LOAD stage. Put the code in a function for clarity.
Also, bootz lost its
Am 03.07.2013 13:25, schrieb Fabio Estevam:
The Generic DT based system is not usual.
Sure. It is based on imx25-pdk.dts minus nand plus uart2 which is used as
debug uart on the system in question.
/dts-v1/;
#include imx25.dtsi
/ {
model = Graf-Syteco zmx25;
compatible =
On Tue, Jul 2, 2013 at 3:37 PM, Andreas Bießmann
andreas.de...@googlemail.com wrote:
Remove non portable usage of REG_NOERROR.
BSD (like OS X) variants of regex.h do not declare REG_NOERROR, even GNU
regex(3) do mention REG_NOERROR, just remove it.
Signed-off-by: Andreas Bießmann
On Wed, Jul 3, 2013 at 11:20 AM, Matthias Weißer weiss...@arcor.de wrote:
Yes. Thanks a lot. But why is that? Can you give me an explanation for that
or point me to the correct documentation?
Does it boot now?
I think you got Generic DT based system because your original entry
fsl,zmx25 is
Hi Dirk,
On Wed, Jun 26, 2013 at 10:55 PM, dirk.eib...@gdsys.cc wrote:
From: Dirk Eibach eib...@gdsys.de
Add support for Atmel TPM devices with two wire interface.
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
Signed-off-by: Reinhard Pfau reinhard.p...@gdsys.cc
Reviewed-by: Simon Glass
On Wed, Jul 3, 2013 at 9:12 AM, Simon Glass s...@chromium.org wrote:
In the recent bootm refactor, the PREP stage was missing in the bootz
command. This causes unpredictable behaviour on platforms which need
this stage to operate correctly (e.g. ARM).
Signed-off-by: Simon Glass
Am 03.07.2013 16:33, schrieb Fabio Estevam:
On Wed, Jul 3, 2013 at 11:20 AM, Matthias Weißer weiss...@arcor.de wrote:
Yes. Thanks a lot. But why is that? Can you give me an explanation for that
or point me to the correct documentation?
Does it boot now?
Yes, it does. And the output changed
Hi,
Thanks for the v2.
On Fri, Jun 28, 2013 at 1:13 PM, Gerlando Falauto
gerlando.fala...@keymile.com wrote:
Since sf update erases the last block as a whole, but only rewrites
the meaningful initial part of it, the rest would be left erased,
potentially erasing meaningful information.
So,
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 7b3e459..5749057 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -1758,6 +1758,10 @@ static int bootz_start(cmd_tbl_t *cmdtp, int
flag, int argc,
int ret;
void *zi_start, *zi_end;
+
On Wed, Jul 3, 2013 at 9:46 AM, Robert Nelson robertcnel...@gmail.com wrote:
On Wed, Jul 3, 2013 at 9:12 AM, Simon Glass s...@chromium.org wrote:
In the recent bootm refactor, the PREP stage was missing in the bootz
command. This causes unpredictable behaviour on platforms which need
this
Hi Macpaul,
For the case CONFIG_FTTMR010_EXT_CLK is not defined:
In reset_timer_masked():
lastdec = readl(tmr-timer3_counter) / (CONFIG_SYS_CLK_FREQ / 2);
In get_timer_masked():
ulong now = readl(tmr-timer3_counter) / (CONFIG_SYS_CLK_FREQ / 2 / 1024);
The code looks strange.
(Why one needs to
T4240 PCIe IP is version 3.0 and has some update comparing previous
QorIQ products.
1. Move Freescale specific register define
to
arch/powerpc/include/asm/fsl_pci.h
and update the register offset define for T4240.
2. add the status/control register define
use status/control register to judge
Hi,
I have a few comments.
I myself not convenient with the capital letters on commit header, IMHO
MMC: dove_sdhci: == mmc: dove_sdhci:
perhaps not much an issue we are taking about.
On Wed, Jun 26, 2013 at 2:57 AM, Sascha Silbe t-ub...@infra-silbe.de wrote:
This adds a driver for the
On Thu, Jun 27, 2013 at 9:25 AM, Jain Priyanka-B32167
b32...@freescale.com wrote:
Thanks for pointing.
Any idea? When it will be merged in u-boot tree.
Please check it on master.
--
Thanks,
Jagan.
Regards
Priyanka
-Original Message-
From: Jagan Teki
Hi,
On 07/03/2013 05:04 PM, Jagan Teki wrote:
Hi,
Thanks for the v2.
On Fri, Jun 28, 2013 at 1:13 PM, Gerlando Falauto
gerlando.fala...@keymile.com wrote:
Since sf update erases the last block as a whole, but only rewrites
the meaningful initial part of it, the rest would be left erased,
On 07/02/2013 02:40 PM, Tom Rini wrote:
On Tue, Jul 02, 2013 at 11:58:51AM -0600, Stephen Warren wrote:
On 07/02/2013 10:28 AM, Tom Rini wrote:
Hey guys,
I'm wondering about something and looking for input. As has
come up a few times now, we have the ability for a single
binary to run on
B4860 and B4420 has PCIe version 2.4 IP instead of 3.x
Signed-off-by: Roy Zang tie-fei.z...@freescale.com
---
arch/powerpc/include/asm/config_mpc85xx.h |1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h
b/arch/powerpc/include/asm/config_mpc85xx.h
This patch adds support for the SMSC9500 with product id 0x9900 which is
equipped in the EXSYS USB 2.0 etherner USB adapter.
Tested on omap3_beagle.
Signed-off-by: Stefan Roese s...@denx.de
---
drivers/usb/eth/smsc95xx.c | 1 +
1 file changed, 1 insertion(+)
diff --git
On 07/03/2013 05:20 AM, Wolfgang Denk wrote:
Dear Jim Lin,
In message 1372847667-31928-1-git-send-email-ji...@nvidia.com you wrote:
TFTP booting is slow when a USB keyboard is installed and
CONFIG_USB_KEYBOARD is defined.
The fix is to change Ctrl-C polling to every second when NET transfer
Since sf update erases the last block as a whole, but only rewrites
the meaningful initial part of it, the rest would be left erased,
potentially erasing meaningful information.
So, as a safety measure, have it rewrite the original content.
Signed-off-by: Gerlando Falauto
make sf update work with unaligned `len' parameter, by deleting the
whole last sector before writing, so to allow for:
sf update ${load_addr_r} 0 ${filesize}
Signed-off-by: Gerlando Falauto gerlando.fala...@keymile.com
Cc: Valentin Longchamp valentin.longch...@keymile.com
Cc: Holger Brunck
Hi,
this patchset allows sf update to erase+write a number of bytes which is not a
multiple of the sector size. Start address must still be sector-aligned though.
The first patch trivially makes it such it will always erase an entire sector
before writing, regardless of the amount of data to
On 07/03/2013 03:38:14 AM, Po Liu wrote:
+ /* TLB 1 */
+ SET_TLB_ENTRY(1, 0xf000, 0xf000,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 0, BOOKE_PAGESZ_4K, 1),
Again, does this ever get used? Could you try removing it and seeing
On Fri, Jun 28, 2013 at 06:41:49PM +0200, ??ukasz Majewski wrote:
In the following commit:
dfu: Support larger than memory transfers.
SHA1: ea2453d56b8860dbd18a3c517531ffc8dcb5c839
The ext4{read|write} command formatting has been changed. It removed
a write mandatory [sizebytes] parameter.
On Fri, Jun 28, 2013 at 06:41:50PM +0200, ??ukasz Majewski wrote:
For the first eMMC read of data for upload, use the large dfu_buf (now
configurable) instead of usb request buffer allocated at composite layer
(which is 4KiB) [*].
For eMMC the whole file is read, which usually is larger
On Tue, Jul 02, 2013 at 08:37:34AM +0200, Andreas Bie??mann wrote:
Latest changes to mkimage, Makefile and added proftool broke compilation on OS
X. This series makes u-boot build clean again with some little adoptions.
Patch 'lib/rsa/rsa-sig.c: compile on OS X' supersedes
On Tue, Jul 02, 2013 at 04:04:59PM +0200, Marek Vasut wrote:
Some more fixes for RC2
The following changes since commit e6bf18dba2a21bebf2c421b1c2e188225f6485a1:
Prepare v2013.07-rc2 (2013-06-28 18:03:51 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-usb.git
On Tue, Jul 02, 2013 at 03:42:47PM +0900, Masahiro Yamada wrote:
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
doc/README.SPL | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/doc/README.SPL b/doc/README.SPL
index 4e1cb28..ac9a213 100644
---
On Thu, Jun 27, 2013 at 10:27:26AM +0200, Albert ARIBAUD wrote:
Hi Stefan,
On Tue, 25 Jun 2013 09:14:12 +0200, Stefan Roese s...@denx.de wrote:
Fix a problem with a re-assignment of r8 in the SPL version.
This patch now moves the call to s_init() to a later stage, right before
Signed-off-by: Tom Rini tr...@ti.com
---
doc/README.falcon |2 ++
1 file changed, 2 insertions(+)
diff --git a/doc/README.falcon b/doc/README.falcon
index 93e855d..6357b1e 100644
--- a/doc/README.falcon
+++ b/doc/README.falcon
@@ -41,6 +41,8 @@ file (CONFIG_CMD_SPL_NAND_OFS for NAND).
3.
Hey all,
The following 2 patches update docs for falcon mode, and am335x_evm. The
first adds a quick general note about how failure is decided in falcon mode
and we drop back to U-Boot. The second adds a README for am335x_evm which
provides examples for eMMC or raw SD cards, FAT SD cards and
- Update Falcon Mode support so that the offsets used in eMMC (or a raw
SD card) would allow for enough room for a device tree to be used
rather than an ATAGS blob as well as environment to be saved in eMMC.
- Add board/ti/am335x/README which covers a few basic items, and
provides an example
Tom == Tom Rini tr...@ti.com writes:
Tom Signed-off-by: Tom Rini tr...@ti.com
Reviewed-by: Peter Korsgaard jac...@sunsite.dk
Tom ---
Tom doc/README.falcon |2 ++
Tom 1 file changed, 2 insertions(+)
Tom diff --git a/doc/README.falcon b/doc/README.falcon
Tom index 93e855d..6357b1e
Tom == Tom Rini tr...@ti.com writes:
Tom - Update Falcon Mode support so that the offsets used in eMMC (or a raw
Tom SD card) would allow for enough room for a device tree to be used
Tom rather than an ATAGS blob as well as environment to be saved in eMMC.
Tom - Add
On 07/02/2013 10:11:49 PM, Josh Wu wrote:
+ if (!get_onfi_ecc_param(chip, cap, sector_size))
+ MTDDEBUG(MTD_DEBUG_LEVEL1, ONFI params,
minimum required ECC: %d bits in %d bytes\n,
+ *cap, *sector_size);
Use braces around multi-line if/loop
On Wed, Jul 03, 2013 at 11:28:36PM +0200, Peter Korsgaard wrote:
Tom == Tom Rini tr...@ti.com writes:
Tom - Update Falcon Mode support so that the offsets used in eMMC (or a raw
Tom SD card) would allow for enough room for a device tree to be used
Tom rather than an ATAGS blob as
Dear Stephen,
In message 51d45f4d.2010...@wwwdotorg.org you wrote:
get_timer() is used by a number of network related services. For
information, just grep for it in the net/ and drivers/net/
directories. The get_timer(0) used in your code resets a global
resource, and has thus the
Dear Tom Rini,
On Fri, Jun 28, 2013 at 06:41:50PM +0200, ??ukasz Majewski wrote:
For the first eMMC read of data for upload, use the large dfu_buf (now
configurable) instead of usb request buffer allocated at composite layer
(which is 4KiB) [*].
For eMMC the whole file is read, which
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index 36b98c8..75dbe26 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -115,7 +115,7 @@
#define EXYNOS5_DMC_PHY0_BASE0x10C0
From: Kuo-Jung Su dant...@faraday-tech.com
1. Update license statement
2. struct ftmac110_regs __iomem *regs - struct ftmac110_regs *regs.
3. Reformat hardware tx/rx descriptor as an uniform one,
and replace uint32_t[2] with uint64_t for descriptor control.
Signed-off-by: Kuo-Jung Su
From: Kuo-Jung Su dant...@faraday-tech.com
Faraday FTLCDC200 Color LCD controller performs translation of
pixel-coded data into the required formats and timings to
drive a variety of single/dual mono and color LCDs.
Depending on the LCD type and mode, the unpacked data can represent:
1. an
From: Kuo-Jung Su dant...@faraday-tech.com
Faraday FTNANDC021 is a integrated NAND flash controller.
It use a build-in command table to abstract the underlying
NAND flash control logic.
For example:
Issuing a command 0x10 to FTNANDC021 would result in
a page write + a read status operation.
From: Kuo-Jung Su dant...@faraday-tech.com
These patches introduce Faraday A36x SoC platform support.
Here are some public documents for your reference.
http://www.faraday-tech.com/html/documentation/index.html
There is also a A369 QEMU emulator available at my github account:
From: Kuo-Jung Su dant...@faraday-tech.com
Even though the MMU/D-cache is off, some DMA engines still
expect strict address alignment.
For example, the incoming Faraday FTMAC110 FTGMAC100 ethernet
controllers expect the tx/rx descriptors should always be aligned
to 16-bytes boundary.
From: Kuo-Jung Su dant...@faraday-tech.com
While the flash_detect_legacy() of drivers/mtd/cfi_flash.c
feed unmap_physmem() with MAP_NOCACHE as 2nd parameter,
the do_spi_flash_read_write() of common/cmd_sf.c
feed unmap_physmem() with the length of the mapped buffer
as 2nd parameter.
It's
From: Kuo-Jung Su dant...@faraday-tech.com
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v6:
- Nothing updates
Changes for v5:
- Coding Style cleanup.
- Now the irq is always enabled inside irq_install_handler().
From: Kuo-Jung Su dant...@faraday-tech.com
This updates the map_physmem()/unmap_physmem(), and use
them to implement dma_alloc_coherent() dma_free_coherent().
It uses 1MB section for each mapping, and thus wastes lots of
address space, however this should still be good enough for
tiny systems
From: Kuo-Jung Su dant...@faraday-tech.com
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v6:
- Nothing updates
Changes for v5:
- Drop IRQ dependant implementation
- Use gd-arch.timer_rate_hz for timer clock source
-
From: Kuo-Jung Su dant...@faraday-tech.com
This adds i/d-cache control, mmu setup bootstrap code
for Faraday cores.
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v6:
- Nothing updates
Changes for v5:
- Initial commit
From: Kuo-Jung Su dant...@faraday-tech.com
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v6:
- Nothing updates
Changes for v5:
- Drop IRQ dependant implementation
- Use gd-arch.timer_rate_hz for timer clock source
-
From: Kuo-Jung Su dant...@faraday-tech.com
This updates ftsdc010_mci.c for latest Faraday clock APIs.
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Albert Aribaud albert.u.b...@aribaud.net
CC: Andy Fleming aflem...@gmail.com
---
Changes for v6:
- Nothing updates
Changes for v5:
From: Kuo-Jung Su dant...@faraday-tech.com
At the time of writting, none of Faraday NAND SPI controllers
supports XIP (eXecute In Place), and the 1st stage bootstrap
stored in embedded ROM is not compatible to U-Boot design.
So this patch is added to support booting from Faraday Images.
TFTP booting is slow when a USB keyboard is installed and
CONFIG_USB_KEYBOARD is defined.
This fix is to change Ctrl-C polling to every second when NET transfer
is running.
Signed-off-by: Jim Lin ji...@nvidia.com
---
Changes in v2:
1. Change configuration name from CONFIG_CTRLC_POLL_MS to
Hi Minkyu Kang,
On Thu, Jul 4, 2013 at 7:31 AM, Minkyu Kang mk7.k...@samsung.com wrote:
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index 36b98c8..75dbe26 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++
On 04/07/13 14:27, Rajeshwari Birje wrote:
Hi Minkyu Kang,
On Thu, Jul 4, 2013 at 7:31 AM, Minkyu Kang mk7.k...@samsung.com wrote:
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index 36b98c8..75dbe26 100644
---
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