Hi Vadim,
On Nov 11, 2013 10:22 PM, "Vadim Bendebury (вб)" wrote:
>
> Gentlemen, I have not forgotten our discussion regarding setting up a
> sample gerrit server for u-boot during the ELCE mini-summit. Sorry
> for this long and not very clear email, if there is any interest I
> will be glad to
Hello.
I could not understand where tools/imls/Makefile is invoked from.
(I grepped the top Makefile with "imls" but no hit.)
So, I treaked as follows to add imls entry point:
--- a/Makefile
+++ b/Makefile
@@ -773,7 +773,7 @@ $(TIMESTAMP_FILE):
@LC_ALL=C date +'#define U_
Hello all.
Anybody knows if tools/updater is used?
I tried "make updater" but I got following error.
gcc -M -g -Os -D__KERNEL__ -DCONFIG_SYS_TEXT_BASE=0
-I/home/yamada/workspace/arm-linux-pf/u-boot/include
-I/home/yamada/workspace/arm-linux-pf/u-boot/arch/sandbox/include -fno-builtin
-ff
Hi Massihiro,
On Mon, Nov 11, 2013 at 6:22 PM, Masahiro Yamada
wrote:
> Hello Albert, Simon.
>
> > Sometimes a commit should have notes enclosed with it rather
> > than withing the cover letter -- possibly even because there
> > is no cover letter. Add 'Series-commit-notes' tag, similar to
> > 'S
Hello Albert, Simon.
> Sometimes a commit should have notes enclosed with it rather
> than withing the cover letter -- possibly even because there
> is no cover letter. Add 'Series-commit-notes' tag, similar to
> 'Series-notes'; lines between this tag and the next END line
> are inserted in the pa
You said you used the exactly same register for CodeWarrior and U-boot.
CodeWarrior works but U-boot doesn't? You can try two methods to debug.
1) Build a RAMBOOT u-boot, use CodeWarrior to initialize DDR and copy
u-boot to its destination and start to run.
2) Let u-boot initialize DDR, make a in
2013/11/11 Gabor Juhos :
> 2013.11.11. 20:36 keltezéssel, Daniel Schwierzeck írta:
>> 2013/11/11 Gabor Juhos :
>>> The relocation code uses the CONFIG_SYS_MONITOR_BASE
>>> constant for calculating the reserved memory size and
>>> relocation offset values. Along with these predefined
>>> values the
On Mon, Nov 11, 2013 at 08:12:19PM +0100, Wolfgang Denk wrote:
> The MPC824x processors have long reached EOL, and the PN62 board has
> not seen any board-specific updates for more than a decade. It is now
> causing build issues. Instead of wasting time on things nobody is
> interested in any mo
On Mon, Nov 11, 2013 at 08:26:02PM +0100, Pavel Machek wrote:
> Altera Cyclone 5 board is very different board (big, rectangular,
> expensive) than EBV Socrates (small, circular, cheap) board. Different
> parts are used there, too, but same configuration of u-boot works on
> both. Nevertheless, pr
Hi Pavel,
On Mon, 2013-11-11 at 20:26 +0100, ZY - pavel wrote:
> Altera Cyclone 5 board is very different board (big, rectangular,
> expensive) than EBV Socrates (small, circular, cheap) board. Different
> parts are used there, too, but same configuration of u-boot works on
> both. Nevertheless, p
2013.11.11. 20:36 keltezéssel, Daniel Schwierzeck írta:
> 2013/11/11 Gabor Juhos :
>> The relocation code uses the CONFIG_SYS_MONITOR_BASE
>> constant for calculating the reserved memory size and
>> relocation offset values. Along with these predefined
>> values the code also uses several other con
On Mon, 2013-11-11 at 12:15 -0800, York Sun wrote:
> On 11/11/2013 11:59 AM, Scott Wood wrote:
> > On Mon, 2013-11-11 at 11:37 -0800, York Sun wrote:
> >> On 11/11/2013 11:35 AM, Scott Wood wrote:
> >>> On Mon, 2013-11-11 at 11:05 -0800, York Sun wrote:
> On 11/11/2013 10:49 AM, Scott Wood wro
On 11/11/2013 11:59 AM, Scott Wood wrote:
> On Mon, 2013-11-11 at 11:37 -0800, York Sun wrote:
>> On 11/11/2013 11:35 AM, Scott Wood wrote:
>>> On Mon, 2013-11-11 at 11:05 -0800, York Sun wrote:
On 11/11/2013 10:49 AM, Scott Wood wrote:
> My point is that the type of DDR that is present is
On Mon, 2013-11-11 at 11:37 -0800, York Sun wrote:
> On 11/11/2013 11:35 AM, Scott Wood wrote:
> > On Mon, 2013-11-11 at 11:05 -0800, York Sun wrote:
> >> On 11/11/2013 10:49 AM, Scott Wood wrote:
> >>> My point is that the type of DDR that is present is hardware
> >>> description, just as much as
On 11/11/2013 11:35 AM, Scott Wood wrote:
> On Mon, 2013-11-11 at 11:05 -0800, York Sun wrote:
>> On 11/11/2013 10:49 AM, Scott Wood wrote:
>>> My point is that the type of DDR that is present is hardware
>>> description, just as much as the type of DDR controller. "User config"
>>> means things u
Hello all,
On 11/11/2013 12:18 PM, Eric Nelson wrote:
>
As mentioned in my original e-mail, I wanted to get some feedback
about the most important questions:
1. Whether to turn declarations in mx6q_pins.h/mx6dl_pins.h into macros
2. Whether to double-include the same in mx6-pins.h
3. Wheth
2013/11/11 Gabor Juhos :
> The relocation code uses the CONFIG_SYS_MONITOR_BASE
> constant for calculating the reserved memory size and
> relocation offset values. Along with these predefined
> values the code also uses several other constants which
> are computed by the linker from the CONFIG_SYS_
On Mon, 2013-11-11 at 11:05 -0800, York Sun wrote:
> On 11/11/2013 10:49 AM, Scott Wood wrote:
> > My point is that the type of DDR that is present is hardware
> > description, just as much as the type of DDR controller. "User config"
> > means things users can choose purely in software, without a
Altera Cyclone 5 board is very different board (big, rectangular,
expensive) than EBV Socrates (small, circular, cheap) board. Different
parts are used there, too, but same configuration of u-boot works on
both. Nevertheless, printing wrong name confuses users.
Therefore this splits the configura
Hi all,
On 11/11/2013 11:42 AM, Eric Nelson wrote:
On 11/11/2013 08:12 AM, Eric Nelson wrote:
On 11/11/2013 05:03 AM, Tapani wrote:
On Sat, 9 Nov 2013 13:12:42 -0700
Eric Nelson wrote:
...
The following is a diff with some updates, and I've attached a complete
updated version.
Can you te
2013/11/11 Gabor Juhos :
> The relocation code uses the CONFIG_SYS_MONITOR_BASE
> constant for calculating the reserved memory size and
> relocation offset values. Along with these predefined
> values the code also uses several other constants which
> are computed by the linker from the CONFIG_SYS_
On Sat, Nov 09, 2013 at 12:30:14AM +0100, Daniel Schwierzeck wrote:
> Commit 8dfafdde88eb3e71d5569846396ae67a91017232 introduced
> new gcc warnings on MIPS64:
>
> time.c: In function 'tick_to_time':
> time.c:59:2: warning: comparison of distinct pointer types lacks a cast
> [enabled by default]
On Sat, Nov 09, 2013 at 09:53:23PM +0100, Daniel Schwierzeck wrote:
> Hi Tom,
>
> The following changes since commit 15c5cdf5aa6b292145e5e3e220ec1f42b11eff6f:
>
> Merge branch 'master' of git://www.denx.de/git/u-boot-usb
> (2013-11-08 15:25:29 -0500)
>
> are available in the git repository at
On Sat, Nov 09, 2013 at 11:53:22PM +0100, Albert ARIBAUD wrote:
> Hi Tom,
>
> The following changes since commit
> 15c5cdf5aa6b292145e5e3e220ec1f42b11eff6f:
>
> Merge branch 'master' of git://www.denx.de/git/u-boot-usb (2013-11-08
> 15:25:29 -0500)
>
> are available in the git repository at
The MPC824x processors have long reached EOL, and the PN62 board has
not seen any board-specific updates for more than a decade. It is now
causing build issues. Instead of wasting time on things nobody is
interested in any more, we rather drop this board.
Signed-off-by: Wolfgang Denk
Cc: Wolfga
On Mon, Nov 11, 2013 at 08:00:01PM +0100, Daniel Schwierzeck wrote:
> 2013/11/11 Tom Rini :
> > On Sat, Nov 09, 2013 at 09:53:23PM +0100, Daniel Schwierzeck wrote:
> >
> >> Hi Tom,
> >>
> >> The following changes since commit
> >> 15c5cdf5aa6b292145e5e3e220ec1f42b11eff6f:
> >>
> >> Merge branch
On 11/11/2013 10:49 AM, Scott Wood wrote:
> On Fri, 2013-11-08 at 20:25 -0600, sun york-R58495 wrote:
>> On Nov 8, 2013, at 4:48 PM, Scott Wood wrote:
>>
>>> On Wed, 2013-10-30 at 19:07 -0700, York Sun wrote:
+ CONFIG_SYS_FSL_DDR
+ Freescale DDR driver in use. This
The relocation code uses the CONFIG_SYS_MONITOR_BASE
constant for calculating the reserved memory size and
relocation offset values. Along with these predefined
values the code also uses several other constants which
are computed by the linker from the CONFIG_SYS_TEXT_BASE
value. Due to this, the r
2013/11/11 Tom Rini :
> On Sat, Nov 09, 2013 at 09:53:23PM +0100, Daniel Schwierzeck wrote:
>
>> Hi Tom,
>>
>> The following changes since commit 15c5cdf5aa6b292145e5e3e220ec1f42b11eff6f:
>>
>> Merge branch 'master' of git://www.denx.de/git/u-boot-usb
>> (2013-11-08 15:25:29 -0500)
>>
>> are avai
2013.11.11. 15:22 keltezéssel, Paul Burton írta:
<...>
>> diff --git a/arch/mips/include/asm/malta.h b/arch/mips/include/asm/malta.h
>> index 9b1100b..bd9043d 100644
>> --- a/arch/mips/include/asm/malta.h
>> +++ b/arch/mips/include/asm/malta.h
>> @@ -44,7 +44,7 @@
>> #define MALTA_RESET_BASE
On Fri, 2013-11-08 at 20:25 -0600, sun york-R58495 wrote:
> On Nov 8, 2013, at 4:48 PM, Scott Wood wrote:
>
> > On Wed, 2013-10-30 at 19:07 -0700, York Sun wrote:
> >>
> >> + CONFIG_SYS_FSL_DDR
> >> + Freescale DDR driver in use. This type of DDR controller is
> >> + fo
Hello Giuseppe,
On Mon, Nov 11, 2013 at 3:11 PM, Giuseppe Pagano
wrote:
> Adds SATA support on uDoo Board.
> Moves sata_setup function definition from nitrogen6x.c and udoo.c to
> arch/arm/imx-common/sata.c to avoid code duplication.
>
> Signed-off-by: Giuseppe Pagano
Your patches should have
On 11/11/2013 08:12 AM, Eric Nelson wrote:
Thanks Tapani,
On 11/11/2013 05:03 AM, Tapani wrote:
>>
We have suggested an alternative solution, but somehow nobody seem
to notice. We avoid almost all the preprocessor messing, and have the
definitions only once. And it would scale for even mor
On Sat, Nov 09, 2013 at 09:53:23PM +0100, Daniel Schwierzeck wrote:
> Hi Tom,
>
> The following changes since commit 15c5cdf5aa6b292145e5e3e220ec1f42b11eff6f:
>
> Merge branch 'master' of git://www.denx.de/git/u-boot-usb
> (2013-11-08 15:25:29 -0500)
>
> are available in the git repository at
Adds SATA support on uDoo Board.
Moves sata_setup function definition from nitrogen6x.c and udoo.c to
arch/arm/imx-common/sata.c to avoid code duplication.
Signed-off-by: Giuseppe Pagano
CC: Stefano Babic
CC: Fabio Estevam
CC: Eric Nelson
---
arch/arm/imx-common/Makefile |1 +
uDoo uses APX823-31W5 watchdog chip. Timeout is about 1.2 seconds.
To disabled watchdog during kernel boot, WDI pin of that chip needs to be in
"high impedance" state.
I.mx6 gpio configuration does not contemplate tristate, so pin is set as input
in high impedance.
Signed-off-by: Giuseppe Pagano
Add Ethernet and networking support on uDoo board (FEC + phy Micrel KSZ9031).
Signed-off-by: Giuseppe Pagano
CC: Stefano Babic
CC: Fabio Estevam
---
board/udoo/udoo.c | 140
include/configs/udoo.h | 16 ++
include/micrel.h |
Previous uDoo configuration adopts register settings for DDR3, clock, muxing,
etc. taken from Nitrogen6x. uDoo schematics is rather different from that
board, and it needs customized setting for most of the registers.
All this changes can be considered atomical since it is part of initial suppor
On 11/09/2013 03:07 AM, Anatolij Gustschin wrote:
> From: Andre Heider
>
> Depending on the firmware's video options [1] the active SDTV or
> HDTV mode can yield a framebuffer with noncontiguous horizontal lines,
> giving a messed up display, for both, u-boot and the loaded kernel.
>
> Fix this
Hi
+Cc Sinan
> Make indirect vectors addresses global, so they can be replaced by
> various code that needs to do so. For example the MX6 PCI express
> driver needs to temporarily replace data abort handler when reading
> the config space.
>
> Signed-off-by: Marek Vasut
> Cc: Albert Aribaud
>
Add PCIe driver for the Freescale i.MX6 SoC . This driver operates the
PCIe block in RC mode only, the EP mode is NOT supported. The driver is
tested with the Intel e1000 NIC driver.
Signed-off-by: Marek Vasut
Cc: Albert Aribaud
Cc: Fabio Estevam
Cc: Stefano Babic
---
arch/arm/include/asm/arc
Split the SATA clock enabling function and add PCI express clock
enabling function. The SATA clock enabling function starts up the
100MHz SATA reference PLL in ENET_PLL register, but the code can
be re-used to enable the 125MHz PCIe reference in ENET_PLL, so pull
this code into separate function. M
Enable PCI express on MX6 Sabrelite.
Signed-off-by: Marek Vasut
Cc: Albert Aribaud
Cc: Eric Nelson
Cc: Fabio Estevam
Cc: Stefano Babic
---
board/boundary/nitrogen6x/nitrogen6x.c | 7 ++-
include/configs/nitrogen6x.h | 11 +++
2 files changed, 17 insertions(+), 1 deleti
Make indirect vectors addresses global, so they can be replaced by
various code that needs to do so. For example the MX6 PCI express
driver needs to temporarily replace data abort handler when reading
the config space.
Signed-off-by: Marek Vasut
Cc: Albert Aribaud
Cc: Stefano Babic
---
arch/ar
Add cpu_clock_teardown() call before the Linux kernel is started,
so the CPU code can stop clock that may hinder the Linux's boot.
Signed-off-by: Marek Vasut
Cc: Albert Aribaud
Cc: Stefano Babic
---
arch/arm/cpu/armv7/cpu.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/cpu/a
Hi Nikita,
On 11-Nov-13 13:15, Nikita Kiryanov wrote:
On 11/08/2013 11:26 PM, Lubomir Popov wrote:
Hi Nikita,
On 11/06/2013 03:19 PM, Lubomir Popov wrote:
On 06-Nov-13 14:12, Nikita Kiryanov wrote:
In drivers/i2c/omap24xx_i2c.c there are a few checks that attempt to
detect unconfigured pads
Thanks Tapani,
On 11/11/2013 05:03 AM, Tapani wrote:
Eric,
this documentation is a very good initiative. In overall I agree with what you
have sketched, and it in many ways what we have demonstrated working in
practice.
Yeah. You've already gone through two patch submissions and Troy went
t
On Sun, Nov 10, 2013 at 06:52:08PM +0100, Gerhard Sittig wrote:
> On Sat, Nov 09, 2013 at 14:50 -0500, Tom Rini wrote:
> >
> > On Sat, Nov 09, 2013 at 06:49:01PM +0100, Albert ARIBAUD wrote:
> > >
> > > Which 'not-a-diff-exactly' do you mean?
> >
> > Well, for example 'git show c0bb110' shows ho
Add platform glue logic for the SATA controller.
Signed-off-by: Roger Quadros
---
arch/arm/cpu/armv7/omap-common/Makefile | 1 +
arch/arm/cpu/armv7/omap-common/sata.c | 75 +
arch/arm/include/asm/arch-omap5/sata.h | 48 +
3 files changed, 1
Adds the necessary PRCM and Control register information for
SATA on DRA7xx.
Signed-off-by: Roger Quadros
---
arch/arm/cpu/armv7/omap5/prcm-regs.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c
b/arch/arm/cpu/armv7/omap5/prcm-regs.c
index 5c60d74..77
The evm has a SATA port. Enable SATA configuration and
inititialize the SATA controller.
Signed-off-by: Roger Quadros
---
board/ti/dra7xx/evm.c| 7 +++
include/configs/dra7xx_evm.h | 11 +++
2 files changed, 18 insertions(+)
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra
Adds the necessary PRCM and Control register information for
SATA on OMAP5.
Signed-off-by: Roger Quadros
---
arch/arm/cpu/armv7/omap5/prcm-regs.c| 4
arch/arm/include/asm/arch-omap5/clock.h | 3 +++
arch/arm/include/asm/arch-omap5/omap.h | 3 +++
arch/arm/include/asm/omap_common.h
The uevm has a SATA port. Inititialize the SATA controller.
Signed-off-by: Roger Quadros
---
board/ti/omap5_uevm/evm.c| 7 +++
include/configs/omap5_uevm.h | 10 ++
2 files changed, 17 insertions(+)
diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c
index bb3a69
Align the ATA ID buffer to the cache-line boundary. This gets rid
of the below error mesages on ARM v7 platforms.
scanning bus for devices...
ERROR: v7_dcache_inval_range - start address is not aligned - 0xfee48618
ERROR: v7_dcache_inval_range - stop address is not aligned - 0xfee48818
CC: Ane
If malloc() fails, we don't want to continue in ahci_init() and
ahci_init_one(). Also print a more informative error message on
malloc() failures.
CC: Rob Herring
Signed-off-by: Roger Quadros
---
drivers/block/ahci.c | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff
Hi,
This series adds SATA support for OMAP5 uevm and DRA7 evm.
Patches are also availabe at
g...@github.com:rogerq/u-boot.git sata
v3:
- get rid of custom perror() macro, use printf
- Fixed coding sytle issues
v2:
- Address review comments in the RFC series
- Fix cache align error in the
Pipe3 PHY is used by SATA, USB3 and PCIe modules. This is
a driver for the Pipe3 PHY.
Signed-off-by: Roger Quadros
---
arch/arm/cpu/armv7/omap-common/Makefile| 4 +
arch/arm/cpu/armv7/omap-common/pipe3-phy.c | 231 +
arch/arm/cpu/armv7/omap-common/pipe3-phy.h |
On 11/11/13 14:05, Gabor Juhos wrote:
The physical base address of the NOR flash is 0x1e00
on the Malta boards. The hardware also maps the first 4MiB
of the flash into the 0x1fc0-0x1fff range.
Currently, U-Boot uses the mapped address to access the
flash, which does not work in recen
The physical base address of the NOR flash is 0x1e00
on the Malta boards. The hardware also maps the first 4MiB
of the flash into the 0x1fc0-0x1fff range.
Currently, U-Boot uses the mapped address to access the
flash, which does not work in recent qemu versions.
Since commit a427338b2
2013.11.11. 12:14 keltezéssel, Paul Burton írta:
<...>
> Aha, thanks for tracking that down. I guess if flash commands need to work at
> 0x1fc0
I assume that it is working on a real Malta board, so it should be emulated
correctly if possible.
> then my QEMU patch fixed one bug but causes a
Dear Paul Burton,
> On 11/11/13 13:33, Marek Vasut wrote:
> > Dear Paul Burton,
> >
> >> On 10/11/13 20:09, Marek Vasut wrote:
> >>> Dear Paul Burton,
> >>>
> Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will
> be left disabled. Linux does not set up this routing b
On 11/11/13 13:33, Marek Vasut wrote:
Dear Paul Burton,
On 10/11/13 20:09, Marek Vasut wrote:
Dear Paul Burton,
Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will
be left disabled. Linux does not set up this routing but relies upon it
having been set up by the bootloader,
On Mon, Nov 11, 2013 at 03:31:14PM +0200, Roger Quadros wrote:
> Hi,
>
> This series adds SATA support for OMAP5 uevm and DRA7 evm.
>
> Patches are also availabe at
> g...@github.com:rogerq/u-boot.gitsata
>
> v2:
> - Address review comments in the RFC series
> - Fix cache align error in th
On 11/11/2013 03:52 PM, Tom Rini wrote:
> On Thu, Nov 07, 2013 at 02:23:32PM +0200, Roger Quadros wrote:
>> On 11/06/2013 11:48 PM, Tom Rini wrote:
>>> -BEGIN PGP SIGNED MESSAGE-
>>> Hash: SHA1
>>>
>>> On 11/06/2013 09:47 AM, Roger Quadros wrote:
Pipe3 PHY is used by SATA, USB3 and PCI
On 11/11/2013 03:56 PM, Tom Rini wrote:
> On Mon, Nov 11, 2013 at 03:31:16PM +0200, Roger Quadros wrote:
>> Align the ATA ID buffer to the cache-line boundary. This gets rid
>> of the below error mesages on ARM v7 platforms.
>>
>> scanning bus for devices...
>> ERROR: v7_dcache_inval_range - star
On Mon, Nov 11, 2013 at 03:31:16PM +0200, Roger Quadros wrote:
> Align the ATA ID buffer to the cache-line boundary. This gets rid
> of the below error mesages on ARM v7 platforms.
>
> scanning bus for devices...
> ERROR: v7_dcache_inval_range - start address is not aligned - 0xfee48618
> ERROR
On Thu, Nov 07, 2013 at 02:23:32PM +0200, Roger Quadros wrote:
> On 11/06/2013 11:48 PM, Tom Rini wrote:
> > -BEGIN PGP SIGNED MESSAGE-
> > Hash: SHA1
> >
> > On 11/06/2013 09:47 AM, Roger Quadros wrote:
> >> Pipe3 PHY is used by SATA, USB3 and PCIe modules. This is
> >> a driver for the P
Dear Paul Burton,
> On 10/11/13 20:08, Marek Vasut wrote:
> > Dear Paul Burton,
> >
> >> Displaying a message on the LCD screen is a simple yet effective way to
> >> show the user that the board has booted successfully.
> >>
> >> Signed-off-by: Paul Burton
> >> ---
> >>
> >> Changes in v3:
> >
Dear Paul Burton,
> On 10/11/13 20:09, Marek Vasut wrote:
> > Dear Paul Burton,
> >
> >> Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will
> >> be left disabled. Linux does not set up this routing but relies upon it
> >> having been set up by the bootloader, reading back the
Dear Paul Burton,
> On 10/11/13 20:02, Marek Vasut wrote:
> > Dear Paul Burton,
> >
> >> On relatively slow boards (such as the MIPS Malta with an FPGA core
> >> card) it can be extremely common for transmits to underflow - to the
> >> point where it appears they simply do not work at all. Settin
Dear Paul Burton,
> Grepping all I found was board/mpl/common/isa.c which seems to do
> something similar. However calling this a driver is quite generous - all
> it does it write some board-specific values to some registers. So
> there's really not much to be shared.
Thanks for clearing this. So
Dear Paul Burton,
> On 10/11/13 20:05, Marek Vasut wrote:
> > Dear Paul Burton,
> >
> >> This is in preparation for adapting this board to function correctly on
> >> a physical MIPS Malta board. The board is moved into an "imgtec" vendor
> >> directory at the same time in order to ready us for an
Dear Bo Shen,
> Hi Heiko,
>
> On 11/11/2013 02:46 PM, Heiko Schocher wrote:
> > Hello Lukasz,
> >
> > Am 08.11.2013 16:41, schrieb Lukasz Majewski:
> >> Hi Bo,
> >>
> >>> Nowhere pass a value to len, which always 0, make no transfer which
> >>> cause uploading failed.
> >>>
> >>> This patch ma
Adds the necessary PRCM and Control register information for
SATA on DRA7xx.
Signed-off-by: Roger Quadros
---
arch/arm/cpu/armv7/omap5/prcm-regs.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c
b/arch/arm/cpu/armv7/omap5/prcm-regs.c
index 5c60d74..77
The evm has a SATA port. Enable SATA configuration and
inititialize the SATA controller.
Signed-off-by: Roger Quadros
---
board/ti/dra7xx/evm.c| 7 +++
include/configs/dra7xx_evm.h | 11 +++
2 files changed, 18 insertions(+)
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra
Add platform glue logic for the SATA controller.
Signed-off-by: Roger Quadros
---
arch/arm/cpu/armv7/omap-common/Makefile | 1 +
arch/arm/cpu/armv7/omap-common/sata.c | 75 +
arch/arm/include/asm/arch-omap5/sata.h | 48 +
3 files changed, 1
Adds the necessary PRCM and Control register information for
SATA on OMAP5.
Signed-off-by: Roger Quadros
---
arch/arm/cpu/armv7/omap5/prcm-regs.c| 4
arch/arm/include/asm/arch-omap5/clock.h | 3 +++
arch/arm/include/asm/arch-omap5/omap.h | 3 +++
arch/arm/include/asm/omap_common.h
The uevm has a SATA port. Inititialize the SATA controller.
Signed-off-by: Roger Quadros
---
board/ti/omap5_uevm/evm.c| 7 +++
include/configs/omap5_uevm.h | 10 ++
2 files changed, 17 insertions(+)
diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c
index bb3a69
Pipe3 PHY is used by SATA, USB3 and PCIe modules. This is
a driver for the Pipe3 PHY.
Signed-off-by: Roger Quadros
---
arch/arm/cpu/armv7/omap-common/Makefile| 4 +
arch/arm/cpu/armv7/omap-common/pipe3-phy.c | 233 +
arch/arm/cpu/armv7/omap-common/pipe3-phy.h |
Align the ATA ID buffer to the cache-line boundary. This gets rid
of the below error mesages on ARM v7 platforms.
scanning bus for devices...
ERROR: v7_dcache_inval_range - start address is not aligned - 0xfee48618
ERROR: v7_dcache_inval_range - stop address is not aligned - 0xfee48818
CC: Ane
Hi,
This series adds SATA support for OMAP5 uevm and DRA7 evm.
Patches are also availabe at
g...@github.com:rogerq/u-boot.git sata
v2:
- Address review comments in the RFC series
- Fix cache align error in the ahci driver
- Added dra7 support
cheers,
-roger
Roger Quadros (8):
ahci: Err
If malloc() fails, we don't want to continue in ahci_init() and
ahci_init_one(). Also print a more informative error message on
malloc() failures.
CC: Rob Herring
Signed-off-by: Roger Quadros
---
drivers/block/ahci.c | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff
Aneesh,
On 11/07/2013 07:15 PM, V, Aneesh wrote:
> Hi Roger,
>
>> -Original Message-
>> From: Quadros, Roger
>> Sent: Thursday, November 07, 2013 2:45 AM
>> To: Enric Balletbo Serra
>> Cc: u-boot@lists.denx.de; Rini, Tom; Krishnamoorthy, Balaji T;
>> rob.herr...@calxeda.com; V, Aneesh
>>
Hi David,
On Mon, Oct 14, 2013 at 9:34 PM, wrote:
> From: David Feng
>
> Relocation code based on a patch by Scott Wood, which is:
> Signed-off-by: Scott Wood
>
> Signed-off-by: David Feng
> ---
> arch/arm/config.mk |3 +-
> arch/arm/cpu/armv8/Makefile |
Hi All,
This patch is based on:
[U-Boot] [PATCH 00/10 V6] EXYNOS5420: Add SMDK5420 board support
--
Regards,
Rajeshwari Shinde
On Mon, Nov 11, 2013 at 6:23 PM, Rajeshwari S Shinde
wrote:
> This patch implements generic api for exynos5250 and exynos5420.
> These api's set and get clock rate ba
This patch implements generic api for exynos5250 and exynos5420.
These api's set and get clock rate based on the peripheral id.
Signed-off-by: Andrew Bresticker
Signed-off-by: Rajeshwari S Shinde
---
arch/arm/cpu/armv7/exynos/clock.c | 958 -
arch/arm/includ
On Sun, Nov 10, 2013 at 11:39 PM, Masahiro Yamada
wrote:
> Hello Albert.
>
>> I have posted a patch to allow adding notes below the '---' line, if
>> this is what you mean. So far, there was no comment on it. See:
>>
>> http://patchwork.ozlabs.org/patch/283057/
>
> Yeah!
> This is the function exa
On Mon, Nov 11, 2013 at 4:44 AM, Masahiro Yamada
wrote:
> Hello Simon
>
>> > I want Cc: tag not to be touched by patman.
>>
>> Maybe we could add a new Patch-Cc: tag for this purpose?
>
> Good.
>
> Cc: patman does nothing. (git send-email can cc patches)
> Patch-cc: patman cc patches and deletes t
Eric,
this documentation is a very good initiative. In overall I agree with what you
have sketched, and it in many ways what we have demonstrated working in
practice.
There are a few question marks I have around your suggestion. Mainly around how
the pinmuxing is suggested to be done.
See the
2013/11/11 Paul Burton :
> This patch replaces the GPL-2.0 text with a GPL-2.0
> SPDX-License-Identifier tag, and adds Imagination Technologies copyright
> following my recent changes.
>
> Signed-off-by: Paul Burton
> ---
> arch/mips/include/asm/malta.h | 5 ++---
> 1 file changed, 2 insertions(+
On 11/9/2013 6:30 AM, Scott Wood wrote:
On Sat, 2013-11-09 at 06:22 +0530, Prabhakar Kushwaha wrote:
On 11/9/2013 6:14 AM, Scott Wood wrote:
On Thu, 2013-10-31 at 08:57 +0530, Prabhakar Kushwaha wrote:
On 10/31/2013 7:37 AM, York Sun wrote:
Freescale IFC controller has been used for mpc8xxx.
On 11/08/2013 11:26 PM, Lubomir Popov wrote:
Hi Nikita,
On 11/06/2013 03:19 PM, Lubomir Popov wrote:
On 06-Nov-13 14:12, Nikita Kiryanov wrote:
In drivers/i2c/omap24xx_i2c.c there are a few checks that attempt to
detect unconfigured pads for the i2c bus in use. These checks are
all in the for
On 11/11/13 10:25, Gabor Juhos wrote:
2013.11.11. 10:52 keltezéssel, Daniel Schwierzeck írta:
2013/11/10 Alon Bar-Lev :
Hello,
master is: 15c5cdf from Fri Nov 8 15:25:29 2013 -0500
u-boot-2013.10
Working in qemu-1.5.3.
Does not work in qemu-1.6.1.
The command prompt is not displayed, 100% cp
Dear Mateusz Kulikowski,
On 11/02/2013 12:19 AM, Mateusz Kulikowski wrote:
> Add support for USB-A9263 board manufactured by Calao Systems
> (http://www.calao-systems.com/).
> Code is based on old U-Boot sources (2010.09) released by Calao and
> existing AT92SAM9263-EK code.
>
> Signed-off-by: Ma
This patch replaces the GPL-2.0 text with a GPL-2.0
SPDX-License-Identifier tag, and adds Imagination Technologies copyright
following my recent changes.
Signed-off-by: Paul Burton
---
arch/mips/include/asm/malta.h | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/mip
On 10/11/13 20:09, Marek Vasut wrote:
Dear Paul Burton,
Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will
be left disabled. Linux does not set up this routing but relies upon it
having been set up by the bootloader, reading back the IRQ lines which
the PIRQ[A:D] signals hav
2013/11/11 Paul Burton :
>
>
> On 10/11/13 20:07, Marek Vasut wrote:
>>
>> Dear Paul Burton,
>>
>>> This patch adds support for running on Malta boards using coreFPGA6
>>> core cards, including support for the msc01 system controller used
>>> with them. The system controller is detected at runtime
On 10/11/13 20:08, Marek Vasut wrote:
Dear Paul Burton,
Displaying a message on the LCD screen is a simple yet effective way to
show the user that the board has booted successfully.
Signed-off-by: Paul Burton
---
Changes in v3:
- rebase atop master
Changes in v2:
- rebased after malta
On Mon, Nov 11, 2013 at 12:25 PM, Gabor Juhos wrote:
>
> 2013.11.11. 10:52 keltezéssel, Daniel Schwierzeck írta:
> > 2013/11/10 Alon Bar-Lev :
> >> Hello,
> >>
> >> master is: 15c5cdf from Fri Nov 8 15:25:29 2013 -0500
> >> u-boot-2013.10
> >>
> >> Working in qemu-1.5.3.
> >> Does not work in qemu
On 10/11/13 20:07, Marek Vasut wrote:
Dear Paul Burton,
This patch adds support for running on Malta boards using coreFPGA6
core cards, including support for the msc01 system controller used
with them. The system controller is detected at runtime allowing one
U-boot binary to run on a Malta w
1 - 100 of 111 matches
Mail list logo
