Hi Eric,
On 03/12/2013 02:05, Eric Nelson wrote:
I think I already had this patch. I tested with these
patches against Stefano's master branch:
0001-ARM-mx6-Update-non-Freescale-boards-to-include-CPU-e.patch
0002-ARM-armv7-Make-indirect-vector-addresses-globl.patch
On 11/30/2013 10:20 AM, Ian Campbell wrote:
On Tue, 2013-11-26 at 15:20 +0100, Andre Przywara wrote:
Commit v2013.10-189-gb3a7f22 breaks u-boot on the VExpress TC2, since
the hardcoded value for SP804 timer address is wrong on Versatile
Express boards using the extended memory map.
Replace this
Hi Jaehoon,
The int type is right.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
---
arch/arm/include/asm/arch-exynos/mmc.h |2 +-
arch/arm/include/asm/arch-s5pc1xx/mmc.h |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git
Hi Lokesh,
On 03/12/13 06:02, Lokesh Vutla wrote:
Hi Lubomir,
On Monday 02 December 2013 09:17 PM, Lubomir Popov wrote:
Hi Nikita,
On 28/11/13 18:04, Nikita Kiryanov wrote:
Writing zero into I2Ci.I2C_CNT register causes random I2C failures in OMAP3
based devices. This seems to be related to
Hello everyone,
(cc Simon Glass)
I just tried to make the documentation for uboot with the following
command (checked out latest mainline sources);
make htmldocs
cc tools/kernel-doc/docproc.c -o tools/kernel-doc/docproc
make U_BOOT_VERSION=2014.01-rc1 -C doc/DocBook/ htmldocs
make[1]:
Hi Eric,
Hi Marek,
On 11/29/2013 05:06 PM, Marek Vasut wrote:
Dear Stefano Babic,
Hi Eric, Marek,
On 27/11/2013 17:19, Eric Nelson wrote:
It seems to lock up the system if you don't have the proper
device connected.
Without this bit, I was able to confirm proper
Dear Stefano Babic,
Hi Eric,
On 03/12/2013 02:05, Eric Nelson wrote:
I think I already had this patch. I tested with these
patches against Stefano's master branch:
0001-ARM-mx6-Update-non-Freescale-boards-to-include-CPU-e.patch
Hi, chander:
Does the mainline u-boot code support exynos 5420 Arndale Octa Board?
Exynos 5420 supports big.little tech.
Best wishes,
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-Original Message-
From: FengHua [mailto:feng...@phytium.com.cn]
Sent: Sunday, December 01, 2013 7:48 PM
To: Sharma Bhupesh-B45370
Cc: 'Bhupesh SHARMA'; 'u-boot@lists.denx.de'; 'tr...@ti.com'; Wood Scott-
B07421
Subject: Re: RE: Re: [U-Boot] [PATCH v15 07/10] arm64: core support
Hi Marek,
On 03/12/2013 10:12, Marek Vasut wrote:
Thanks for testing. I will let the patchset on -next until your
feedback. If boards can boot flawlessly, I will merge it into -master.
Will this still make it for 2014.01 please?
If boards can anyway boot, yes.
Regards,
Stefano
--
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
tools/.gitignore | 1 -
1 file changed, 1 deletion(-)
diff --git a/tools/.gitignore b/tools/.gitignore
index a7fee26..6e2c4ba 100644
--- a/tools/.gitignore
+++ b/tools/.gitignore
@@ -8,7 +8,6 @@
/mpc86x_clk
/mxsboot
/ncb
-/ncp
Hello,
On 12/03/2013 01:35 AM, Minkyu Kang wrote:
On 02/12/13 21:54, Przemyslaw Marczak wrote:
Changes:
- define function usb_cable_connected() in trats board file
which returns 1 if cable is connected and 0 otherwise
- trats.h: add CONFIG_USB_CHECK_CABLE
Changes v2:
- add muic avaibility
Hi Lubomir,
On Tuesday 03 December 2013 02:20 PM, Lubomir Popov wrote:
Hi Lokesh,
On 03/12/13 06:02, Lokesh Vutla wrote:
Hi Lubomir,
On Monday 02 December 2013 09:17 PM, Lubomir Popov wrote:
Hi Nikita,
On 28/11/13 18:04, Nikita Kiryanov wrote:
Writing zero into I2Ci.I2C_CNT register
Hi all,
I am facing an issue in detecting eMMC device when the dcache was enabled on
zynq board. When I entered command mmcinfo. I am getting an error as shown in
below log. The same thing works fine if I disable the dcache.
Timeout for status update!
Device: zynq_sdhci
Manufacturer ID: fe
Dear Stefano Babic,
Hi Marek,
On 03/12/2013 10:12, Marek Vasut wrote:
Thanks for testing. I will let the patchset on -next until your
feedback. If boards can boot flawlessly, I will merge it into -master.
Will this still make it for 2014.01 please?
If boards can anyway boot, yes.
Hi Chin,
On Mon, 2 Dec 2013 12:01:39 -0600, Chin Liang See cl...@altera.com
wrote:
Adding Freeze Controller driver. All HPS IOs need to be
in freeze state during pin mux or IO buffer configuration.
It is to avoid any glitch which might happen
during the configuration from propagating to
HSYNC, VSYNC and DISP_CLK are very useful display signals for debugging.
Configure them as active pins.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
board/freescale/mx6sabresd/mx6sabresd.c | 8
1 file changed, 8 insertions(+)
diff --git
mx6sabresd boards have a 18-bit LVDS data width and the correct color format
is RGB666.
Suggested-by: Liu Ying ying@freescale.com
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
board/freescale/mx6sabresd/mx6sabresd.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
This patch set includes changes required to:
- properly use of all gpios
- introduce common file for Samsung misc code
- keys support (PWR, VOL:UP,DOWN)
- console support on LCD
- 16bpp logo support
- introduce LCD menu on Samsung devices
Przemyslaw Marczak (10):
s5p: gpio: change gpio coding
New configs:
- CONFIG_LCD_MENU
- CONFIG_LCD_MENU_BOARD
which depends on: CONFIG_MISC_INIT_R
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
board/samsung/common/keys.h | 78 ++
board/samsung/common/misc.c | 354 +++
2 files changed,
Config options:
- CONFIG_SAMSUNG - misc.c
- CONFIG_MISC_INIT_R - function misc_init_r();
New file:
- board/samsung/common/misc.c
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
board/samsung/common/Makefile |1 +
board/samsung/common/misc.c | 16
2 files
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
include/configs/s5pc210_universal.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/configs/s5pc210_universal.h
b/include/configs/s5pc210_universal.h
index fb1cc6b..602c423 100644
---
Remove wrong and unused env variables
Trats2 is not as GT-I8800.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
CC: Piotr Wilczek p.wilc...@samsung.com
---
board/samsung/trats2/trats2.c | 19 ++-
drivers/power/battery/bat_trats2.c |2 +-
Old s5p gpio coding method was not clean and was not working properly
for all parts and banks. New method is clean and easy to extend.
Gpio coding mask:
0x00ff - pin number
0x0000 - bank offset
0xff00 - part number
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Piotr Wilczek p.wilc...@samsung.com
---
include/configs/trats2.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/include/configs/trats2.h b/include/configs/trats2.h
index f845437..8a181fc 100644
---
board/samsung/common/misc.c:
- move draw_logo() function from exynos_fb.c
- add get_tizen_logo_info() function call removed from board files
boards:
- update board files
- add CONFIG_MISC_INIT_R to Universal, Trats and Trats2
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
This is big size patch. Please follow link:
http://www.denx.de/wiki/pub/U-Boot/TooBigPatches/0005-lib-tizen-add-Tizen-16bpp-logo-support.patch
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Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
---
include/configs/trats.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 9738a00..d3bed99 100644
---
Dear Minkyu,
On 11/28/2013 10:16 AM, Przemyslaw Marczak wrote:
Hello Minkyu,
On 11/13/2013 01:01 PM, Przemyslaw Marczak wrote:
Old s5p gpio coding method returns bad bank address in few cases.
Now it is working properly with every gpio part bank and pin
and it is easy to extend.
Gpio coding
On Tue, Nov 12, 2013 at 01:14:59PM +0100, Stefan Roese wrote:
From: Tapani Utriainen tap...@technexion.com
Add support for TechNexion TAO3530 SoM
This patch has been posted quite a long time ago. I ported it to
the latest mainline U-Boot version. With some additional cleanup
and
From: Fabio Estevam fabio.este...@freescale.com
According to the mx6 quad reference manual, the DIV_SELECT field of register
CCM_ANALOG_PLL_ENETn has the following meaning:
Controls the frequency of the ethernet reference clock.
- 00 - 25MHz
- 01 - 50MHz
- 10 - 100MHz
- 11 - 125MHz
Current
On Tue, Dec 3, 2013 at 2:19 PM, Fabio Estevam
fabio.este...@freescale.com wrote:
HSYNC, VSYNC and DISP_CLK are very useful display signals for debugging.
Configure them as active pins.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
...
+
From: Fabio Estevam fabio.este...@freescale.com
According to the mx6 quad reference manual, the DIV_SELECT field of register
CCM_ANALOG_PLL_ENETn has the following meaning:
Controls the frequency of the ethernet reference clock.
- 00 - 25MHz
- 01 - 50MHz
- 10 - 100MHz
- 11 - 125MHz
Current
Hi Troy,
On Tue, Dec 3, 2013 at 6:15 PM, Troy Kisky
troy.ki...@boundarydevices.com wrote:
How about just
return 2500 * (div + (div 1) + 1);
That looks much better, thanks!
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On Fri, Nov 29, 2013 at 01:48:12PM +0530, Lokesh Vutla wrote:
Hi Tom,
On Tuesday 26 November 2013 08:06 PM, Tom Rini wrote:
On Tue, Nov 26, 2013 at 12:22:19PM +0530, Lokesh Vutla wrote:
Hi Chao,
On Tuesday 26 November 2013 10:32 AM, Chao Xu wrote:
Thank you! Please see the inline reply.
MPC8349 has been using mpc85xx DDR driver through a symbolic link to
mpc85xx_ddr_gen2.c. After consolidating the drivers to a single set
under driver/ddr/fsl/, the link is replaced by referring driver
directly. We now can simply enable the macro and use the driver.
Other mpc83xx SoCs still use
Hi Tom,
On 2 December 2013 13:27, Simon Glass s...@chromium.org wrote:
+Tom
Hi,
On 2 December 2013 12:02, Mateusz Zalega m.zal...@samsung.com wrote:
On 11/29/13 02:00, Masahiro Yamada wrote:
How come 13/13 is missing?
It's not.
I think it was missing until someone approved it, since it
On Tue, Dec 03, 2013 at 02:24:40PM -0700, Simon Glass wrote:
Hi Tom,
On 2 December 2013 13:27, Simon Glass s...@chromium.org wrote:
+Tom
Hi,
On 2 December 2013 12:02, Mateusz Zalega m.zal...@samsung.com wrote:
On 11/29/13 02:00, Masahiro Yamada wrote:
How come 13/13 is missing?
Hi Tom,
On 3 December 2013 14:34, Tom Rini tr...@ti.com wrote:
On Tue, Dec 03, 2013 at 02:24:40PM -0700, Simon Glass wrote:
Hi Tom,
On 2 December 2013 13:27, Simon Glass s...@chromium.org wrote:
+Tom
Hi,
On 2 December 2013 12:02, Mateusz Zalega m.zal...@samsung.com wrote:
On
On Tue, Dec 03, 2013 at 02:47:51PM -0700, Simon Glass wrote:
Hi Tom,
On 3 December 2013 14:34, Tom Rini tr...@ti.com wrote:
On Tue, Dec 03, 2013 at 02:24:40PM -0700, Simon Glass wrote:
Hi Tom,
On 2 December 2013 13:27, Simon Glass s...@chromium.org wrote:
+Tom
Hi,
On 2
Hi Tom,
On 3 December 2013 14:54, Tom Rini tr...@ti.com wrote:
On Tue, Dec 03, 2013 at 02:47:51PM -0700, Simon Glass wrote:
Hi Tom,
On 3 December 2013 14:34, Tom Rini tr...@ti.com wrote:
On Tue, Dec 03, 2013 at 02:24:40PM -0700, Simon Glass wrote:
Hi Tom,
On 2 December 2013 13:27,
From: Fabio Estevam fabio.este...@freescale.com
mx6sabresd boards have a 18-bit LVDS data width and the correct color format
is RGB666.
Suggested-by: Liu Ying ying@freescale.com
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
Changes since v1:
- None
From: Fabio Estevam fabio.este...@freescale.com
HSYNC, VSYNC and DISP_CLK are very useful display signals for debugging.
Configure them as active pins.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
Changes since v1:
- Add a comment in the code explaining that the purpose of
On Tue, Dec 3, 2013 at 8:49 PM, Fabio Estevam feste...@gmail.com wrote:
From: Fabio Estevam fabio.este...@freescale.com
HSYNC, VSYNC and DISP_CLK are very useful display signals for debugging.
Configure them as active pins.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
On Tue, Dec 3, 2013 at 8:49 PM, Fabio Estevam feste...@gmail.com wrote:
From: Fabio Estevam fabio.este...@freescale.com
mx6sabresd boards have a 18-bit LVDS data width and the correct color format
is RGB666.
Suggested-by: Liu Ying ying@freescale.com
Signed-off-by: Fabio Estevam
From: Mike Frysinger vap...@gentoo.org
This adds a SPI framework for people to hook up simulated SPI clients.
Signed-off-by: Mike Frysinger vap...@gentoo.org
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
arch/sandbox/include/asm/config.h | 8 ++
From: Mike Frysinger vap...@gentoo.org
We want to test SPI flash code in the sandbox, so enable the new drivers and
the 'sf test' command.
This command is used to validate the sandbox SPI / SPI flash implementation,
so enable it.
Signed-off-by: Mike Frysinger vap...@gentoo.org
Signed-off-by:
This allows us to put the SPI flash chip inside the SPI interface node,
with U-Boot finding the correct bus and chip select automatically.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Adjust FDT interface to keep it wholely within the FDT domain
drivers/misc/cros_ec_spi.c
The new name is longer but more clearly related to sandbox.
This is in a separate patch within the same series since some comments on the
SPI series rely on it.
Signed-off-by: Simon Glass s...@chromium.org
Reviewed-by: Hung-ying Tyan ty...@chromium.org
---
Changes in v2: None
From: Mike Frysinger vap...@gentoo.org
This adds a SPI flash driver which simulates SPI flash clients.
Currently supports the bare min that U-Boot requires: you can
probe, read, erase, and write. Should be easy to extend to make
it behave more exactly like a real SPI flash, but this is good
This was obtained from Linux 3.12 commit 5e01dc7b26.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Use entire Linux SPI binding
doc/device-tree-bindings/spi/spi-bus.txt | 92
1 file changed, 92 insertions(+)
create mode 100644
Hello York.
On Tue, 3 Dec 2013 13:16:59 -0800
York Sun york...@freescale.com wrote:
MPC8349 has been using mpc85xx DDR driver through a symbolic link to
mpc85xx_ddr_gen2.c. After consolidating the drivers to a single set
under driver/ddr/fsl/, the link is replaced by referring driver
Hi, Marczak:
Could i test these feature on S5PV310 platform(Origen Board)?
Such as : console support on LCD
Best wishes,
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On 12/04/2013 12:19 AM, Fabio Estevam wrote:
HSYNC, VSYNC and DISP_CLK are very useful display signals for debugging.
Configure them as active pins.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
board/freescale/mx6sabresd/mx6sabresd.c | 8
1 file changed, 8
From: Fabio Estevam fabio.este...@freescale.com
HSYNC, VSYNC and DISP_CLK are very useful display signals for debugging.
Configure them as active pins.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
Changes since v2:
- Fix typo in HSYNC
Changes since v1:
- Add a comment in the
From: Fabio Estevam fabio.este...@freescale.com
mx6sabresd boards have a 18-bit LVDS data width and the correct color format
is RGB666.
Suggested-by: Liu Ying ying@freescale.com
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
Changes since v2:
- None
Changes since v1:
- None
On Sun, Dec 1, 2013 at 10:53 PM, Lokesh Vutla lokeshvu...@ti.com wrote:
[...]
I read more about it and got inputs from Sekhar. I came to know that there is
a DEV_ATTRIBUTE register
which tells about the safest OPP to boot with. Looks like this should be
sufficient to get the values.
Ill add
On Sun, Dec 1, 2013 at 11:21 PM, Lokesh Vutla lokeshvu...@ti.com wrote:
][...]
We should not rely on RTC here. I don't think U-Boot should worry about low
power state. You mean to
say about passing this information to kernel?
No. I am not asking you to pass this to the kernel.
In the
Initial Program Loader (IPL) usually runs with .text and .rodata
in ROM, while .data and .bss reside in RAM.
This patch uses the AT keyword to specify load address,
and a small code snippet in crt0.S to restore .data section
at runtime.
Example usage:
Assume the target device has a 4KB ROM at
Send RPC commands to the VideoCore to turn on the SDHCI and USB modules.
For SDHCI this isn't needed in practice, since the firmware already
turned on the power in order to load U-Boot. However, it's best to be
explicit. For USB, this is necessary, since the module isn't powered
otherwise. This
Hello Shengzhou and York.
Commit c4d0e81156a4 added support for T2080QDS board.
But I cannot build this board with my crosstool:
https://www.kernel.org/pub/tools/crosstool/files/bin/x86_64/4.6.3/x86_64-gcc-4.6.3-nolibc_powerpc-linux.tar.xz
$ CROSS_COMPILE=powerpc-linux- T2080QDS
--snip--
On 12/03/2013 08:02 PM, Masahiro Yamada wrote:
Hello Shengzhou and York.
Commit c4d0e81156a4 added support for T2080QDS board.
But I cannot build this board with my crosstool:
https://www.kernel.org/pub/tools/crosstool/files/bin/x86_64/4.6.3/x86_64-gcc-4.6.3-nolibc_powerpc-linux.tar.xz
On Wednesday 04 December 2013 02:07 AM, Tom Rini wrote:
On Fri, Nov 29, 2013 at 01:48:12PM +0530, Lokesh Vutla wrote:
Hi Tom,
On Tuesday 26 November 2013 08:06 PM, Tom Rini wrote:
On Tue, Nov 26, 2013 at 12:22:19PM +0530, Lokesh Vutla wrote:
Hi Chao,
On Tuesday 26 November 2013 10:32 AM,
Hi Przemyslaw,
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
---
include/configs/trats.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 9738a00..d3bed99 100644
Board configuration creates include/config.mk, which is included
from both $(TOPDIR)/Makefile and $(TOPDIR)/config.mk.
This is rudandant.
Because $(TOPDIR)/Makefile exports ARCH, CPU, BOARD, VENDOR, SOC,
$(TOPDIR)/config.mk does not need to include include/config.mk.
Signed-off-by: Masahiro
With the current scenario SPL size is being overlapped with the public
stack and not allowing any OMAP4 device to boot. So the suggestion came
up was to move the TEXT_BASE down to non-HS limit. Fixing the same and
also moving the SRAM_SCRATCH_SPACE_ADDR up to the end of image
downloadable area.
Usually CONFIG_FSL_DDR_INTERACTIVE feature is used for debug.
we would not enable this by default to save the limited space of u-boot.
This avoid following compiling error:
section .bootpg loaded at [e000,e577] overlap ssection
.data loaded at
Patch http://patchwork.ozlabs.org/patch/296420/
Thanks,
Shengzhou
-Original Message-
From: York Sun [mailto:york...@freescale.com]
Sent: Wednesday, December 04, 2013 12:16 PM
To: Masahiro Yamada; Liu Shengzhou-B36685; u-boot@lists.denx.de
Subject: Re: How to build T2080QDS board?
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