From: Chao Fu
AT26DF081 is used on vf610twr board through the DSPI bus,
this patch add AT26DF081 into the spi flash params table.
Signed-off-by: Chao Fu
---
Change in v2: None
Change in v3: None
drivers/mtd/spi/sf_probe.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi/sf_
From: Chao Fu
Freescale DSPI module is used on both the ColdFire platform and the ARM
platform. The original DSPI driver is written for ColdFire platform only,
this patch rewrite the driver to make it be used across the platforms.
Some files, functions, variables and macros were changed according
From: Chao Fu
This patch enable the DSPI moudle on VF610 platform with following udpate:
Add get_dspi_clk() function and enable DPSI clock gate.
Add DSPI iomux definition and set the iomux for DSPI.
Signed-off-by: Chao Fu
---
Change in v2:
Separated vf610-twr update into patch 3/4.
Chan
From: Chao Fu
Enable DSPI iomux for vf610twr board.
Add the SPI configuration for vf610twr board.
Signed-off-by: Chao Fu
---
Change in v2 :
New.
Change in v3 :
None.
board/freescale/vf610twr/vf610twr.c | 15 ++-
include/configs/vf610twr.h | 15
Dear Ben Collins,
Please don't top post / full quote.
In message you wrote:
> To answer most of your questions, I'm not entirely worried about the issues
> you are, I am just looking for help getting it working right now. I'll cross
> the license/submit bridge when I get to it.
Hm... I would ex
Add AM43xx specific changes.
Signed-off-by: Sourav Poddar
---
drivers/spi/ti_qspi.c | 26 +++---
1 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index 5a5b482..5666250 100644
--- a/drivers/spi/ti_qspi.c
+++ b/dri
Add QSPI definitions and clock configuration support.
Signed-off-by: Sourav Poddar
---
arch/arm/cpu/armv7/am33xx/clock_am43xx.c |1 +
arch/arm/include/asm/arch-am33xx/cpu.h |4 +++-
arch/arm/include/asm/arch-am33xx/omap.h |1 +
3 files changed, 5 insertions(+), 1 deletions(-)
dif
Without this delay, write/read is failing.
Looks like, the WIP always remain set and hence a timeout
occurs leading to the error.
Without this patch, device does not get probed also.
Here is the log.
U-Boot#
U-Boot#
U-Boot#
U-Boot# sf probe 0
SF: Unsupported flash IDs: manuf ff, jedec , ext_j
This shows the log obtained while testing qspi on AM437x board.
Signed-off-by: Sourav Poddar
---
doc/SPI/README.ti_qspi_am43x_test | 76 +
1 files changed, 76 insertions(+), 0 deletions(-)
create mode 100644 doc/SPI/README.ti_qspi_am43x_test
diff --git a/
The patch series add support for enabling qspi
on AM43xx at uboot.
Testing done:
-
Wrote a uImage to the flash, read it back and boot the
kernel.
v1->v2:
Remove patch 3 of previous version, as support was already added
for macronix flash.
Created a doc explaining the test details.
Th
Enables support for SPI SPL, QSPI and Spansion serial flash device
on the EVM. Configures pin muxes for QSPI mode.
Signed-off-by: Sourav Poddar
---
board/ti/am43xx/mux.c| 11 +++
include/configs/am43xx_evm.h | 20
2 files changed, 31 insertions(+), 0 dele
From: Ramneek Mehresh
Defines get_svr() for 83xx devices
Signed-off-by: Ramneek Mehresh
---
arch/powerpc/cpu/mpc83xx/start.S | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
index b4fafe6..7f74a50 100644
--- a/arch/pow
To answer most of your questions, I'm not entirely worried about the issues you
are, I am just looking for help getting it working right now. I'll cross the
license/submit bridge when I get to it.
> On Dec 19, 2013, at 2:52 PM, Wolfgang Denk wrote:
>
> Dear Ben Collins,
>
> In message <293c5
Hi, Marczak
On Thu, 19 Dec 2013 11:40:26 +0100
Przemyslaw Marczak wrote:
> Hello Hyungwon,
>
> On 12/19/2013 06:40 AM, íŠíě wrote:
> > Hi, Marczak.
> >
> > Is this logo image what I sent you before?
> >
> > It's a little different what we use,
> > and also the logo image is not aligned center
From: Kuo-Jung Su
Since hardware revision 1.11.0, the following interrupt status
registers are now W1C (i.e., write 1 clear):
1. Interrupt Source Group 0 Register (0x144) (EP0 Abort: BIT5)
2. Interrupt Source Group 2 Register (0x14C) (All bits)
And before revision 1.11.0, these registers are al
From: Kuo-Jung Su
The fifo size of ep0 is 64 bytes, and if the packet size grater than
64 bytes, the driver would have to fill up the fifo multiple times,
and before filling up the fifo, the driver should make sure the fifo
is empty by checking fifo empty indication.
However there is a hardware
From: Kuo-Jung Su
1. It's known that EP0 fifo empty indication is not reliable, an extra delay
is necessary to avoid data corruption while handling packets with size
greater than 64 bytes.
2. Since hardware revision 1.11.0, some fields of interrupt status registers
are now write-1-clear
2013/12/19 Marek Vasut :
> On Thursday, December 19, 2013 at 08:07:00 AM, Kuo-Jung Su wrote:
>> 2013/12/19 Marek Vasut :
>> > On Thursday, December 19, 2013 at 01:50:55 AM, Kuo-Jung Su wrote:
>> >> 2013/12/18 Marek Vasut :
>> >> > On Wednesday, December 18, 2013 at 08:24:49 AM, Kuo-Jung Su wrote:
>
- add more serdes protocols support.
- fix some serdes lanes route.
- correct boot location info for SD/SPI boot.
Signed-off-by: Shengzhou Liu
---
board/freescale/t2080qds/t2080qds.c | 66 +
1 file changed, 60 insertions(+), 6 deletions(-)
diff --git a/board/
2013/12/20 Jagan Teki :
> Hi Kuo-Jung Su,
>
> Please check this v7 and try to add the test log if you have.
>
Hi Jagan:
Thanks for the v7 patch, it works flawlessly.
Here is the test log on Faraday A369 EVB:
U-Boot 2014.01-rc2-g3444b6f (Dec 20 2013 - 10:58:40)
CPU: FA626TE 528 MHz
AHB: 132
Hi Masahiro,
On 17 December 2013 23:33, Masahiro Yamada wrote:
> Hello Simon
>
>
>> Prerequisite
>>
>>
>> You need to apply some patches beforehand to use this series.
>> This series uses the followings as prerequisites:
>>
>> [1] sandbox: Use system headers first for sandbox's os.
When CONFIG_SYS_VSNPRINTF is enabled, it protects print operations
such as sprintf, snprintf, vsnprintf, etc., from buffer overflows.
But vsnprintf_internal includes the terminating NULL character in
the calculation of number of characters written. This affects sprintf
and snprintf return values. F
Fixup prints to show where the print is done from, and
a few minor formatting/grammar issues.
Signed-off-by: Darwin Rambo
---
drivers/mmc/sdhci.c | 32 +++-
1 file changed, 19 insertions(+), 13 deletions(-)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
ind
Hi Tom,
On Thu, 19 Dec 2013 12:04:19 -0500, Tom Rini wrote:
> Hey,
>
> The following changes since commit d627eefcd5e72db00889718ca9ee1dcb4d026fc9:
>
> Merge remote-tracking branch 'u-boot-pxa/master' into 'u-boot-arm/master'
> (2013-12-18 22:19:02 +0100)
>
> are available in the git repos
If timer_init() is made a weak stub function, then it allows us to
remove several empty timer_init functions for those boards that
already have a timer initialized when u-boot starts. Architectures
that use the timer framework may also remove the need for timer.c.
Signed-off-by: Darwin Rambo
Revi
On Thu, Dec 19, 2013 at 11:52:00PM +0530, Jagannadha Sutradharudu Teki wrote:
> Hi Tom,
>
> Small PR - addons on one spi driver, others and few fixes.
>
> Thanks,
> Jagan.
>
> The following changes since commit f3bf212abc4139f12b472e97c1992ab32671b609:
>
> serial_sh: add support for SH7753 (
Add option for individual reset of HSIC-connected USB devices by the
ehci-hcd.c driver upon applying port power, with per-device configurable
reset hold and delay times. This may replace the reset functionality via
usb_hub.c and board file (which does not work on some boards).
Make HSIC work on al
On 11 November 2013 06:08, Rajeshwari Birje wrote:
> Hi All,
>
> This patch is based on:
>
> [U-Boot] [PATCH 00/10 V6] EXYNOS5420: Add SMDK5420 board support
>
> --
> Regards,
> Rajeshwari Shinde
>
> On Mon, Nov 11, 2013 at 6:23 PM, Rajeshwari S Shinde
> wrote:
>> This patch implements generic ap
On 16 December 2013 01:42, Rajeshwari S Shinde wrote:
> Adding the base patch for Exynos based SMDK5420.
> This shall enable compilation and basic boot support for
> SMDK5420.
>
> Signed-off-by: Rajeshwari S Shinde
> Signed-off-by: Akshay Saraswat
Acked-by: Simon Glass
Hi Rajeshwari,
On 16 December 2013 01:42, Rajeshwari S Shinde wrote:
> This patch intends to add DDR3 initialization code for Exynos5420.
>
> Signed-off-by: Akshay Saraswat
> Signed-off-by: Rajeshwari S Shinde
> ---
> Changes in V2:
> - Corrected a compilation issue for SMDK5250.
> Chan
On 16 December 2013 01:42, Rajeshwari S Shinde wrote:
> This patch adds code for clock initialization and clock settings
> of various IP's and controllers, required for Exynos5420
>
> Signed-off-by: Rajeshwari S Shinde
> Signed-off-by: Akshay Saraswat
Acked-by: Simon Glass
> ---
> Changes in
On 16 December 2013 01:42, Rajeshwari S Shinde wrote:
> Add dmc and phy_control register structure for 5420.
>
> Signed-off-by: Rajeshwari S Shinde
Acked-by: Simon Glass
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinf
On 16 December 2013 01:42, Rajeshwari S Shinde wrote:
> Add structure for power register for Exynos5420
>
> Signed-off-by: Rajeshwari S Shinde
Acked-by: Simon Glass
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-b
On 16 December 2013 01:42, Rajeshwari S Shinde wrote:
> Create a common board.c file for all functions which are common across
> all EXYNOS5 platforms.
>
> exynos_init function is provided for platform specific code.
>
> Signed-off-by: Rajeshwari S Shinde
> ---
> Changes in V2:
> - None
>
Hi Gerhard,
On Thu, 2013-12-19 at 21:03 +0100, Gerhard Sittig wrote:
> On Thu, Dec 19, 2013 at 08:46 -0600, Chin Liang See wrote:
> >
> > Hi Gerhard,
> >
> > On Thu, 2013-12-19 at 14:50 +0100, Gerhard Sittig wrote:
> > > On Wed, Dec 18, 2013 at 14:05 -0600, Chin Liang See wrote:
> > > >
> > > >
On 12 November 2013 05:27, Ajay Kumar wrote:
> Enable FIMD and DP drivers on SMDK5420 so that we get to
> see the LCD console on eDP panel.
>
> Signed-off-by: Ajay Kumar
Acked-by: Simon Glass
> ---
> include/configs/smdk5420.h | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/i
Hi Ajay,
On 12 November 2013 05:27, Ajay Kumar wrote:
> Enabling VDD_28IO_DP via LDO38 for SMDK5420.
>
> Signed-off-by: Ajay Kumar
> ---
> board/samsung/common/board.c | 3 +++
> include/power/s2mps11_pmic.h | 3 +++
> 2 files changed, 6 insertions(+)
>
> diff --git a/board/samsung/common/board
Hi Ajay,
On 12 November 2013 05:27, Ajay Kumar wrote:
> Add callbacks to set up DP-HPD, backlight and LCD power
> on SMDK5420.
>
> Signed-off-by: Ajay Kumar
> ---
> board/samsung/smdk5420/smdk5420.c | 102
> +++---
> 1 file changed, 17 insertions(+), 85 deletion
Hi Ajay,
On 12 November 2013 05:27, Ajay Kumar wrote:
> On Exynos5420 and newer versions, the FIMD sysmmus are in
> "on state" by default.
> We have to disable them in order to make FIMD DMA work.
> This patch adds the required framework to exynos_fimd driver,
> and disables FIMD sysmmu on Exynos
On 12 November 2013 05:27, Ajay Kumar wrote:
> Add get_lcd_clk and set_lcd_clk callbacks for Exynos5420 needed by
> exynos video driver.
> Also, configure ACLK_400_DISP1 as the parent for MUX_ACLK_400_DISP1_SUB_SEL.
>
> Signed-off-by: Ajay Kumar
Acked-by: Simon Glass
___
On 12 November 2013 05:27, Ajay Kumar wrote:
> RPLL is needed to drive the LCD panel on Exynos5420 based boards.
>
> Signed-off-by: Ajay Kumar
> ---
> arch/arm/cpu/armv7/exynos/clock_init.h | 3 +++
> arch/arm/cpu/armv7/exynos/clock_init_exynos5.c | 13 +
> 2 files changed,
On 12 November 2013 05:27, Ajay Kumar wrote:
> Previously, we used to statically assign values for vl_col, vl_row and
> vl_bpix using #defines like LCD_XRES, LCD_YRES and LCD_COLOR16.
>
> Introducing the function exynos_lcd_early_init() would take care of this
> assignment on the fly by parsing FI
On Thu, Dec 19, 2013 at 18:26 +0200, Lubomir Popov wrote:
>
> ---
> V1 and V2 got garbled during transmission. V3 is just a resend (again).
Just a hint: The problem is with your MUA, sticking with it just
repeats the mangling (it's a builtin "feature"). Consider using
'git send-email' for patch
On Thu, Dec 19, 2013 at 08:46 -0600, Chin Liang See wrote:
>
> Hi Gerhard,
>
> On Thu, 2013-12-19 at 14:50 +0100, Gerhard Sittig wrote:
> > On Wed, Dec 18, 2013 at 14:05 -0600, Chin Liang See wrote:
> > >
> > > To add the Cadence SPI driver support for Altera SOCFPGA. It
> > > required informati
Dear Ben Collins,
In message <293c5061-60b5-458b-b586-d66b0ed36...@servergy.com> you wrote:
>
> (Note, I am not subscribed to the list, so please make sure to keep me
> in Cc)
No, please subscribe if you plan to submit patches.
> I am working on a p4080 based system (Freescale 32-bit Power). In
Cleanup on miscellaneous configurable options:
- Rename SYS_PROMPT as "zynq-uboot"
- Add comment
- Re-order configs
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3: none
V2: Removed CONFIG_SYS_PROMPT_HUSH_PS2
include/configs/zynq.h | 19 ++-
1 file changed, 10 insertions(+),
Hi Kuo-Jung Su,
Please check this v7 and try to add the test log if you have.
On Fri, Dec 20, 2013 at 12:34 AM, Jagannadha Sutradharudu Teki
wrote:
> From: Kuo-Jung Su
>
> The Faraday FTSSP010 is a multi-function controller
> which supports I2S/SPI/SSP/AC97/SPDIF. However This
> patch implement
From: Kuo-Jung Su
The Faraday FTSSP010 is a multi-function controller
which supports I2S/SPI/SSP/AC97/SPDIF. However This
patch implements only the SPI mode.
NOTE:
The DMA and CS/Clock control logic has been altered
since hardware revision 1.19.0. So this patch
would first detects the revision i
Hi Tom and Albert,
Can you look into this series.
On Thu, Dec 19, 2013 at 11:38 PM, Jagannadha Sutradharudu Teki
wrote:
> These changes are from u-boot-xlnx.git repo from git.xilinx.com
> This repo is well tested on xilinx zynq platform, hence pushing
> the same on upstream.
>
> Excluded qspi an
Hi Tom,
Small PR - addons on one spi driver, others and few fixes.
Thanks,
Jagan.
The following changes since commit f3bf212abc4139f12b472e97c1992ab32671b609:
serial_sh: add support for SH7753 (2013-12-18 16:50:00 +0900)
are available in the git repository at:
git://git.denx.de/u-boot-spi
Cleanups mostly on:
- Add comments
- Re-order configs
- Remove #define CONFIG_ZYNQ_SDHCI
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3: none
V2: none
include/configs/zynq.h | 76 ++
1 file changed, 39 insertions(+), 37 deletions(-)
diff --gi
ZC770 is a complete development board based on the Xilinx Zynq-7000
All Programmable SoC, similar to ZC70x board but which has four
different daughter cards, like XM010, XM011, XM012 and XM013
ZC770 XM012:
- 1GB DDR3
- 64MiB Numonyx NOR flash
- USB-UART
Signed-off-by: Jagannadha Sutradharudu Teki
Last 128Kb sector of 1Mb flash is defined as u-boot
environment partition.
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3: none
V2: none
include/configs/zynq-common.h | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/include/configs/zynq-common.h b/include/con
Adds configurations for Catalyst 24WC08 EEPROM, which
is present on the zynq boards.
Enable EEPROM support for zc70x boards.
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3: none
V2: none
include/configs/zynq-common.h | 10 ++
include/configs/zynq_zc70x.h | 1 +
2 files changed, 1
ZC770 is a complete development board based on the Xilinx Zynq-7000
All Programmable SoC, similar to ZC70x board but which has four
different daughter cards, like XM010, XM011, XM012 and XM013
ZC770 XM013:
- 1GB DDR3
- 128 Mb Quad-SPI Flash(dual parallel)
- USB-UART
Signed-off-by: Jagannadha Sutr
Added support to find the bootmodes by reading
slcr bootmode register. this can be helpful to
autoboot the configurations w.r.t a specified bootmode.
Added this functionality on board_late_init as it's not
needed for normal initializtion part.
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3:
This patch adds initial dts support for supported
zynq boards.
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3: Removed zynq-zc770-xm011.dts file
V2: none
board/xilinx/dts/zynq-microzed.dts| 14 ++
board/xilinx/dts/zynq-zc702.dts | 14 ++
board/xilinx/dts/zy
zynq.h -> zynq-common.h, zynq-common is Common
configuration options for all Zynq boards.
zynq.h is no longer exists hense removed from boards.cfg
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3: none
V2: none
boards.cfg| 2 --
include/configs/{zynq.h => zyn
The Zynq-7000 APSOC zc702 and zc706 enabled complte embedded
processing includes ASIC and FPGA design.
ZC702-:
APSOC:
- XC7Z020-CLG484-1
Memory:
- DDR3 Component Memory 1GB
- 16MB Quad SPI Flash
- IIC - 1 KB EEPROM
Connectivity:
- Gigabit Ethernet GMII, RGMII and SGMII.
- USB OTG - Host USB
- IIC
Zed is a complete development board based on the
Xilinx Zynq-7000 All Programmable SoC.
APSOC:
- XC7Z020-CLG484-1
Memory:
- 512 MB DDR3
- 256 Mb Quad-SPI Flash(
- Full size SD/MMC card cage
Connectivity:
- 10/100/1000 Ethernet
- USB OTG (Device/Host/OTG)
- USB-UART
Expansion:
- FMC (Low Pin Count)
Information on zynq u-boot about
- zynq boards
- mainline status
- TODO
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3: none
V2: none
doc/README.zynq | 60 +
1 file changed, 60 insertions(+)
create mode 100644 doc/README.zynq
diff --
Defined CONFIG_ENV_OVERWRITE, which allow to
overwrite serial baudrate and ethaddr.
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3: none
V2: none
include/configs/zynq-common.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.
Defined TEXT_BASE for u-boot starts from 0x400
w.r.t zynq memory-map.
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3: none
V2: none
include/configs/zynq-common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-comm
CONFIG_SYS_SDRAM_SIZE is specific to a board hence moved
to specific pre-config board files.
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3: none
V2: none
include/configs/zynq-common.h | 1 -
include/configs/zynq_zc70x.h | 2 ++
include/configs/zynq_zed.h| 2 ++
3 files changed, 4 inse
Zynq ethernet controller support two GEM's like
CONFIG_ZYNQ_GEM0 and CONFIG_ZYNQ_GEM1 enabled
both so-that the respective board will define
these macros based on their usage.
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3: none
V2: none
include/configs/zynq.h | 16
1 file c
- Enable cache command
- Turn-off L2 cache
- Turn-on D-cache
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3: none
V2: none
include/configs/zynq.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/configs/zynq.h b/include/configs/zynq.h
index c8ab06f..6e545e5 100644
---
GPIO dummy routines are required for fdt build, may be removed
these dependencies once the u-boot fdt is fully optimized.
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3: none
V2: none
arch/arm/include/asm/arch-zynq/gpio.h | 25 +
1 file changed, 25 insertions(+)
cre
Updated doc/README.zynq to current status.
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3: Updated acc to current status
V2: none
doc/README.zynq | 26 ++
1 file changed, 18 insertions(+), 8 deletions(-)
diff --git a/doc/README.zynq b/doc/README.zynq
index ea1c8c1..
CONFIG_FIT_SIGNATURE - signature node support in FIT image
CONFIG_RSA - RSA lib support
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3: none
V2: none
include/configs/zynq-common.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-co
Zynq uart controller support two serial ports like
CONFIG_ZYNQ_SERIAL_UART0 and CONFIG_ZYNQ_SERIAL_UART1
enabled both so-that the respective board will define
these macros based on their usage.
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3: none
V2: none
include/configs/zynq.h | 20 +++
Defined default env. for autoboot FIT image from
respective boot devices.
Default settings:
fit_image=fit.itb
load_addr=0x200
fit_size=0x80
flash_off=0x10
nor_flash_off=0xE210
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3: none
V2: none
include/configs/zynq-common.h | 23 +
These changes are from u-boot-xlnx.git repo from git.xilinx.com
This repo is well tested on xilinx zynq platform, hence pushing
the same on upstream.
Excluded qspi and nand changes from previous series.
--
Thanks,
Jagan.
Jagannadha Sutradharudu Teki (29):
zynq: Enable CONFIG_FIT_VERBOSE
zynq
ZC770 is a complete development board based on the Xilinx Zynq-7000
All Programmable SoC, similar to ZC70x board but which has four
different daughter cards, like XM010, XM011, XM012 and XM013
ZC770 XM010:
- 1Gb DDR3
- 1Mb SST SPI flash
- 128 Mb Quad-SPI Flash
- 8 Mb SST SI flash
- Full size SD/MM
MicroZed is a low-cost development board based on
the Xilinx Zynq-7000 All Programmable SoC.
APSOC:
- XC7Z010-1CLG400C
Memory:
- 1 GB of DDR3 SDRAM
- 128Mb of QSPI flash(S25FL128SAGBHI200)
- Micro SD card interface
Communication:
- 10/100/1000 Ethernet
- USB 2.0
- USB-UART
User I/O:
- 100 User I/O
This patch provides a basic fdt support for zynq u-boot.
zynq-7000.dtsi-> initial arch dts file
zynq-zed.dts -> initial zed board dts file
more devices should be added in subsequent patches.
u-boot build: once configuring of a board done
for building dtb with zynq-zed.dts as an input
zynq-uboot>
Changed Env. Sector size from 0x1 to 128Kb
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3: none
V2: none
include/configs/zynq-common.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 764395b..87f0
This enabled Boot FreeBSD/vxWorks from an ELF image support
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3: none
V2: none
include/configs/zynq.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/configs/zynq.h b/include/configs/zynq.h
index 6019c4a..0492818 100644
--- a/inc
Enabled fit_format_{error,warning}()
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3: none
V2: none
include/configs/zynq.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/zynq.h b/include/configs/zynq.h
index 82ec826..6019c4a 100644
--- a/include/configs/zynq.h
+++ b/incl
Cleanup on memory configuration options:
- Add comment
- Re-order configs
Signed-off-by: Jagannadha Sutradharudu Teki
---
V3: none
V2: none
include/configs/zynq.h | 27 ++-
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/include/configs/zynq.h b/include/c
On Thursday 19 December 2013 10:30 PM, Tom Rini wrote:
> On Wed, Dec 18, 2013 at 03:07:47PM -0500, Tom Rini wrote:
>> On Tue, Dec 10, 2013 at 03:02:10PM +0530, Lokesh Vutla wrote:
>>
>>> This Patch series updates support for AM4372 EPOS and GP EVM boards.
>>> AM4372 is a low cost Cortex-A9 based ap
On Thu, Dec 19, 2013 at 11:09 PM, Tom Rini wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA1
>
> On 12/19/2013 12:26 PM, Jagan Teki wrote:
>> On Thu, Dec 19, 2013 at 10:06 PM, Tom Rini wrote:
>>> -BEGIN PGP SIGNED MESSAGE-
>>> Hash: SHA1
>>>
>>> On 12/19/2013 10:57 AM, Jagannadha S
On Wed, Dec 18, 2013 at 05:10:00PM -0600, Scott Wood wrote:
> Note that as discussed at http://patchwork.ozlabs.org/patch/296730/
> the "cosmetic" patch is fixing a significant readability regression --
> the current indentation is misleading as to the code flow.
>
> The following changes since c
On Wed, Dec 18, 2013 at 07:54:24PM +0100, Marek Vasut wrote:
> The following changes since commit f3bf212abc4139f12b472e97c1992ab32671b609:
>
> serial_sh: add support for SH7753 (2013-12-18 16:50:00 +0900)
>
> are available in the git repository at:
>
> git://git.denx.de/u-boot-usb.git mast
On Wed, Dec 18, 2013 at 07:00:51PM +0900, Masahiro Yamada wrote:
> Before this commit, a broken pipe error sometimes happened
> when building lcd4_lwmon5 board with Buildman.
>
> This commit re-writes build rules of
> u-boot.spr and u-boot-img-spl-at-end.bin
> more simply without using a pipe.
>
On Mon, Dec 16, 2013 at 03:27:23PM +0800, Bo Shen wrote:
> Fix the typo error for mrproper from mkproper.
>
> Signed-off-by: Bo Shen
> Acked-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
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Hash: SHA1
On 12/19/2013 12:26 PM, Jagan Teki wrote:
> On Thu, Dec 19, 2013 at 10:06 PM, Tom Rini wrote:
>> -BEGIN PGP SIGNED MESSAGE-
>> Hash: SHA1
>>
>> On 12/19/2013 10:57 AM, Jagannadha Sutradharudu Teki wrote:
>>> Signed-off-by: Jagannadha Sutradhar
Hi Masahiro,
On 28 November 2013 17:37, Masahiro Yamada wrote:
> Hello Simon.
>
>
>> Add a simple LCD driver which uses SDL to display the image. We update the
>> image regularly, while still providing for reasonable performance.
>>
>> Adjust the common lcd code to support sandbox.
>>
>> For comm
On Thu, Dec 19, 2013 at 10:06 PM, Tom Rini wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA1
>
> On 12/19/2013 10:57 AM, Jagannadha Sutradharudu Teki wrote:
>> Signed-off-by: Jagannadha Sutradharudu Teki
>> Cc: Masahiro Yamada
>> ---
>> drivers/mtd/spi/Makefile | 11 +--
>> 1 fil
Hey,
The following changes since commit d627eefcd5e72db00889718ca9ee1dcb4d026fc9:
Merge remote-tracking branch 'u-boot-pxa/master' into 'u-boot-arm/master'
(2013-12-18 22:19:02 +0100)
are available in the git repository at:
git://git.denx.de/u-boot-ti.git master
for you to fetch changes
On Wed, Dec 18, 2013 at 03:07:47PM -0500, Tom Rini wrote:
> On Tue, Dec 10, 2013 at 03:02:10PM +0530, Lokesh Vutla wrote:
>
> > This Patch series updates support for AM4372 EPOS and GP EVM boards.
> > AM4372 is a low cost Cortex-A9 based application processor targeted at
> > existing
> > ARM9/ARM
Hi Masahiro,
On 19 December 2013 00:19, Masahiro Yamada wrote:
> Hello Simon
>
>
>> Since buildman does incremental builds by default, if nothing changes
>> in the the build, that Makefile rule may not be invoked. It is
>> possible that commits 03 to 15 don't update anything which causes the
>> f
Hi Jagan,
On Thu, 2013-12-19 at 21:39 +0530, Jagan Teki wrote:
> Thanks for your patch.
>
> Please see the typical driver code suggestions on below thread.
> http://u-boot.10912.n7.nabble.com/Suggestions-for-SPI-driver-pusher-td161008.html
>
> Try to avoid the header files make sure to code ever
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 12/19/2013 10:57 AM, Jagannadha Sutradharudu Teki wrote:
> Signed-off-by: Jagannadha Sutradharudu Teki
> Cc: Masahiro Yamada
> ---
> drivers/mtd/spi/Makefile | 11 +--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/dr
Add option for individual reset of HSIC-connected USB devices by the
ehci-hcd.c driver upon applying port power, with per-device configurable
reset hold and delay times. This may replace the reset functionality via
usb_hub.c and board file (which does not work on some boards).
Make HSIC work on al
Thanks for your patch.
Please see the typical driver code suggestions on below thread.
http://u-boot.10912.n7.nabble.com/Suggestions-for-SPI-driver-pusher-td161008.html
Try to avoid the header files make sure to code everything in single .c file.
Also add some documents as well as test log on do
Signed-off-by: Jagannadha Sutradharudu Teki
Cc: Masahiro Yamada
---
drivers/mtd/spi/Makefile | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index 26483a2..fd8f8a4 100644
--- a/drivers/mtd/spi/Makefile
+++ b/driv
Add option for individual reset of HSIC-connected USB devices by the
ehci-hcd.c driver upon applying port power, with per-device configurable
reset hold and delay times. This may replace the reset functionality via
usb_hub.c and board file (which does not work on some boards).
Make HSIC work on al
Dear Minkyu Kang,
> -Original Message-
> From: Piotr Wilczek [mailto:p.wilc...@samsung.com]
> Sent: Wednesday, December 18, 2013 3:44 PM
> To: u-boot@lists.denx.de
> Cc: Minkyu Kang; Kyungmin Park; Piotr Wilczek; Lukasz Majewski
> Subject: [PATCH] board:trats1:trats2: fix adapter number
>
All prerequisites are already available, so why not enable 8-bit
access - it is a matter of a define in the board file only.
Signed-off-by: Lubomir Popov
---
include/configs/omap5_uevm.h |1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_u
This patch demonstrates the usage of the alternative method for HSIC
devices reset (via the ehci-hcd and omap-ehci drivers, where this
method is implemented through a separate patch; must be applied prior
to this one). Board functionality is not altered; a minor improvement
is the removal of the se
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