Hi Fabio,
The PU power-up/power-down sequence has specific steps, includes some clock
management. Please refer to the kernel code for the sequence.
Thanks,
Ranjani
-Original Message-
From: Fabio Estevam [mailto:feste...@gmail.com]
Sent: Wednesday, December 18, 2013 9:16 PM
To: sba...@d
Dear Marczak,
On Fri, 20 Dec 2013 12:50:11 +0100
Przemyslaw Marczak wrote:
> Dear Hyungwon,
>
> On 12/20/2013 06:07 AM, Hyungwon Hwang wrote:
> > Hi, Marczak
> >
> > On Thu, 19 Dec 2013 11:40:26 +0100
> > Przemyslaw Marczak wrote:
> >
> >> Hello Hyungwon,
> >>
> >> On 12/19/2013 06:40 AM, 황형원
The OneNAND SPL used on PXA is slightly obscure. Due to the OneNAND limitation,
where we have only the first 1KiB of the OneNAND available upon power-up as a
memory-mapped area, from which the CPU starts executing, we place only the most
essential code into this first 1KiB . This code copies the re
Access the OneNAND 1KiB window on the VPAC270 as an SRAM instead of accessing
it as a burst-RAM. This fixes a problem where the board failed to reboot
sometimes as the CPU couldn't start executing from the OneNAND 1KiB window.
Signed-off-by: Marek Vasut
Cc: Albert Aribaud
Cc: Tom Rini
---
incl
Fix unaligned access in OneNAND core. The problem is that the ffchars[] array
is an array of "unsigned char", but in onenand_write_ops_nolock() can be passed
to the memcpy_16() function. The memcpy_16() function will treat the buffer as
an array of "unsigned short", thus triggering unaligned access
This supports SH-QSPI device on koelsch board, and enable booting from
SPI flash.
Signed-off-by: Nobuhiro Iwamatsu
Signed-off-by: Nobuhiro Iwamatsu
---
include/configs/koelsch.h | 33 +
1 file changed, 29 insertions(+), 4 deletions(-)
diff --git a/include/config
This supports SH-QSPI device on lager board, and enable booting from
SPI flash.
Signed-off-by: Nobuhiro Iwamatsu
Signed-off-by: Nobuhiro Iwamatsu
---
include/configs/lager.h | 32 +---
1 file changed, 29 insertions(+), 3 deletions(-)
diff --git a/include/configs/lag
On U-boot uses TMU0 as timer, but TMU0 does not use on linux kernel
and other.
This disables TMU0 at the request of from kernel user.
Signed-off-by: Nobuhiro Iwamatsu
Signed-off-by: Nobuhiro Iwamatsu
---
board/renesas/koelsch/koelsch.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/b
On U-boot uses TMU0 as timer, but TMU0 does not use on linux kernel
and other.
This disables TMU0 at the request of from kernel user.
Signed-off-by: Nobuhiro Iwamatsu
Signed-off-by: Nobuhiro Iwamatsu
---
board/renesas/lager/lager.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/board
Hi Albert,
Any idea when are you getting this patch in as it is effecting the SMDK5250
booting.
Regards,
Rajeshwari
On Fri, Dec 13, 2013 at 3:28 PM, Albert ARIBAUD
wrote:
> Hi Masahiro,
>
> On Fri, 13 Dec 2013 17:15:51 +0900, Masahiro Yamada
> wrote:
>
> > Hello Albert.
> >
> >
> > > $(obj)$
This patch adds basic board support for SMDK5420 board.
These patches are tested for booting fine on EVT1 SMDK5420.
Rajeshwari S Shinde (11):
EXYNOS5: Create a common board file
Exynos5420: Add base addresses for 5420
EXYNOS5420: Add power register structure.
EXYNOS5420: Add dmc and phy_co
Adds base addresses of various IPs and controllers required for
Exynos5420.
Signed-off-by: Rajeshwari S Shinde
Signed-off-by: Akshay Saraswat
Acked-by: Simon Glass
---
Changes in V2:
- None
Changes in V3:
- None
Changes in V4:
- Added base address for TZPC.
Changes in V5
Adding the base patch for Exynos based SMDK5420.
This shall enable compilation and basic boot support for
SMDK5420.
Signed-off-by: Rajeshwari S Shinde
Signed-off-by: Akshay Saraswat
Acked-by: Simon Glass
---
Changes in V2:
- None
Changes in V3:
- None
Changes in V4:
- Re
Add structure for power register for Exynos5420
Signed-off-by: Rajeshwari S Shinde
Acked-by: Simon Glass
---
Changes in V10:
- New patch
Changes in V11:
- None
Changes in V12:
- None
Changes in V13:
- None
arch/arm/include/asm/arch-exynos/power.h | 837 ++
Adds code in pinmux and gpio framework to support Exynos5420.
Signed-off-by: Naveen Krishna Chatradhi
Signed-off-by: Akshay Saraswat
Signed-off-by: Rajeshwari S Shinde
Acked-by: Simon Glass
---
Changes in V2:
- None
Changes in V3:
- None
Changes in V4:
- Added correct c
Create a common board.c file for all functions which are common across
all EXYNOS5 platforms.
exynos_init function is provided for platform specific code.
Signed-off-by: Rajeshwari S Shinde
Acked-by: Simon Glass
---
Changes in V2:
- None
Changes in V3:
- None
Changes in V4:
This patch intends to add DDR3 initialization code for Exynos5420.
Signed-off-by: Akshay Saraswat
Signed-off-by: Rajeshwari S Shinde
Acked-by: Simon Glass
---
Changes in V2:
- Corrected a compilation issue for SMDK5250.
Changes in V3:
- None
Changes in V4:
- None
Changes
When variable size SPL is used, the BL1 expects the SPL to be
encapsulated differently: instead of putting the checksum at a fixed
offset in the SPL blob, prepend the blob with a header including the
size and the checksum.
The enhancements include
- adding a command line option, '--vs' to
Adding initial config for SMDK5420 to build and boot U-Boot
over Exynos based SMDK5420.
Signed-off-by: Rajeshwari S Shinde
Signed-off-by: Akshay Saraswat
Acked-by: Simon Glass
---
Changes in V2:
- None
Changes in V3:
- None
Changes in V4:
- Created a common exynos5-dt.h
Add dmc and phy_control register structure for 5420.
Signed-off-by: Rajeshwari S Shinde
Acked-by: Simon Glass
---
Changes in V10:
- New patch
Changes in V11:
- None
Changes in V12:
- None
Changes in V13:
- None
arch/arm/include/asm/arch-exynos/dmc.h | 167 +++
This patch adds dts support for SMDK5420.
exynos5.dtsi created is a common file which has the nodes common
to both 5420 and 5250.
Signed-off-by: Akshay Saraswat
Signed-off-by: Rajeshwari S Shinde
Acked-by: Simon Glass
---
Changes in V2:
- None
Changes in V3:
- None
Changes in V4
Hi, Chin.
On 12/19/2013 02:16 AM, Chin Liang See wrote:
> To add the DesignWare MMC driver support for Altera SOCFPGA. It
> required information such as clocks and bus width from platform
> specific files (SOCFPGA handoff files)
>
> Signed-off-by: Chin Liang See
> Cc: Rajeshwari Shinde
> Cc: Ja
JEDEC spec requires the clocks to be stable before deasserting reset
signal for RDIMMs. Clocks start when any chip select is enabled and
clock control register is set. This patch also adds the interface to
toggle memory reset signal if needed by the boards.
Signed-off-by: Prabhakar Kushwaha
-
On Dec 25, 2013, at 10:48 PM, Prabhakar Kushwaha wrote:
> JEDEC spec requires the clocks to be stable before deasserting reset
> signal for RDIMMs. Clocks start when any chip select is enabled and
> clock control register is set. This patch also adds the interface to
> toggle memory reset signal
Define QIXIS_RST_FORCE_MEM to reset on-board DDR-DIMM before start
accessing it.
Signed-off-by: Prabhakar Kushwaha
---
Changes for v2: Incorporated York's comments
- Update subject and description
board/freescale/t1040qds/t1040qds.c |5 +
include/configs/T1040QDS.h |
Hi, Alexey.
I have found the build warning. Could you fix it?
dw_mmc.c: In function ‘dwmci_send_cmd’:
dw_mmc.c:137:10: warning: passing argument 2 of ‘bounce_buffer_start’ discards
‘const’ qualifier from pointer target type [enabled by default]
u-boot-mmc/include/bouncebuf.h:64:5: note: expected
Hi, Darwin.
I didn't think that "__func__" is needs...in my case.
There isn't the duplicated message, anywhere.
Best Regards,
Jaehoon Chung
On 12/20/2013 08:13 AM, Darwin Rambo wrote:
> Fixup prints to show where the print is done from, and
> a few minor formatting/grammar issues.
>
> Signed-of
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