Hello Lukasz,
Am 04.03.2014 12:33, schrieb Lukasz Majewski:
Hi Heiko,
Thanks to this multiple call of function dfu_config_entities()
gives continuous dfu alt numbering until call dfu_free_entities().
This allows to store dfu entities in multiple variables.
Could you test this patch on your
Hi,
We have recently started working on arndale and running u-boot head on it.
Seems like it is crashing on our setup with a data abort on usb start. Can
anyone please confirm and suggest a fix / solution
U-Boot 2014.04-rc1-00486-geeb72e6 (Mar 11 2014 - 11:44:32) for ARNDALE
Hi
Acked-by: Rajeshwari S Shinde
Regards,
Rajeshwari
On Tue, Mar 11, 2014 at 12:56 AM, Simon Glass wrote:
> Hi Marek,
>
> On 10 March 2014 13:04, Marek Vasut wrote:
>> Squash these warnings in pinmux.c found with GCC 4.8:
>>
>> /arch/arm/cpu/armv7/exynos/pinmux.c: In function 'exynos_pinmux_c
Hi,
We have recently started working on arndale and running u-boot head on
it. Seems like it is crashing on our setup with a data abort on usb
start. Can anyone please confirm and suggest a fix / solution
Our last mail was stuck in moderation, sending again
U-Boot 2014.04-rc1-00486-geeb72e6 (Mar
Changes:
1. L2 cache is being invalidated by Boot ROM code for e6500 core.
So removing the invalidation from start.S
2. Clear the LAW and corresponding configuration for CPC. Boot ROM
code uses it as hosekeeping area.
3. For Secure boot, CPC is configured as SRAM and used as house
keeping
> -Original Message-
> From: Sun York-R58495
> Sent: Tuesday, March 11, 2014 5:31 AM
> To: Wood Scott-B07421
> Cc: Bansal Aneesh-B39320; u-boot@lists.denx.de; Gupta Ruchika-R66431
> Subject: Re: [PATCH][v4] powerpc/mpc85xx: SECURE BOOT- Add secure boot
> target for B4860QDS
>
> On 03/10/20
Changes:
1. L2 cache is being invalidated by Boot ROM code for e6500 core.
So removing the invalidation from start.S
2. Clear the LAW and corresponding configuration for CPC. Boot ROM
code uses it as hosekeeping area.
3. For Secure boot, CPC is configured as SRAM and used as house
keeping
On 03/11/2014 03:05 AM, Masahiro Yamada wrote:
> $(SRCTREE)/$(CPUDIR)/u-boot.lds is our default location
> of arch-specific linker script.
>
> Remove redundant definitions in
> arch/{arc,microblaze,openrisc}/config.mk.
>
> Signed-off-by: Masahiro Yamada
> Cc: Alexey Brodkin
> Cc: Michal Simek
Hello Charles, Gerhard,
> > > Is there any (real, technical) reason why the bzip stuff (the
> > > CRC-32 calculation that has been made available separately)
> > > cannot get built and used as a library, and the tools/
> > > application just gets linked against it as one would expect?
> >
> > Fr
The tools "buildman" and "patman" are written Python.
When we run them, "*.pyc" files are created under
tools/buildman, tools/patman directories.
They should be cleaned up by "make distclean".
Signed-off-by: Masahiro Yamada
Cc: Simon Glass
Cc: Tom Rini
---
Makefile | 2 +-
1 file changed, 1 i
Adding u-boot list since I think this is a general issue/question.
On Sun, 2014-03-09 at 20:00 +0100, Olliver Schinagl wrote:
> On 03/09/14 16:18, tyler.ba...@linaro.org wrote:
> > On Sunday, March 9, 2014 8:06:27 AM UTC-7, tyler...@linaro.org wrote:
> >> Hello,
> >>
> >> I am trying to boot the c
Hi Tom,
On Mon, 10 Mar 2014 17:28:42 -0400, Tom Rini wrote:
> Hey all,
>
> I've pushed v2014.04-rc2 out to the repository and tarballs should exist
> soon.
>
> The good news this time around is Masahiro did some more updates to the
> system and we're now building faster than before. This shou
Hi Masahiro,
On Tue, 11 Mar 2014 12:19:12 +0900, Masahiro Yamada
wrote:
> When I cc board maintainers, some of them result in
> bounce mails.
>
> It turned out the following do not work any more:
> Yuli Barcohen
> Travis Sawyer
> Yusdi Santoso
> David Updegraff
> Sangmoon Kim
>
Hello Albert,
> > Besides, Orphan boards have been collected at the bottom of boards.cfg.
> > (This is done when we run "tools/reformat.py")
> >
> > Add separators to distinguish them from those which
> > were moved to Orphan 6 months ago.
> > I believe it will be helpful in future to find which
On Tuesday, March 11, 2014 at 03:05:11 AM, Masahiro Yamada wrote:
> Signed-off-by: Masahiro Yamada
> Cc: Marek Vasut
> Cc: Fabio Estevam
> Cc: Otavio Salvador
> Cc: Lauri Hintsala
You can drop Lauri from CC , I think this address is dead.
> ---
>
> Hi MXS board maitainers,
>
> I think this
Hi Masahiro,
On Tue, 11 Mar 2014 20:31:37 +0900, Masahiro Yamada
wrote:
> Hello Albert,
>
> > > Besides, Orphan boards have been collected at the bottom of boards.cfg.
> > > (This is done when we run "tools/reformat.py")
> > >
> > > Add separators to distinguish them from those which
> > > wer
On Tue, Mar 11, 2014 at 08:31:37PM +0900, Masahiro Yamada wrote:
> Hello Albert,
>
> > > Besides, Orphan boards have been collected at the bottom of boards.cfg.
> > > (This is done when we run "tools/reformat.py")
> > >
> > > Add separators to distinguish them from those which
> > > were moved to
On Tue, Mar 11, 2014 at 12:19:12PM +0900, Masahiro Yamada wrote:
> When I cc board maintainers, some of them result in
> bounce mails.
>
> It turned out the following do not work any more:
> Yuli Barcohen
> Travis Sawyer
> Yusdi Santoso
> David Updegraff
> Sangmoon Kim
> Anton Vo
ISBC creates a LAW 0 entry for non PBL platforms, which is not
disabled before transferring the control to uboot.
The LAW 0 entry has to be disabled.
Signed-off-by: Aneesh Bansal
---
arch/powerpc/cpu/mpc8xxx/law.c | 10 ++
1 file changed, 10 insertions(+)
Changes from v1:
The LAW was be
Add NOR, SPI and SD secure boot targets for BSC9132QDS.
Changes:
- Debug TLB entry is not required for Secure Boot Target.
Signed-off-by: Aneesh Bansal
---
arch/powerpc/cpu/mpc85xx/start.S | 9 ++---
arch/powerpc/include/asm/fsl_secure_boot.h | 2 ++
boards.cfg
On Tue, Mar 11, 2014 at 10:38:05AM +, Ian Campbell wrote:
> Adding u-boot list since I think this is a general issue/question.
>
> On Sun, 2014-03-09 at 20:00 +0100, Olliver Schinagl wrote:
> > On 03/09/14 16:18, tyler.ba...@linaro.org wrote:
> > > On Sunday, March 9, 2014 8:06:27 AM UTC-7, ty
Adding Inderpal singh and Trini. Please help
On 11-Mar-2014, at 12:27 pm, armdev wrote:
> Hi,
>
> We have recently started working on arndale and running u-boot head on it.
> Seems like it is crashing on our setup with a data abort on usb start. Can
> anyone please confirm and suggest a fix /
On Tue, 2014-03-11 at 09:48 -0400, Tom Rini wrote:
> On Tue, Mar 11, 2014 at 10:38:05AM +, Ian Campbell wrote:
> > But what is the reason for the default behaviour of bootz doing things
> > which do not conform to linux/Documentation/arm/Booting and therefore is
> > not going to boot?
>
> Beca
On 03/10/2014 04:58 PM, Scott Wood wrote:
> On Mon, 2014-03-10 at 04:14 -0500, Bansal Aneesh-B39320 wrote:
>>> -Original Message-
>>> From: Sun York-R58495
>>> Sent: Saturday, March 08, 2014 12:31 AM
>>> To: Bansal Aneesh-B39320
>>> Cc: Wood Scott-B07421; Wolfgang Denk; u-boot@lists.denx.de
On 03/10/2014 11:16 PM, Tang Yuantian-B29983 wrote:
>> -Original Message-
>> From: Sun York-R58495
>> Sent: Tuesday, March 11, 2014 1:45 AM
>> To: Tang Yuantian-B29983
>> Cc: u-boot@lists.denx.de; Li Yang-Leo-R58472; Jin Zhengxiong-R64188; Wood
>> Scott-B07421
>> Subject: Re: [PATCH 2/2 v2]
Patch a7e36fc9 (mtd: nand: omap: remove unused #defines from common
omap_gpmc.h) removed some MTD related defines. Including
GPMC_NAND_ECC_LP_x8_LAYOUT. But this define is also needed for the
memory controller configuration (only the x8 defines are needed,
the x16 defines are the default). Without
Micron Nor flash don't support read operation after send write command. As
below,
flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
cnt = len >> shift;
flash_write_cmd(info, sector, offset, cnt - 1);
switch (info->portwidth) {
case FLASH_CFI_
Hey!
When I build my Uboot with the CONFIG_OF_SEPARATE set to gain access to
the compiled dtb, Uboot can't find my concatenated dtb during the boot.
After injecting the pulbic keys for the verified boot, I cat the
u-boot.dtb behind the u-boot.bin. After that I mkimage the u-boot.img as
usuall.
Micron Nor flash don't support read operation after send write command. As
below,
flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
cnt = len >> shift;
flash_write_cmd(info, sector, offset, cnt - 1);
switch (info->portwidth) {
case FLASH_CFI_
From: Stefan Agner
This patch series addresses several fixes and enhancements for the
vybrid tower.
The patches are originally by Marcel Ziswiler which should remain
the Author of the patches, I picked them up since some changes
I'm going to submit are building upon them.
Changes v3:
- Merged p
From: Marcel Ziswiler
Add CCM_CCGR0_UART0_CTRL_MASK clock definition and add TX/RX iomux
definitions for UART0 (aka. SCI0).
Signed-off-by: Marcel Ziswiler
[ste...@agner.ch: regrouped patch]
Signed-off-by: Stefan Agner
---
arch/arm/include/asm/arch-vf610/crm_regs.h| 1 +
arch/arm/include/a
From: Marcel Ziswiler
The anadig_reg structure started at the wrong offset (fixed by adding
reserved_0x000[4]), was missing some reserved field required for
alignment purpose (reserved_0x094[3] between pll4_denom and pll6_ctrl)
and further contained a too short reserved field causing further miss
From: Marcel Ziswiler
Get rid of double VF610_PAD_DDR_A15__DDR_A_15 iomux configuration.
Signed-off-by: Marcel Ziswiler
---
board/freescale/vf610twr/vf610twr.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/board/freescale/vf610twr/vf610twr.c
b/board/freescale/vf610twr/vf610twr.c
index 69
From: Marcel Ziswiler
This patch contains several changes required for second Ethernet
(enet1/RMII1) port on vf610
- ANADIG PLL5 control definitions required for Ethernet RMII1 clock
- Secondary Ethernet (enet1) MAC RMII1 base address definition
- RMII1 iomux definitions
- VF610_PAD_PTA6__RMII0_C
On Tue, Mar 11, 2014 at 03:21:54PM +, Ian Campbell wrote:
> On Tue, 2014-03-11 at 09:48 -0400, Tom Rini wrote:
> > On Tue, Mar 11, 2014 at 10:38:05AM +, Ian Campbell wrote:
> > > But what is the reason for the default behaviour of bootz doing things
> > > which do not conform to linux/Docum
On 03/11/14 18:04, Stefan Roese wrote:
> Patch a7e36fc9 (mtd: nand: omap: remove unused #defines from common
> omap_gpmc.h) removed some MTD related defines. Including
> GPMC_NAND_ECC_LP_x8_LAYOUT. But this define is also needed for the
> memory controller configuration (only the x8 defines are ne
Signed-off-by: Tom Rini
---
include/configs/am335x_evm.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 6bd8aec..11088b3 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -79,7
Signed-off-by: Tom Rini
---
include/configs/am43xx_evm.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
index 2c5..2d9825b 100644
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@@ -128,7
To deal with a reoccurring problem properly we need to specify addresses
for the Linux kernel, Flatted Device Tree and ramdisk that obey the
constraints within the kernel's Documentation/arm/Booting file but also
make sure that we relocate things within a valid address range.
It is possible with t
On Tuesday 11 March 2014 22:13:26 you wrote:
> Hello Charles, Gerhard,
>
> > > > Is there any (real, technical) reason why the bzip stuff (the
> > > > CRC-32 calculation that has been made available separately)
> > > > cannot get built and used as a library, and the tools/
> > > > application just
On 11 March 2014 04:30, Masahiro Yamada wrote:
>
> The tools "buildman" and "patman" are written Python.
> When we run them, "*.pyc" files are created under
> tools/buildman, tools/patman directories.
>
> They should be cleaned up by "make distclean".
>
> Signed-off-by: Masahiro Yamada
> Cc: Simo
Micron Nor flash don't support read operation after send write command. As
below,
flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
cnt = len >> shift;
flash_write_cmd(info, sector, offset, cnt - 1);
switch (info->portwidth) {
case FLASH_CFI_
Hi,
On 11 March 2014 20:25, armdev wrote:
> Adding Inderpal singh and Trini. Please help
>
> On 11-Mar-2014, at 12:27 pm, armdev wrote:
>
> > Hi,
> >
> > We have recently started working on arndale and running u-boot head on
> it. Seems like it is crashing on our setup with a data abort on usb
Hello Chin,
> +static uint32_t denali_dma_configuration(uint32_t ops, bool raw_xfer,
> + uint32_t irq_mask, int oob_required)
Indentation not fixed yet.
I mean, only one tab is too small for the second line.
Rationale: "Documentation/CodingStyle" of Linux Kernel
Accoding to it, the foll
Hi Qi Wang,
please don't send this patch so often.
On 11.03.2014 09:46, Qi Wang 王起 (qiwang) wrote:
Micron Nor flash don't support read operation after send write command.
Are all Micon NOR flash chips affected by this? Or only some chips?
Please list the chips/families and best add a link to
Hi Stefan,
ok, got it.
Because I saw the patch format is malformed in the website
http://patchwork.ozlabs.org/project/uboot/list/, so I send this patch three
times. You can reference the last patch I submit. It's my first time to submit
Patch to Uboot community. Sorry for bring inconvenient for
Hello Detlev, Gerhard, Tom,
On Wed, 5 Mar 2014 08:37:54 -0500
Tom Rini wrote:
> On Wed, Mar 05, 2014 at 06:24:24PM +0900, Masahiro Yamada wrote:
>
> > CROSS_COMPILE is generally passed from the command line
> > or by the environment variable because cross tools
> > vary from user to user.
> >
Dear Inderpal,
Thanks for helping us, we were able to test ethernet over usb.
It breaks often but it works with the return -1 patch.
The following error is observed most of the time
EHCI timed out on TD - token=0x8008d80
-Regards
armdev team
On 12-Mar-2014, at 9:48 am, Inderpal Singh wrote:
>
> >
> > Could you be more specific? What *path* should I give?
> > If I do the below, I got error:
> >
> > $ make O=/home/tangyt/opensource/u-boot/
> > /home/tangyt/opensource/u-boot is not clean, please run 'make
> mrproper'
> > in the '/home/tangyt/opensource/u-boot' directory.
> > make[1]: *
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